LTC1647-2IS8

LTC1647-1/LTC1647-2/LTC1647-3 Dual Hot Swap Controllers FEATURES s s s s s s s DESCRIPTIO Allows Safe Board Insertion and Removal from a Live Backplane Programmable Electronic Circuit Breaker FAULT Output Indication Programmable Supply Voltage Power-Up Rate High Side Drive for External MOSFET Switches Controls Supply Voltages from 2.7V to 16.5V Undervoltage Lockout The LTC®1647-1/LTC1647-2/LTC1647-3 are dual Hot SwapTM controllers that permit a board to be safely inserted and removed from a live backplane. Using external N-channel MOSFETs, the board supply voltages can be ramped up at a programmable rate. A high side switch driver controls the MOSFET gates for supply voltages ranging from 2.7V to 16.5V. A programmable electronic circuit breaker protects against overloads and shorts. The ON pins are used to control board power or clear a fault. The LTC1647-1 is a dual Hot Swap controller with a common VCC pin, separate ON pins and is available in an SO-8 package. The LTC1647-2 is similar to the LTC1647-1 but combines a fault status flag with automatic retry at the ON pins and is also available in the SO-8 package. The LTC1647-3 has individual VCC pins, ON pins and FAULT status pins for each channel and is available in a 16-lead narrow SSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. APPLICATIO S s s s s Hot Board Insertion Electronic Circuit Breaker Portable Computer Device Bays Hot Plug Disk Drive TYPICAL APPLICATIO 3.3V VID SUPPLY R1 0.1Ω Q1 1/2 MMDF3N02HD VID Controller for Two Device Bays DEVICE #1 CONNECTOR #1 R3** R2 10Ω + CLOAD* R4** 1394 PHY AND/OR USB PORT 8 1 ON1 ON2 2 3 4 SENSE 1 VCC ON1 ON2 GND SENSE 2 7 6 GATE 1 C1 4.7nF 2.5V/DIV LTC1647-1 * GATE 2 5 R6 10Ω CLOAD IS USER-SELECTED BASED ON THE DEVICE REQUIREMENTS ** R3, R4, R7 AND R8 ARE OPTIONAL DISCHARGE RESISTORS WHEN DEVICES ARE POWERED-OFF Q1, Q2: ON SEMICONDUCTOR C3 4.7nF DEVICE #2 Q2 1/2 MMDF3N02HD CONNECTOR #2 R5 0.1Ω R7** + CLOAD* R8** 1394 PHY AND/OR USB PORT 1647-1/2/3 TA01 U ON/OFF Sequence VON VGATE VOUT 5ms/DIV 1647-1/2/3 TA01a U U 1 LTC1647-1/LTC1647-2/LTC1647-3 ABSOLUTE (Note 1) AXI U RATI GS Operating Temperature Range Commercial ............................................. 0°C to 70°C Industrial ............................................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C Supply Voltage (VCC) ............................................... 17V Input Voltage (SENSE) ................. – 0.3V to (VCC + 0.3V) Input Voltage (ON) .....................................– 0.3V to 17V Output Voltage (FAULT) .............................– 0.3V to 17V Output Voltage (GATE) ......... Internally Limited (Note 3) PACKAGE/ORDER I FOR ATIO TOP VIEW VCC 1 ON1 2 ON2 3 GND 4 8 7 6 5 SENSE 1 SENSE 2 GATE 1 GATE 2 VCC 1 ON1/FAULT 1 2 ON2/FAULT 2 3 GND 4 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 130°C/W TJMAX = 150°C, θJA = 130°C/W ORDER PART NUMBER LTC1647-1CS8 LTC1647-1IS8 S8 PART MARKING 16471 16471I Consult factory for Military grade parts. ORDER PART NUMBER LTC1647-2CS8 LTC1647-2IS8 S8 PART MARKING 16472 16472I The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise noted. (Note 2) SYMBOL PARAMETER VCC ICC ICCX VLKO VLKH VCB ICP VCCX Supply Range VCC Supply Current (Note 4) VCCX Supply Current (Note 5, LTC1647-3) VCCX Undervoltage Lockout VCCX Undervoltage Lockout Hysteresis Circuit Breaker Trip Voltage GATE X Output Current VCB = VCCX – VSENSEX ONX High, FAULT X High, VGATE = GND (Sourcing) ONX Low, FAULT X High, VGATE = VCC (Sinking) ONX High, FAULT X Low, VGATE = 15V (Sinking) q q ELECTRICAL CHARACTERISTICS CONDITIONS Operating Range ON1, ON2 = VCC1 = VCC2, ICC = ICC1 + ICC2 ONX = VCCX, ICCX Individually Measured, VCC1 = 5V, VCC2 = 12V or VCC1 = 12V, VCC2 = 5V Coming Out of UVLO (Rising VCCX) q q q q 2 U U W WW U W TOP VIEW 8 7 6 5 SENSE 1 SENSE 2 GATE 1 GATE 2 TOP VIEW VCC1 ON1 FAULT 1 ON2 FAULT 2 1 2 3 4 5 6 7 8 16 VCC2 15 SENSE 1 14 SENSE 2 13 GATE 1 12 GATE 2 11 NC 10 NC 9 NC S8 PACKAGE 8-LEAD PLASTIC SO NC NC GND GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 150°C, θJA = 130°C/W ORDER PART NUMBER LTC1647-3CGN LTC1647-3IGN GN PART MARKING 16473 16473I MIN 2.7 TYP 1.0 0.5 MAX 16.5 6 5 2.60 60 14 UNITS V mA mA V mV mV µA µA mA 2.30 40 6 2.45 210 50 10 50 50 LTC1647-1/LTC1647-2/LTC1647-3 The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise noted. (Note 2) SYMBOL PARAMETER ∆VGATE VONHI VONLO VONHYST IIN VOL ILEAK tFAULT tRESET tON tOFF External MOSFET Gate Drive ONX Threshold High ONX Threshold Low ONX Hysteresis ONX Input Current FAULT X Output Low Voltage (LTC1647-2, LTC1647-3) FAULT X Output Leakage Current (LTC1647-3) Circuit Breaker Delay Time Circuit Breaker Reset Time Turn-On Time Turn-Off Time ON = GND or VCC IO = 1mA, VCC = 5V IO = 5mA, VCC = 5V No Fault, FAULT X = VCC = 5V VCCX – VSENSEX = 0 to 100mV ONX High to Low, to FAULT X High ONX Low to High, to GATE X On ONX High to Low, to GATE X Off q q q ELECTRICAL CHARACTERISTICS CONDITIONS (VGATE – VCC), VCC1 = VCC2 = 5V (VGATE – VCC), VCC1 = VCC2 = 12V q q q q MIN 10 10 1.20 1.17 TYP 13 15 1.29 1.21 70 ±1 0.8 ±1 0.3 50 2 1 MAX 17 19 1.38 1.25 ±10 0.4 ±10 UNITS V V V V mV µA V V µA µs 100 µs µs µs Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 3: An internal Zener on the GATE pins clamp the charge pump voltage to a typical maximum operating voltage of 28V. External overdrive of the GATE pin beyond the internal Zener voltage may damage the device. The GATE capacitance must be < 0.15µF at maximum VCC. If a lower GATE pin clamp voltage is desired, use an external Zener diode. Note 4: The total supply current ICC is measured with VCC1 and VCC2 connected internally (LTC1647-1, LTC1647-2) or externally (LTC1647-3). Note 5: The individual supply current ICCX is measured on the LTC1647-3. The lower of the two supplies, VCC1 and VCC2, will have its channel’s current. The higher supply will carry the additional supply current of the charge pump and the bias generator beside its channel’s current. PI TABLES LTC1647-1 Pinout PIN 1 2 3 4 DESCRIPTION VCC ON1 ON2 GND PIN 5 6 7 8 DESCRIPTION GATE 2 GATE 1 SENSE 2 SENSE 1 LTC1647-1 does not have the FAULT status feature. LTC1647-2 Pinout PIN 1 2 3 4 DESCRIPTION VCC ON1 and FAULT 1 (Internally Tied Together) ON2 and FAULT 2 (Internally Tied Together) GND PIN 5 6 7 8 DESCRIPTION GATE 2 GATE 1 SENSE 2 SENSE 1 The ONX/FAULT X must be connected to a driver via a resistor if the autoretry feature is being used.. U LTC1647-3 Pinout PIN 1 2 3 4 5 6 7 8 DESCRIPTION VCC1 ON1 FAULT 1 ON2 FAULT 2 NC NC GND PIN 9 10 11 12 13 14 15 16 DESCRIPTION NC NC NC GATE 2 GATE 1 SENSE 2 SENSE 1 VCC2 3 LTC1647-1/LTC1647-2/LTC1647-3 TYPICAL PERFOR A CE CHARACTERISTICS ICC vs VCC 6 5 4 ICC (mA) ICC (mA) 3 2 1 0 2 4 6 8 10 12 VCC (V) 14 16 18 TA = 25°C ICC = ICC1 + ICC2 VCC = VCC1 = VCC2 = ON1 = ON2 6 5 4 ICC1 (mA) VCC = 15V 3 2 VCC = 5V 1 0 –75 –50 –25 VCC = 3V 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G02 ICC2 vs VCC2 5 TA = 25°C 4 (VGATE – VCC) (V) 20 18 16 14 ICC2 (mA) VCC1 = 15V VCC1 = 12V VCC1 = 3V VGATE (V) 3 2 1 VCC1 = 5V 0 0 2 4 6 8 10 12 14 16 18 20 VCC2 (V) 1647-1/2/3 G04 (VGATE – VCC) vs Temperature 20 18 16 (VGATE – VCC) (V) 14 VGATE (V) 12 10 8 6 4 2 0 –75 –50 –25 VCC = VCC1 = VCC2 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G07 VCC = 12V VCC = 5V 30 25 VCC = 5V 20 15 10 5 0 –75 –50 –25 VCC = 15V VCC = 3V VCC = 12V (VGATE1 – VCC1) (V) 4 UW 1647-1/2/3 G01 ICC vs Temperature 5 ICC = ICC1 + ICC2 VCC = VCC1 = VCC2 = ON1 = ON2 4 ICC1 vs VCC2 TA = 25°C VCC = 12V 3 VCC1 = 15V VCC1 = 12V 2 VCC1 = 5V VCC1 = 3V 0 0 2 4 6 8 10 12 14 16 18 20 VCC2 (V) 1647-1/2/3 G03 1 (VGATE – VCC) vs VCC 30 25 20 15 10 TA = 25°C VCC = VCC1 = VCC2 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G05 VGATE vs VCC 12 10 8 6 4 2 0 5 0 TA = 25°C VCC = VCC1 = VCC2 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G06 VGATE vs Temperature 35 VCC = 15V 20 18 16 14 12 10 8 6 4 VCC = VCC1 = VCC2 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G08 (VGATE1 – VCC1) vs Temperature VCC1 = 12V VCC1 = 5V VCC1 = 15V VCC = 3V VCC1 = 3V 2 0 0 2 4 6 TA = 25°C (LTC1647-3) 8 10 12 14 16 18 20 VCC2 (V) 1647-1/2/3 G09 LTC1647-1/LTC1647-2/LTC1647-3 TYPICAL PERFOR A CE CHARACTERISTICS VGATE1 vs VCC2 35 GATE OUTPUT SOURCE CURRENT (µA) VCC1 = 15V 30 25 VGATE1 (V) 20 15 10 5 0 TA = 25°C (LTC1647-3) 0 2 4 6 8 10 12 14 16 18 20 VCC2 (V) 1647-1/2/3 G10 GATE OUTPUT SOURCE CURRENT (µA) VCC1 = 12V VCC1 = 5V VCC1 = 3V GATE Output Sink Current vs VCC 100 GATE OUTPUT SINK CURRENT (µA) GATE OUTPUT SINK CURRENT (µA) 90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G13 54 53 52 51 50 49 48 47 46 GATE FAST PULL-DOWN CURRENT (mA) TA = 25°C GATE Fast Pull-Down Current vs Temperature 80 GATE FAST PULL-DOWN CURRENT (mA) CIRCUIT BREAKER TRIP VOLTAGE (mV) 70 60 50 40 30 20 10 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G16 58 56 54 52 50 48 46 44 42 40 0 CIRCUIT BREAKER TRIP VOLTAGE (mV) VCC = VCC1 = VCC2 = 5V UW GATE Output Source Current vs VCC 14 13 12 11 10 9 8 7 6 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G11 GATE Output Source Current vs Temperature 14 13 12 11 10 9 8 7 6 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G12 TA = 25°C VCC = VCC1 =VCC2 VCC = VCC1 = VCC2 = 5V GATE Output Sink Current vs Temperature 55 VCC = 5V 60 GATE Fast Pull-Down Current vs VCC TA = 25°C 55 50 45 40 35 30 45 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G14 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G15 Circuit Breaker Trip Voltage vs VCC 60 TA = 25°C 60 58 56 54 52 50 48 46 44 42 Circuit Breaker Trip Voltage vs Temperature VCC = 15V VCC = 12V VCC = 5V VCC = 3V 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G17 40 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G18 5 LTC1647-1/LTC1647-2/LTC1647-3 TYPICAL PERFOR A CE CHARACTERISTICS Undervoltage Lockout Threshold vs Temperature UNDERVOLTAGE LOCKOUT THRESHOLD (V) 2.6 1.35 TA = 25°C ON THRESHOLD VOLTAGE (V) 2.5 RISING EDGE 1.30 HIGH ON THRESHOLD VOLTAGE (V) 1.30 2.4 2.3 FALLING EDGE 2.2 2.1 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G19 FAULT VOL vs VCC 2.0 1.8 1.6 1.4 FAULT VOL (V) FAULT VOL (V) 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 IOL = 1mA 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G22 TA = 25°C 1.2 1.0 0.8 0.6 0.4 0.2 IOL = 1mA 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G23 TFAULT (µs) IOL = 5mA TFAULT vs Temperature 1.0 CIRCUIT BREAKER RESET TIME (µs) 70 0.8 CIRCUIT BREAKER RESET TIME (µs) TFAULT (µs) 0.6 VCC = 3V VCC = 5V VCC = 12V 0.4 0.2 VCC = 15V 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G25 6 UW ON Threshold Voltage vs VCC 1.35 ON Threshold Voltage vs Temperature VCC = 5V HIGH 1.25 LOW 1.20 1.25 LOW 1.20 1.15 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G20 1.15 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G21 FAULT VOL vs Temperature 2.0 1.8 1.6 1.4 0.6 VCC = 5V 0.8 1.0 TFAULT vs VCC TA = 25°C IOL = 5mA 0.4 0.2 0 –75 –50 –25 0 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G24 Circuit Breaker Reset Time vs VCC 60 TA = 25°C 60 58 56 54 52 50 48 46 44 42 Circuit Breaker Reset Time vs Temperature VCC = 3V 50 VCC = 5V VCC = 12V VCC = 15V 40 30 0 2 4 6 8 10 12 14 16 18 20 VCC (V) 1647-1/2/3 G26 40 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 1647-1/2/3 G27 LTC1647-1/LTC1647-2/LTC1647-3 PI FU CTIO S VCC1 (LTC1647-3): Channel 1 Positive Supply Input. The supply range for normal operation is 2.7V to 16.5V. The supply current, ICC1, is typically 1mA. Channel 1’s undervoltage lockout (UVLO) circuit disables GATE 1 until the supply voltage at VCC1 is greater than VLKO (typically 2.47V). GATE 1 is held at ground potential until UVLO deactivates. If ON1 is high and VCC1 is above the UVLO threshold voltage, GATE 1 is pulled high by a 10µA current source. If VCC1 falls below (VLKO – VLKH), GATE 1 is pulled immediately to ground. The internal reference and the common charge pump are powered from the higher of the two VCC inputs, VCC1 or VCC2. VCC2 (LTC1647-3): Channel 2 Positive Supply Input. See VCC1 for functional description. VCC: The Common Positive Supply Input for the LTC1647-1 and the LTC1647-2. VCC1 and VCC2 are internally connected together. GND: Chip Ground. ON1: Channel 1 ON Input. The threshold at the ON1 pin is set at 1.28V with 70mV hysteresis. If UVLO and the circuit breaker of channel 1 are inactive, a logic high at ON1 enables the 10µA charge pump current source, pulling the GATE 1 pin above VCC1. If the ON1 pin is pulled low, the GATE 1 pin is pulled to ground by a 50µA current sink. ON1 resets channel 1’s electronic circuit breaker by pulling ON1 low for greater than one tRESET period (50µs). A low-to-high transition at ON1 restarts a normal GATE 1 pull-up sequence. ON2: Channel 2 ON Input. See ON1 for functional description. FAULT 1: Channel 1 Open-Drain Fault Status Output. FAULT 1 pin pulls low after 0.3µs (tFAULT) if the circuit breaker measures greater than 50mV across the sense resistor connected between VCC1 and SENSE 1. If FAULT 1 pulls low, GATE 1 also pulls low. FAULT 1 remains low until ON1 is pulled low for at least one tRESET period. FAULT 2: Channel 2 Open-Drain Fault Status Output. See FAULT 1 for functional description. SENSE 1: Channel 1 Circuit Breaker Current Sense Input. Load current is monitored by a sense resistor connected between VCC1 and SENSE 1. The circuit breaker trips if the voltage across the sense resistor exceeds 50mV (VCB). To disable the circuit breaker, connect SENSE 1 to VCC1. In order to obtain optimum performance, use Kelvin-sense connections between the VCC and SENSE pins to the current sense resistor. SENSE 2: Channel 2 Circuit Breaker Current Sense Input. See SENSE 1 for functional description. GATE 1: Channel 1 N-Channel MOSFET Gate Drive Output. An internal charge pump guarantees at least 10V of gate drive from a 5V supply. Two Zener clamps are incorporated at the GATE 1 pin; one Zener clamps GATE 1 approximately 15V above VCC and the second Zener clamps GATE 1 appoximately 28V above GND. The rise time at GATE 1 is set by an external capacitor connected between GATE 1 and GND and an internal 10µA current source provided by the charge pump. The fall time at GATE 1 is set by the 50µA current sink if ON1 is pulled low. If the circuit breaker is tripped or the supply voltage hits the UVLO threshold, a 50mA current sink rapidly pulls GATE 1 low. GATE 2: Channel 2 N-Channel MOSFET Gate Drive Output. See GATE 1 for functional description. NC: No Connection. U U U 7 LTC1647-1/LTC1647-2/LTC1647-3 BLOCK DIAGRA S LTC1647-1 SENSE 1 8 ON1 2 VCC 1 GND 4 REFERENCE 1.21V CHARGE PUMP CP SENSE 2 7 ON2 3 SENSE 1 8 ON1/FAULT 1 2 VCC 1 GND 4 REFERENCE 1.21V CHARGE PUMP CP SENSE 2 7 ON2/FAULT 2 3 8 W + – 50mV + – CHANNEL ONE CP 10µA 1.21V + 50µs FILTER 6 GATE 1 – 2.45V UVL 50µA CHANNEL TWO (DUPLICATE OF CHANNEL ONE) 5 GATE 2 1647-1/2/3 BD1 LTC1647-2 + – 50mV + – CHANNEL ONE CP 10µA 1.21V + 50µs FILTER 6 GATE 1 – 2.45V UVL FAULT 50µA CHANNEL TWO (DUPLICATE OF CHANNEL ONE) 5 GATE 2 1647-1/2/3 BD2 LTC1647-1/LTC1647-2/LTC1647-3 BLOCK DIAGRA S LTC1647-3 VCC1 1 SENSE 1 15 ON1 2 FAULT 1 3 GND 8 VCC2 16 SENSE 2 14 ON2 4 FAULT 2 5 CHANNEL TWO (DUPLICATE OF CHANNEL ONE) APPLICATIO S I FOR ATIO VCC Selection Circuit The LTC1647-3 features separate supply inputs (VCC1 and VCC2) for each channel. The reference and charge pump circuit draw supply current from the higher of the two supplies. An internal VCC selection circuit detects and makes the power connection automatically. This allows a 3V channel to have standard MOSFET gate overdrive when the other channel is 5V. An internal Zener clamps GATE about 15V above VCC. If both supplies are connected together (internally for LTC1647-1 and LTC1647-2 or externally for LTC1647-3), the reference and charge pump circuit draw equal current from both pins. Electronic Circuit Breaker Each channel of the LTC1647 features an electronic circuit breaker to protect against excessive load current and U W W + – 50mV + – CHANNEL ONE CP 10µA 1.21V + 50µs FILTER 13 GATE 1 – 2.45V UVL FAULT 50µA REFERENCE 1.21V CHARGE PUMP CP VCC SELECTION 12 GATE 2 1647-1/2/3 BD3 U U short-circuits. Load current is monitored by sense resistor R1 as shown in Figure 1. The circuit breaker threshold, VCB, is 50mV and it exhibits a response time, tFAULT, of approximately 300ns. If the voltage between VCC and SENSE exceeds VCB for more than tFAULT, the circuit breaker trips and immediately pulls GATE low with a 50mA current sink. The MOSFET turns off and FAULT pulls low. The circuit breaker is cleared by pulling the ON pin low for a period of at least tRESET (50µs). A timing diagram of these events is shown in Figure 2. The value of the sense resistor R1 is given by R1 = VCB/ITRIP(Ω) where VCB is the circuit breaker trip voltage (50mV) and ITRIP is the value of the load current at which the circuit breaker trips. Kelvin-sense layout techniques between the sense resistor and the VCC and SENSE pins are highly recommended for proper operation. 9 LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO The circuit breaker trip voltage has a tolerance of 20%; combined with a 5% sense resistor, the total tolerance is 25%. Therefore, calculate R1 based on a trip current ITRIP of no less than 125% of the maximum operating current. Do not neglect the effect of ripple current, which adds to the maximum DC component of the load current. Ripple current may arise from any of several sources, but the worst offenders are switching supplies. A switching regulator on the load side will attempt to draw some ripple current from the backplane and this current passes through the sense resistor. Similarly, output ripple from a switching regulator supplying the backplane will flow through the sense resistor and into the load capacitor. Minimize the effects of ripple current by either filtering the VOUT line or adding an RC filter to the SENSE pin. A series inductance of 1µH to 10µH inserted between Q1 and CLOAD is adequate ripple current suppression in most cases. Alternatively, a filter, consisting of R3 and C3(Figure 3), simply filters the ripple component from the SENSE pin at the expense of response time. The added delay is given by tDELAY = – R3•C3•ln[1 – (VCB/R1 – IAV)/(IPK – IAV)] R1 0.01Ω VCC Q1 IRF7413 + R3 10k R2 10Ω C1 10nF CLOAD 1 VCC ON FAULT 2 3 8 ON1 FAULT GND 15 SENSE 13 GATE LTC1647-3 1647-1/2/3 F01 Figure 1. Supply Control Circuitry VON VCC – VSENSE VGATE t FAULT t RESET VFAULT 1647-1/2/3 F02 Figure 2. Current Fault Timing 10 U R1 0.01Ω VCC Q1 IRF7413 W U U + C3 10nF R3 1.5k R2 10Ω VOUT CLOAD IPK = 7.5A IAV = 2.5A ITRIP = VCB/R1 = 5A tDELAY = 10µs C1 10nF VCC SENSE LTC1647 GATE 1647-1/2/3 F03 Figure 3. Filtering Current Ripple/Glitches Power MOSFET Selection Power MOSFETs are classified into two catagories: standard MOSFETs (RDS(ON) specified at VGS = 10V) and logiclevel MOSFETs (RDS(ON) specified at VGS = 5V). The absolute maximum rating for VGS is typically 20V for standard MOSFETs. The maximum rating for logic-level MOSFETs is lower and ranges from 8V to 16V depending on the manufacturer and specific part number. Some logic-level MOSFETs have a 20V maximum VGS rating. The LTC1647 is primarily targeted for standard MOSFETs; low supply voltage applications should use logic-level MOSFETs. GATE overdrive as a function of VCC is illustrated in the Typical Performance Curves. If lower GATE overdrive is desired, connect a diode in series with a Zener between GATE and VCC or between GATE and VOUT as shown in Figure 4. The RDS(ON) of the external pass transistor must be low to make VDS a small percentage of VCC. At VCC = 3.3V, VDS + VCB = 0.1V yields 3% error at maximum load current. This restricts the choice of MOSFETs to very low RDS(ON). At higher VCC voltages, the RDS(ON) requirement can be relaxed. MOSFET package dissipation (PD and TJ) may restrict the value of RDS(ON). R1 VCC D2 1N4148 D2 1N4148 Q1 VOUT VOUT D1* D4* *USER SELECTED VOLTAGE CLAMP 1N4688 (5V) 1N4692 (7V): LOGIC-LEVEL MOSFET 1N4695 (9V) 1N4702 (15V): STANDARD-LEVEL MOSFET 1647-1/2/3 F04 Figure 4. Optional Gate Clamp LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO Power Supply Ramping VOUT is controlled by placing MOSFET Q1 in the power path (Figure 1). R1 provides load current fault detection and R2 prevents MOSFET high frequency oscillation. By ramping the gate of the pass transistor at a controlled rate (dV/dt = 10 µA/C1), the transient surge current (I = CLOAD•dV/dt = 10µA•CLOAD/C1) drawn from the main backplane is limited to a safe value when the board is inserted into the connector. When power is first applied to VCC, the GATE pin pulls low. A low-to-high transition at the ON pin initiates GATE rampup. The rising dV/dt of GATE is set by 10µA/C1 (Figure 5), where C1 is the total external capacitance between GATE and GND. The ramp-up time for VOUT is equal to t = (VCC•C1)/10µA. VGATE RAMP-UP SLOPE = 10µA/C1 RAMP-DOWN SLOPE = –50µA/C1 VCC VOUT CLOAD DISCHARGES 0V VCC 0V VON 1647-1/2/3 F05 VCC + ∆VGATE Figure 5. Supply Turn-On/Off with ON ON (5V LOGIC) R3 15k VGATE DROOP DUE TO VCC FAST RAMP-DOWN AT UNDERVOLTAGE LOCKOUT VCC + ∆VGATE VGATE RAMP-UP SLOPE = 10µA/C1 VOUT VCC CLOAD DISCHARGES 0V VCC OUT OF UVLO VLKO VCC INTO UVLO VLKO – VLKH 1647-1/2/3 F06 VCC UNPLUGGED 0V U A high-to-low transition at the ON pin initiates a GATE ramp-down at a slope of – 50µA/C1. This rate is usually adequate as the supply bypass capacitors take time to discharge through the load. If the ON pin is connected to VCC, or is pulled high before VCC is first applied, GATE is held low until VCC rises above the undervoltage lockout threshold, VLKO (Figure 6). Once the threshold is exceeded, GATE ramps at a controlled rate of 10µA/C1. When the power supply is disconnected, the body diode of Q1 holds VCC about 700mV below VOUT. The GATE voltage droops at a rate determined by VCC. If VCC drops below VLKO – VLKH, the LTC1647 enters UVLO and GATE pulls down to GND. Autoretry The LTC1647-2 and LTC1647-3 are designed to allow an automatic reset of the electronic circuit breaker after a fault condition occurs. This is accomplished by pulling the ON/FAULT (LTC1647-2) pin or the ON and FAULT pins tied together (LTC1647-3) high through a resistor, R3, as shown in Figure 7. An autoretry sequence begins if a fault occurs. If the circuit breaker trips, FAULT pulls the ON pin low. After a tRESET interval elapses, FAULT resets and R3 R1 0.01Ω VCC Q1 IRF7413 W U U + R2 10Ω VOUT CLOAD 1 VCC 2 4 ON/FAULT GND 8 SENSE 6 GATE C1 10nF FAULT C3 0.1µF LTC1647-2 VCC – VSENSE t RESET VGATE t DELAY VFAULT tRAMP 1647-1/2/3 F07 Figure 7. Autoretry Sequence 11 LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO pulls the ON pin up. C3 delays GATE turn-on until the voltage at the ON pin exceeds VIH. The delay time is tDELAY = –R3•C3•ln[1–(VIH – VOL)/(VON – VOL)] GATE ramps up at 10µA/C1 until Q1 conducts. If VOUT is still shorted to GND, the cycle repeats. The ramp interval is about tRAMP = VTH•C1/10µA where VTH is the threshold voltage of the external MOSFET. Hot Circuit Insertion When circuit boards are inserted into a live backplane or a device bay, the supply bypass capacitors on the board can draw huge transient currents from the backplane or the device bay power bus as they charge up. The transient currents can damage the connector pins and glitch the system supply, causing other boards in the system to reset or malfunction. The LTC1647 is designed to turn two positive supplies on and off in a controlled manner, allowing boards to be safely inserted or removed from a live backplane or device bay. The LTC1647 can be located before or after the connector as shown in Figure 8. A staggered PCB connector can sequence pin conections when plugging and unplugging circuit boards. Alternatively, the control signal can be generated by processor control. Ringing Good engineering practice calls for bypassing the supply rail of any circuit. Bypass capacitors are often placed at the supply connection of every active device, in addition to one or more large value bulk bypass capacitors per supply rail. If power is connected abruptly, the bypass capacitors slow the rate of rise of voltage and heavily damp any parasitic resonance of lead or trace inductance working against the supply bypass capacitors. The opposite is true for LTC1647 Hot Swap circuits on a daughterboard. In most cases, on the powered side of the MOSFET switch (VCC) there is no supply bypass capacitor present. An abrupt connection, produced by plugging a board into a backplane connector, results in a fast rising edge applied to the VCC line of the LTC1647. 12 U No bulk capacitance is present to slow the rate of rise and heavily damp the parasitic resonance. Instead, the fast edge shock excites a resonant circuit formed by a combination of wiring harness, backplane and circuit board parasitic inductances and MOSFET capacitance. In theory, the peak voltage should rise to 2X the input supply, but in practice the peak can reach 2.5X, owing to the effects of voltage dependent MOSFET capacitance. The absolute maximum VCC potential for the LTC1647 is 17V; any circuit with an input of more than 6.8V should be scrutinized for ringing. A well-bypassed backplane should not escape suspicion: circuit board trace inductances of as little as 10nH can produce sufficient ringing to overvoltage VCC. Check ringing with a fast storage oscilloscope (such as a LECROY 9314AL DSO) by attaching coax or a probe to VCC and GND, then repeatedly inserting the circuit board into the backplane. Figures 9a and 9b show typical results in a 12V application with different VCC lead lengths. The peak amplitude reaches 22V, breaking down the ESD protection diode in the process. There are two methods for eliminating ringing: clipping and snubbing. A transient voltage suppressor is an effective means of limiting peak voltage to a safe level. Figure 10 shows the effect of adding an ON Semiconductor, 1SMA12CAT3, on the waveform of Figure 9. Figures 11a and 11b show the effects of snubbing with different RC networks. The capacitor value is chosen as 10X to 100X the MOSFET COSS under bias and R is selected for best damping—1Ω to 50Ω depending on the value of parasitic inductance. Supply Glitching LTC1647 Hot Swap circuits on the backplane are generally used to provide power-up/down sequence at insertion/ removal as well as overload/short-circuit protection. If a short-circuit occurs at supply ramp-up, the circuit breaker trips. The partially enhanced MOSFET, Q1, is easily disconnected without any supply glitch. W U U LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO If a dead short occurs after a supply connection is made (Figure 12), the sense resistor R1 and the RDS(ON) of fully enhanced Q1 provide a low impedance path for nearly unlimited current flow. The LTC1647 discharges the GATE pin in a few microseconds, but during this discharge time current on the order of 150 amperes flows from the VCC power supply. This current spike glitches the power supply, causing VCC to dip (Figure 12a and 12b). On recovery from overload, some supplies may overshoot. Other devices attached to this supply may reset or malfunction and the overshoot may also damage some components. An inductor (1µH to 10µH) in series with Q1’s source limits the short-circuit di/dt, thereby limiting the peak current and the supply glitch (Figure 12c and 12d). Additional power supply bypass capacitance also reduces the magnitude of the VCC glitch. U VID Power Controller The two Hot Swap channels of the LTC1647 are ideally suited for VID power control in portable computers. Figure 13 shows an application using the LTC1647-2 on the system side of the device bay interface (1394 PHY and/ or USB). The controller detects the presence of a peripheral in each device bay and controls the LTC1647-2. The timing waveform illustrates the following sequence of events: t1, rising out of undervoltage lockout with GATE 1 ramping up; t2, load current fault at R1; t3, circuit breaker resets with R5/C3 delay; t4/t5, controller gates off/on device supply with RC delay; t6, device enters undervoltage lockout. If C6 is not connected in Figure 13, FAULT 2 and ON2 will have similar waveforms. t7 initiates an ON sequence; t8, a load fault is detected at R7 with FAULT 2 pulling low. If the controller wants to stretch the interval between retries, it can pull ON2 low at t9 ( t9 – t8 < 0.4•tRESET). At t10/t11, the controller initiates a new power-up/down sequence. W U U 13 LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO U BACKPLANE CONNECTOR R1 VCC R4 R5 R2 ON Q2 1 R3 FAULT VCC 2 3 8 ON FAULT GND LTC1647-3 15 SENSE 13 GATE Q1 STAGGERED PCB EDGE CONNECTOR BACKPLANE CONNECTOR VCC R4 FAULT 1 R3 VCC 2 3 8 ON FAULT GND 1647-1/2/3 F08 14 W U U + VOUT CLOAD C1 (a) HOT SWAP CONTROLLER ON MOTHERBOARD STAGGERED PCB EDGE CONNECTOR R1 Q1 + R2 VOUT CLOAD 15 SENSE LTC1647-3 13 GATE C1 (b) HOT SWAP CONTROLLER ON DAUGHTERBOARD Figure 8. Staggered Pins Connection LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO U R1 0.01Ω Q1 IRF7413 12V 24V 4V/DIV 0V 1µs/DIV 4V/DIV (a) Undamped VCC Waveform (48" Leads) Figure 9. Ring Experiment W + – U U 8' + POWER LEADS SCOPE PROBE R2 10Ω VOUT CLOAD C1 10nF LTC1647 1647-1/2/3 F09 24V 0V 1µs/DIV 1647-1/2/3 F09a 1647-1/2/3 F09b (b) Undamped VCC Waveform (8" Leads) 15 LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO R1 0.01Ω BACKPLANE CONNECTOR PCB EDGE CONNECTOR 12V + – C1 10nF LTC1647 2V/DIV 0V 1µs/DIV 1647-1/2/3 F10a POWER LEADS D1* ON SEMICONDUCTOR * 1SMA12CAT3 Figure 10. Transient Suppressor Clamp BACKPLANE CONNECTOR PCB EDGE CONNECTOR 12V + – POWER LEADS 12V 2V/DIV 0V 1µs/DIV 1647-1/2/3 F11a 2V/DIV (a) VCC Waveform Damped by a Snubber (15Ω, 6.8nF) Figure 11. Snubber “Fixes” 16 U Q1 IRF7413 W U U + R2 10Ω VOUT CLOAD 12V 1647-1/2/3 F10 VCC Waveform Clamped by a Transient Suppressor R1 0.01Ω R3 10Ω C1 0.1µF Q1 IRF7413 + R2 10Ω VOUT CLOAD C1 10nF LTC1647 1647-1/2/3 F11 12V 0V 1µs/DIV 1647-1/2/3 F11b (b) VCC Waveform Damped by a Snubber (10Ω, 0.1µF) LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO U R1 0.01Ω Q1 IRF7413 L1 2µH BACKPLANE CONNECTOR 12V + – + R2 10Ω C2 100µF C1 10nF LTC1647 1647-1/2/3 F12 GATE 25A/DIV 4V/DIV VCC 1µs/DIV 1647-1/2/3 F12a BOARD WITH POSSIBLE SHORT-CIRCUIT FAULT (a) VCC Short-Circuit Supply Current Glitch without Any Limiting 5A/DIV 4V/DIV 1µs/DIV (c) VCC Short-Circuit Supply Current Glitch with 2µH Series Inductor Figure 12. Supply Glitch W U U SUPPLY GLITCH 1µs/DIV 1647-1/2/3 F12b (b) VCC Supply Glitch without Any Limiting GATE VCC 1647-1/2/3 F12c 1µs/DIV 1647-1/2/3 F12d (d) VCC Supply Glitch with 2µH Series Inductor 17 LTC1647-1/LTC1647-2/LTC1647-3 APPLICATIO S I FOR ATIO R1 0.1Ω CONNECTOR #1 3.3V VID SUPPLY ON1 R5 10Ω FAULT 1 DEVICE BAY CONTROLLER WITH 1394 PHY AND/OR USB ON2 8 C3 0.1µF 1 2 3 R6 10Ω FAULT 2 C6 0.1µF 4 SENSE 1 VCC ON1/FAULT 1 ON2/FAULT 2 GND SENSE 2 7 Q2 1/2 MMDF3N02HD CONNECTOR #2 R7 0.1Ω R9** VID VON1 VLKO FAULT 1 WAVEFORM SHOWN WITH C3 VFAULT1 VR1 VIH VIL VIH VGATE1 t1 VON2 t9 VFAULT2 t7 VR7 t8 VGATE2 1647-1/2/3 F13 FAULT 2 WAVEFORM SHOWN WITHOUT C6 Figure 13. VID Power Controller with Fault Status and Retry Sequence 18 U Q1 1/2 MMDF3N02HD DEVICE #1 R3** R2 10Ω W U U + CLOAD* R4** 1394 PHY AND/OR USB PORT 6 GATE 1 C1 10nF LTC1647-2 * GATE 2 5 R8 10Ω CLOAD IS USER-SELECTED BASED ON THE DEVICE REQUIREMENTS ** R3, R4, R7 AND R8 ARE OPTIONAL DISCHARGE RESISTORS WHEN DEVICES ARE POWERED-OFF Q1, Q2: ON SEMICONDUCTOR C4 10nF DEVICE #2 + CLOAD* R10** 1394 PHY AND/OR USB PORT VLKO – VLKH t4 t5 t2 t3 t10 t6 t11 LTC1647-1/LTC1647-2/LTC1647-3 PACKAGE DESCRIPTIO U Dimensions in inches (millimeters) unless otherwise noted. GN Package 16-Lead Plastic SSOP (Narrow 0.150) (LTC DWG # 05-08-1641) 0.189 – 0.196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 0.009 (0.229) REF 0.229 – 0.244 (5.817 – 6.198) 0.150 – 0.157** (3.810 – 3.988) 1 0.015 ± 0.004 × 45° (0.38 ± 0.10) 0.007 – 0.0098 (0.178 – 0.249) 0.016 – 0.050 (0.406 – 1.270) * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0° – 8° TYP 0.053 – 0.068 (1.351 – 1.727) 23 4 56 7 8 0.004 – 0.0098 (0.102 – 0.249) 0.008 – 0.012 (0.203 – 0.305) 0.0250 (0.635) BSC GN16 (SSOP) 1098 S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.228 – 0.244 (5.791 – 6.197) 0.150 – 0.157** (3.810 – 3.988) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0°– 8° TYP 2 3 4 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) BSC SO8 1298 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC1647-1/LTC1647-2/LTC1647-3 TYPICAL APPLICATIO Hot Swapping Two Supplies Two separate supplies can be independently controlled by using the LTC1647-3. In some applications, sequencing between the two power supplies is a requirement. For example, it may be necessary to ramp-up one supply first before allowing the second supply to power-up, as well as requiring that this same supply ramp-down last on powerdown. Figure 14’s circuit illustrates how to program the delays between the two pass transistors using the ON1 5V SUPPLY R3 100Ω R4 4.7k ON1 ON2 2 VCC1 CONNECTOR R5 10k R6 10k 3 4 5 8 ON1 FAULT 1 ON2 FAULT 2 GND VCC2 16 SENSE 2 14 R8 100Ω R10 0.02Ω GATE 2 12 R9 10Ω C3 10nF LTC1647-3 FAULT GND R7 12k 12V SUPPLY Q2 IRF7413 RELATED PARTS PART NUMBER LTC1421 LTC1422 LT1640L/LT1640H LT1641 LT1642 LTC1643L/LTC1643H LT1645 DESCRIPTION 2-Channel Hot Swap Controller Hot Swap Controller in SO-8 Negative Voltage Hot Swap Controller in SO-8 High Voltage Hot Swap Controller in SO-8 Fault Protected Hot Swap Controller PCI-Bus Hot Swap Controller 2-Channel Hot Swap Controller COMMENTS 24-Pin, Operates from 3V to 12V and Supports –12V System Reset Output with Programmable Delay Operates from –10V to –80V Operates from 9V to 80V Operates Up to 16.5V, Protected to 33V 3.3V, 5V and ± 12V in Narrow 16-Pin SSOP Operates from 1.2V to 12V, Power Sequencing 1647f LT/TP 0100 4K • PRINTED IN USA 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com U and ON2 pins (time events t1 to t4). t5 and t7 show both channels being switched on simultaneously where sequencing is not crucial. Some applications require that both channels be gated off if a fault occurs in one channel. This is accomplished in Figure 14 by using a crisscross FAULT-to-SENSE arrangement of R3/R4 and R7/R8. t6 and t9 illustrate the circuit’s operation. R1 0.01Ω Q1 IRF7413 + R2 10Ω VOUT1 (5A) CLOAD VR1 C1 10nF t6 VR10 t9 VON1 t2 VON2 t1 VOUT1 t4 t5 t7 t8 t3 1 15 SENSE 1 13 GATE 1 VOUT2 1647-1/2/3 F14 + VOUT2 (2.5A) CLOAD Figure 14. Hot Swapping Two Supplies © LINEAR TECHNOLOGY CORPORATION 1999