LTC2624IGN

LTC2604/LTC2614/LTC2624 Quad 16-Bit Rail-to-Rail DACs in 16-Lead SSOP FEATURES s DESCRIPTIO s s s s s s s s s Smallest Pin Compatible Quad 16-Bit DAC: LTC2604: 16-Bits LTC2614: 14-Bits LTC2624: 12-Bits Guaranteed 16-Bit Monotonic Over Temperature Separate Reference Inputs for each DAC Wide 2.5V to 5.5V Supply Range Low Power Operation: 250µA per DAC at 3V Individual DAC Power-Down to 1µA, Max Ultralow Crosstalk Between DACs ( 1GΩ) when the corresponding DACs are powered down. Normal operation can be resumed by executing any command which includes a DAC update, as shown in Table 1. The selected DAC is powered up as its voltage output is updated. When a DAC which is in a powered-down state is powered up and updated, normal settling is delayed. If less than four DACs are in a powered-down state prior to the update command, the power-up delay time is 5µs. If on the 2604f 11 LTC2604/LTC2614/LTC2624 OPERATIO other hand, all four DACs are powered down, then the main bias generation circuit block has been automatically shut down in addition to the individual DAC amplifiers and reference inputs. In this case, the power up delay time is 12µs (for VCC = 5V) or 30µs (for VCC = 3V). Voltage Outputs Each of the four rail-to-rail amplifiers contained in these parts has guaranteed load regulation when sourcing or sinking up to 15mA at 5V (7.5mA at 3V). Load regulation is a measure of the amplifier’s ability to maintain the rated voltage accuracy over a wide range of load conditions. The measured change in output voltage per milliampere of forced load current change is expressed in LSB/mA. DC output impedance is equivalent to load regulation, and may be derived from it by simply calculating a change in units from LSB/mA to Ohms. The amplifiers’ DC output impedance is 0.025Ω when driving a load well away from the rails. When drawing a load current from either rail, the output voltage headroom with respect to that rail is limited by the 30Ω typical channel resistance of the output devices; e.g., when sinking 1mA, the minimum output voltage = 30Ω • 1mA = 25mV. See the graph Headroom at Rails vs Output Current in the Typical Performance Characteristics section. The amplifiers are stable driving capacitive loads of up to 1000pF. Board Layout The excellent load regulation and DC crosstalk performance of these devices is achieved in part by keeping “signal” and “power” grounds separate. 12 U The PC board should have separate areas for the analog and digital sections of the circuit. This keeps digital signals away from sensitive analog signals and facilitates the use of separate digital and analog ground planes which have minimal capacitive and resistive interaction with each other. Digital and analog ground planes should be joined at only one point, establishing a system star ground as close to the device’s ground pin as possible. Ideally, the analog ground plane should be located on the component side of the board, and should be allowed to run under the part to shield it from noise. Analog ground should be a continuous and uninterrupted plane, except for necessary lead pads and vias, with signal traces on another layer. The GND pin functions as a return path for power supply currents in the device and should be connected to analog ground. Resistance from the GND pin to system star ground should be as low as possible. When a zero scale DAC output voltage of zero is desired, the REFLO pin (pin 2) should be connected to system star ground. Rail-to-Rail Output Considerations In any rail-to-rail voltage output device, the output is limited to voltages within the supply range. Since the analog outputs of the device cannot go below ground, they may limit for the lowest codes as shown in Figure 3b. Similarly, limiting can occur near full scale when the REF pins are tied to VCC. If REF x = VCC and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC as shown in Figure 3c. No fullscale limiting can occur if REF x is less than VCC – FSE. Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. 2604f OPERATIO SCK 2 7 17 D7 2604 F02a 1 10 13 D11 DATA WORD D10 D9 D8 D6 D5 D4 D3 D2 D1 D0 14 21 23 D14 D13 D12 11 12 18 24 16 20 22 C1 ADDRESS WORD C0 A3 A2 A1 A0 D15 3 4 5 6 8 9 15 19 SDI C3 C2 COMMAND WORD 24-BIT INPUT WORD Figure 2a. LTC2604 24-Bit Load Sequence (Minimum Input Word) LTC2614 SDI Data Word: 14-Bit Input Code + 2 Don’t Care Bits LTC2624 SDI Data Word: 12-Bit Input Code + 4 Don’t Care Bits CS/LD 6 7 14 17 D15 D14 D13 D12 D11 D10 A2 ADDRESS WORD C0 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 A1 A0 X COMMAND WORD X X X C3 C2 C1 X C3 C2 C1 C0 A3 8 9 10 13 21 11 12 18 16 20 22 15 19 X 23 D9 24 D8 25 D7 DATA WORD D8 D7 D6 D5 D4 D3 D2 D1 D0 26 D6 27 D5 28 D4 29 D3 30 D2 31 D1 32 D0 SCK 1 2 3 4 5 SDI X X X X X DON’T CARE SDO X X X X X PREVIOUS 32-BIT INPUT WORD t1 t2 SCK 17 t3 SDI SDO D15 t8 PREVIOUS D15 PREVIOUS D14 t4 D14 18 CURRENT 32-BIT INPUT WORD 2604 F02b Figure 2b. LTC2604 32-Bit Load Sequence LTC2614 SDI/SDO Data Word: 14-Bit Input Code + 2 Don’t Care Bits LTC2624 SDI/SDO Data Word: 12-Bit Input Code + 4 Don’t Care Bits U LTC2604/LTC2614/LTC2624 CS/LD 13 2604f LTC2604/LTC2614/LTC2624 OPERATIO OUTPUT VOLTAGE 0 32, 768 INPUT CODE (a) 65, 535 0V NEGATIVE OFFSET INPUT CODE (b) Figure 3. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Codes Near Full Scale 14 U VREF = VCC POSITIVE FSE VREF = VCC OUTPUT VOLTAGE OUTPUT VOLTAGE INPUT CODE (c) 2604 F03 2604f LTC2604/LTC2614/LTC2624 PACKAGE DESCRIPTIO .254 MIN .0165 ± .0015 RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0° – 8° TYP .0532 – .0688 (1.35 – 1.75) 23 4 56 7 8 .004 – .0098 (0.102 – 0.249) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .045 ± .005 .189 – .196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .150 – .157** (3.810 – 3.988) .0250 BSC .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 2604f 15 LTC2604/LTC2614/LTC2624 TYPICAL APPLICATIO 70MHz IN 5V 2.74k 1% LO 100k 100k 2.74k 1% Q INPUT 5V 2.74k 1% 2.74k 1% *ZETEX (516) 543-7100 Figure 4. Using DAC A and DAC B for Nearly Continuous Attenuation Control and DAC C and DAC D to Trim for Minimum LO Feedthrough in a Mixer. RELATED PARTS PART NUMBER LTC1458/LTC1458L LTC1654 LTC1655/LTC1655L LTC1657/LTC1657L LTC1660/LTC1665 LTC1821 LTC2600/LTC2610/LTC2620 LTC2602/LTC2612/LTC2622 DESCRIPTION Quad 12-Bit Rail-to-Rail Output DACs with Added Functionality Dual 14-Bit Rail-to-Rail VOUT DAC Single 16-Bit VOUT DAC with Serial Interface in SO-8 Parrallel 5V/3V 16-Bit VOUT DAC Octal 8/10-Bit VOUT DAC in 16-Pin Narrow SSOP Parallel 16-Bit Voltage Output DAC Octal 16-/14-/12-Bit Rail-to-Rail DACs in 16-Lead SSOP Dual 16-/14-/12-Bit Rail-to-Rail DACs in 8-Lead MSOP COMMENTS LTC1458: VCC = 4.5V to 5.5V, VOUT = 0V to 4.096V LTC1458L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V Programmable Speed/Power, 3.5µs/750µA, 8µs/450µA VCC = 5V(3V), Low Power, Deglitched Low Power, Deglitched, Rail-to-Rail VOUT VCC = 2.7V to 5.5V, Micropower, Rail-to-Rail Output Precision 16-Bit Settling in 2µs for 10V Step 250µA per DAC, 2.5V to 5.5V Supply Range 300µA per DAC, 2.5V to 5.5V Supply Range 2604f LT/TP 0304 1K • PRINTED IN THE USA 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q U 5V 1k 10k 0.1µF 10k 0.01µF 20Ω 47pF ZC830 49.9Ω 20pF 49.9Ω ZC830 10pF 0.1µF 10k 49.9Ω 0.01µF OUT 5V 1k 10k DAC A OPTIONAL DAC C 20k 0.1µF CS/LD SCK SDI LTC2604 5V 2.74k 1% DAC D 20k 0.1µF DAC B OPTIONAL 90° 2.74k 1% I+Q MODULATOR 5V 0° 2.74k 1% 2.74k 1% 2604 F04 I INPUT RF www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004