LTC2954ITS8-1

LTC2954 Push Button On/Off Controller with μP Interrupt U SHORT PULSE LONG PULSE STAYS ON TURNS OFF INTERRUPT INTERRUPT 2954 TD01b 2954 TA01 FEATURES ■ ■ ■ ■ DESCRIPTIO ■ ■ ■ ■ ■ ■ Adjustable Power On/Off Timers Low Supply Current: 6µA Wide Operating Voltage Range: 2.7V to 26.4V Low Leakage EN Output (LTC2954-1) Allows DC/DC Converter Control High Voltage EN Output (LTC2954-2) Allows Circuit Breaker Control Simple Interface Allows Graceful µP Shut Down High Input Voltage PB Pin with Internal Pull Up Resistor ±10kV ESD HBM on PB Input Accurate 0.6V Threshold on KILL Comparator Input 8-Pin 3mm × 2mm DFN and ThinSOTTM Packages The LTC®2954 is a push button On/Off controller that manages system power via a push button interface. An enable output toggles system power while an interrupt output provides debounced push button status. The interrupt output can be used in menu driven applications to request a system power down. A power kill input allows a microprocessor or system to reset the enable output, effectively powering down the system. Independently adjustable On and Off timers allow dependable push button control of the enable output and resistance to accidental toggling of system power. The LTC2954 operates over a wide 2.7V to 26.4V input voltage range to accommodate a wide variety of input power supplies. Very low quiescent current (6µA typical) makes the LTC2954 ideally suited for battery powered applications. Two versions of the part are available to accommodate either positive or negative enable polarities. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. APPLICATIO S ■ ■ ■ ■ ■ Push Button Power Path Control Portable Instrumentation Meters Blade Servers Portable Customer Service PDA Desktop and Notebook Computers + 9V 100k VIN LTC2954-2 PB GND ONT EN INT KILL PDT 1µ F tPDT = 6.4 SECONDS U TYPICAL APPLICATIO U Push Button On/Off with Interrupt VIN VOUT DC/DC 100k PB TURN ON PULSE EN 10k INT KILL µP/µC INT TURNS ON 2954f 1 LTC2954 (Note 1) Supply Voltage (VIN) ..................................– 0.3V to 33V Input Voltages PB ............................................................– 6V to 33V ONT ......................................................– 0.3V to 2.7V PDT.......................................................– 0.3V to 2.7V KILL .........................................................– 0.3V to 7V Output Voltages INT .........................................................– 0.3V to 10V EN/EN ....................................................– 0.3V to 33V TOP VIEW GND 1 ONT 2 PB 3 VIN 4 9 8 7 6 5 INT EN/EN PDT KILL TOP VIEW VIN 1 PB 2 ONT 3 GND 4 8 KILL 7 PDT 6 EN/EN 5 INT DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 165°C/W EXPOSED PAD (PIN 9) UNCONNECTED ORDER PART NUMBER LTC2954CDDB-1 LTC2954CDDB-2 LTC2954IDDB-1 LTC2954IDDB-2 DDB PART MARKING* LCJG LCNJ LCJG LCNJ Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. ELECTRICAL CHARACTERISTICS SYMBOL VIN IIN VUVL VUVL(HYST) PARAMETER Supply Voltage Range VIN Supply Current VIN Undervoltage Lockout VIN Undervoltage Lockout Hysteresis PB Voltage Range The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.7V to 26.4V, unless otherwise noted. (Note 2) CONDITIONS Steady State Operation System Power On, VIN = 2.7V to 24V VIN Falling ● ● ● Push Button, Enable (PB, EN/EN)) VPB(MIN, MAX) Single-Ended ● 2 U PACKAGE/ORDER I FOR ATIO W U U WW W ABSOLUTE AXI U RATI GS Operating Temperature Range LTC2954C-1 .............................................. 0°C to 70°C LTC2954C-2 .............................................. 0°C to 70°C LTC2954I-1 .......................................... – 40°C to 85°C LTC2954I-2 .......................................... – 40°C to 85°C Storage Temperature Range DFN Package..................................... – 65°C to 125°C TSOT-23............................................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 125°C, θJA = 140°C/W ORDER PART NUMBER LTC2954CTS8-1 LTC2954CTS8-2 LTC2954ITS8-1 LTC2954ITS8-2 TS8 PART MARKING* LTCJH LTCNK LTCJH LTCNK MIN 2.7 TYP 6 MAX 26.4 12 2.5 700 UNITS V µA V mV 2.2 50 2.3 400 –1 26.4 V 2954f LTC2954 ELECTRICAL CHARACTERISTICS SYMBOL IPB PARAMETER PB Input Current The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.7V to 26.4V, unless otherwise noted. (Note 2) CONDITIONS 2.5V < VPB < 26.4V VPB = 1V VPB = 0.6V PB Falling IPB = – 1µA Enable Released → Enable Asserted VEN/ EN = 1V, Sink Current Off VEN/ EN = 26.4V, Sink Current Off IEN/ EN = 500µA VONT = 0V VONT = 1.3V ONT Pin Float, PB Falling → Enable Asserted ● ● ● ● ● ● ● ● MIN –1 –3 0.6 1 200 TYP –6 –9 0.8 1.6 256 MAX ±1 –12 – 15 1 2 325 ±0.1 ±1 UNITS µA µA µA V V ms µA µA V µA µA ms ms µA µA ms ms ms ms ms µA V V mV µA µs µs ms VPB(VTH) VPB(VOC) tEN, Lock Out IEN(LKG) VEN(VOL) IONT(PU) IONT(PD) tDB, ON tONT PB Input Threshold PB Open Circuit Voltage  EN/EN Lock Out Time (Note 5)  EN/EN Leakage Current  EN/EN Voltage Output Low ONT Pull Up Current ONT Pull Down Current Internal Turn On Debounce Time 0.11 –2.4 2.4 26 9 –2.4 2.4 26 52 9 26 35 –3 3 32 11.5 –3 3 32 64 11.5 32 43.5 0.4 –3.6 3.6 41 13.5 –3.6 3.6 41 82 13.5 41 54.5 ±1 Power On Timing Pin (ONT) ● ● ● ● Additional Adjustable Turn On Time CONT = 1500pF Power Down Timing Pin (PDT) IPDT(PU) IPDT(PD) tDB, OFF tPD, Min tPDT t INT, Min t INT, Max IINT(LKG) VINT(VOL) VKILL(TH) VKILL(HYST) IKILL(LKG) t KILL(PW) t KILL(PD) t KILL, On Blank PDT Pull Up Current PDT Pull Down Current Turn Off Interrupt Debounce Time Internal PB Power Down DebounceTime (Note 4) Additional Adjustable PB Power Down Debounce Time Minimum INT Pulse Width Maximum INT Pulse Width INT Leakage Current INT Output Voltage Low KILL Input Threshold Voltage KILL Input Threshold Hysteresis KILL Leakage Current KILL Minimum Pulse Width KILL Propagation Delay KILL Turn On Blanking (Note 3) KILL Falling → Enable Released KILL = Low, Enable Asserted → Enable Released V KILL = 0.6V VPDT = 0V VPDT = 1.3V PB Falling → INT Falling PDT Pin Float, PB Falling → Enable Released CPDT = 1500pF INT Asserted → INT Released  CPDT = 1500pF, INT Asserted → INT Released V INT = 3V I INT = 3mA KILL Falling ● ● ● ● ● ● ● µP Handshake Pins (INT, KILL) ● ● ● ● ● ● ● ● 0.11 0.57 10 30 0.6 30 0.4 0.63 50 ±0.1 30 400 512 650 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted.    Note 3: The KILL turn on blanking timer period is the waiting period immediately after the enable output is asserted. This blanking time allows sufficient time for the DC/DC converter and the µP to perform power up        tasks. The KILL and PB inputs are ignored during this period. If KILL remains low at the end of this time period, the enable output is released, thus turning off system power. This time delay does not include tDB, ON or tONT. Note 4: To manually force an immediate release of the EN/EN pin, the push button input must be held low for at least tPD,Min (internal default power down timer) + tPDT (adjustable by placing external capacitor at PDT pin). Note 5: The enable lock out time is designed to allow an application to properly power down such that the next power up sequence starts from a consistent powered down configuration. PB is ignored during this lock out time. This time delay does not include tDB, ON or tONT. 2954f 3 LTC2954 TYPICAL PERFOR A CE CHARACTERISTICS Supply Current vs Temperature 10 VIN = 26.4V 8 VIN = 3.3V IVIN (µA) VIN = 2.7V 4 12 T = 85°C 9 T = –40°C 6 tDB, ON (ms) 30 T = 25°C 40 15 IVIN (µA) 6 2 0 –50 –25 0 25 50 TEMPERATURE (°C) 10000 Turn On Debounce Time (tDB, ON + tONT) vs ONT External Capacitance TA = 25°C VIN = 3.3V ONT PULL-UP CURRENT (µA) tDB, ON + tONT (ms) 1000 tDB, OFF (ms) 100 10 1 100 10 ONT EXTERNAL CAPACITANCE (nF) Internal Default PB Power Down Debounce Time (tPD, Min) vs VIN 70 60 50 tPD, MIN (ms) 40 30 20 10 0 0 5 10 15 VIN (V) 20 25 30 2954 G14 PDT PULL-UP CURRENT (µA) TA = 25°C tPD, MIN + tPDT (ms) 1000 4 UW 75 2954 G01 2954 G04 Supply Current vs Supply Voltage 50 Internal Default Turn On Debounce Time (tDB, ON) vs VIN TA = 25°C 20 3 10 0 100 0 0 5 10 15 20 25 30 35 0 5 10 VIN (V) 2954 G02 15 VIN (V) 20 25 30 2954 G03 ONT Pull-Up Current vs Temperature –3.4 50 Turn Off Debounce Time (tDB, OFF) vs VIN TA = 25°C –3.2 VIN = 26.4V –3.0 VIN = 2.7V –2.8 40 30 20 10 1000 –2.6 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 2954 G05 0 0 5 10 15 VIN (V) 20 25 30 2954 G06 PB Power Down Debounce Time  (tPD, Min + tPDT) vs PDT External Capacitance 10000 TA = 25°C VIN = 3.3V –3.4 PDT Pull-Up Current vs Temperature –3.2 VIN = 26.4V –3.0 VIN = 2.7V –2.8 100 10 1 100 10 PDT EXTERNAL CAPACITANCE (nF) 1000 –2.6 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 2954 G08 2954 G07 2954f LTC2954 TYPICAL PERFOR A CE CHARACTERISTICS –250 PB Current vs PB Voltage  TA = 25°C VIN = 3.3V –200 PB VOLTAGE (mV) PB CURRENT (µA) –150 –100 –50 0 –10 –5 600 500 EN/EN VOLTAGE (mV) 400 300 200 100  EN/EN VOL vs Current Load TA = 25°C VIN = 3.3V EN (V) EN (V) 0 0.0 0.5 1.5 2.0 1.0 EN/EN CURRENT LOAD (mA) UW 0 2954 G11 300 250 200 150 100 50 0 PB Voltage vs External PB Resistance to Ground VIN = 3.3V TA = 100°C TA = 25°C TA = –45°C 5 10 15 PB VOLTAGE (V) 20 25 30 0 5 10 15 20 EXTERNAL PB RESISTANCE TO GROUND (kΩ) 2954 G10 2954 G09 1.0 EN (LTC2954-1) Voltage vs VIN TA = 25°C 100k PULL-UP FROM EN TO VIN 4 EN (LTC2954-2) Voltage vs VIN TA = 25°C 100k PULL-UP FROM EN TO VIN 0.8 3 0.6 2 0.4 1 0.2 2.5 0 0 1 2 VIN (V) 3 4 2954 G12 0 0 1 2 VIN (V) 3 4 2954 G13 2954f 5 LTC2954 PI FU CTIO S U U U (TSOT-23/DFN) released low if: a) KILL is not driven high (by μP) within 512ms of the initial valid PB power turn-on event, b) KILL is driven low during normal operation, c) PB is pressed and held low (tPD, Min + tPDT) during normal operation. The operating range for this low leakage pin is 0V to 26.4V. EN (LTC2954-2, Pin 6/Pin 7): Open Drain Enable Bar Output. This pin is intended to enable system power. EN is asserted low after a valid PB turn-on event (tDB, ON + tONT).     EN releases high if: a) KILL is not driven high (by μP) within 512ms of the initial valid PB power turn-on event, b) KILL is driven low during normal operation, c) PB is pressed and held low (tPD, Min + tPDT) during normal operation. The operating range of this pin is 0V to 26.4V. PDT (Pin 7/Pin 6): Power Down Time Input. A capacitor to ground determines the additional time (6.4 seconds/µF) that the push button must be held low before immediately releasing the EN/EN and INT outputs. Floating this pin results in a push button power down time of 64ms. KILL (Pin 8/Pin 5): Kill Input. Forcing KILL low releases the  enable output. During system turn on, this pin is blanked by a 512ms internal timer (tKILL, ON BLANK) to allow the system to pull KILL high. This pin has an accurate 0.6V threshold and can be used as a voltage monitor input. Exposed Pad (Pin 9 DFN Only): Exposed Pad may be left open or connected to device ground. VIN (Pin 1/Pin 4): Power Supply Input: 2.7V to 26.4V. PB (Pin 2/Pin 3): Push Button Input. Connecting PB to  ground through a momentary switch provides On/Off control via the EN/EN and INT outputs. An internal 100k pull-up resistor connects to an internal 1.9V bias voltage. The rugged PB input withstands ±10kV ESD HBM and can be pulled up to 26.4V externally without consuming extra current. ONT (Pin 3/Pin 2): Turn On Time Input. Placing an external capacitor to ground determines the additional time (6.4 seconds/µF) the PB pin must be held low before the enable output is asserted. Floating this pin results in a default turn on debounce time of 32ms. GND (Pin 4/Pin 1): Device Ground.   INT (Pin 5/Pin 8): Open Drain Interrupt Output. After a push button turn off event is detected (tDB,OFF), the LTC2954 interrupts the system (µP) by asserting the INT pin low. The µP would perform power down and housekeeping tasks and then assert the KILL pin low, thus releasing the enable output. The INT pulse width is a minimum of 32ms and stays low as long as PB is asserted. If PB is asserted for longer than tPD,Min + tPDT, the INT and EN/EN outputs are immediately released. EN (LTC2954-1, Pin 6/Pin 7): Open Drain Enable Output. This pin is intended to enable system power. EN is asserted high after a valid PB turn on event (tDB,ON + tONT). EN is 2954f 6 LTC2954 W HIGH VOLTAGE VIN 2.7V TO 26.4V 1.5k 29V ZENER REGULATOR 2.4V EN (–1) EN (–2) OSCILLATOR LOGIC 10µS FILTER 0.8V OSCILLATOR INT DEBOUNCE 0.6V KILL 2954 BD BLOCK DIAGRA 2.4V 100k PB GND ONT PDT TI I G DIAGRA S W UW tKILL(PW) KILL tKILL(PD) EN/EN 2954 TD01 2954f 7 LTC2954 TI I G DIAGRA S PB tDB, ON tONT EN (LTC2954-1) 2954 TD02 PB tDB, OFF PDT INT tINT, Min PB tDB, OFF PDT INT tINT, Max EN (LTC2954-1) 2954 TD04 Forced Off, Power Down Timing, PB Pressed and Held Low for t > (tPD, Min + tPDT) 2954f 8 W UW PB & KILL IGNORED tKILL, ON BLANK 16 CYCLES Power On Timing PB IGNORED t < tPDT tPD, Min 2954 TD03 Off Interrupt Timing, PB Pressed and Released, Enable Remains Active PB IGNORED 16 CYCLES tPD, Min tPDT LTC2954 Description The LTC2954 is a push button On/Off controller that provides control of system power via a push button interface. An enable output toggles system power while an interrupt output provides debounced push button status. The interrupt output can be used in menu driven applications to request a system power down. A power kill input allows a microprocessor or system to release the enable output, effectively powering down the system. Independently adjustable On and Off timers allow dependable push button control of the enable output and resistance to accidental toggling of system power. The length of time the push button input (PB) must be held low in order to toggle the enable (EN/EN) output on and off is independently adjustable with external capacitors at the ONT/PDT pins, respectively. During normal operation, the interrupt output (INT) is asserted 32ms after PB goes low. INT then tracks PB until either PB or EN/EN is released. See Timing Diagrams on page 8. The KILL input is used to immediately release the enable output. During a normal power down sequence, INT requests a system power down. The µP then performs its housekeeping tasks and then sets KILL low. If the µP fails to set KILL low, the user can force a system shutdown by pressing and holding the push button until the PDT timer expires. Turn On When power is first applied to the LTC2954, the part initializes the output pins. Any DC/DC converters connected to the EN/EN pin will therefore be held off. To assert the enable output, PB must be held low for a minimum of 32ms (tDB, ON). The LTC2954 provides additional turn on debounce time (tONT) via an optional capacitor connected to the ONT pin. The following equation describes the additional time that PB must be held low before asserting the enable output. CONT is the ONT external capacitor (µF): CONT = 1.56 × 10-4 [μF/ms] • (tONT – 1ms) Once the enable output is asserted, any DC/DC converters connected to this pin are turned on. The KILL input from the µP is ignored during a succeeding 512ms blanking time (t KILL, ON BLANK). This blanking time represents the U maximum time required to power up the DC/DC converter and the µP. If KILL is not brought high during this 512ms time window, the enable output is released. The assumption is that 512ms is sufficient time for the system to power up. Turn Off To initiate a power down sequence, assert the INT output low by pressing the push button for a minimum of 32ms (tDB,OFF). The interrupt signal serves as a power down request to the µP. The µP would then perform power down and housekeeping tasks and assert KILL low when done. This in turn releases the enable output, thus shutting off system power. Adjustable Power Down Timer The LTC2954 provides a failsafe feature that allows the user to turn off system power (via PB) under system fault conditions. For cases when the µP fails to respond to the interrupt signal, the user can force an immediate power down by pressing and holding down the push button. The length of time that PB must be held low is given by a fixed internal 64ms delay (tPD,Min) plus an adjustable power down timer delay (tPDT, see timing diagram on page 8). The adjustable delay is set by placing an optional external capacitor on the PDT pin. Use the following equation to calculate the capacitance for the desired delay. CPDT is the PDT external capacitor (µF): CPDT = 1.56 × 10-4 [µF/ms] • (tPDT – 1ms) Simplified Power On/Off Sequence Figure 1 shows a simplified LTC2954-1 power on and power  off sequence. A high to low transition on PB (t1) initiates the power on sequence. In order to assert the enable output, the PB pin must stay low continuously (PB high resets timers) for a time controlled by the default 32ms and the external ONT capacitor (t2–t1). Once EN goes high (t2), an internal 512ms blanking timer is started. This blanking timer is designed to give sufficient time for the DC/DC converter to reach its final voltage, and to allow the µP enough time to perform power on tasks. The KILL pin must be pulled high within 512ms of the EN pin going high. Failure to do so results in the EN pin going 2954f APPLICATIO S I FOR ATIO W U U 9 LTC2954 U t4 t5 t6 t7 t8 t9 PB IGNORED tDB, OFF tPD, MIN INT t < tPDT KILL XXX DON'T CARE APPLICATIO S I FOR ATIO t1 PB tDB, ON ONT tONT PDT EN 2954 F01 Figure 1. Simplified Power On/Off Sequence for LTC2954-1. μP Asserts KILL after an Interrupt POWER ON TIMING POWER TURNED OFF EN Figure 2. KILL Remaining Low Aborts Power On Sequence for LTC2954-1 10 W t2 U U t3 PB & KILL IGNORED tKILL, ON BLANK µP DRIVES KILL LOW tABORT PB tDB, ON + tONT 512ms INTERNAL TIMER µP FAILED TO SET KILL HIGH KILL 2954 F02 2954f LTC2954 low 512ms after it went high. Note that the LTC2954 does     not sample KILL and PB until after the 512ms internal timer has expired. The reason PB is ignored is to ensure that the system is not forced off while powering on. Once the 512ms timer expires (t4), the release of the PB pin is then debounced with an internal 32ms timer. The system has now properly powered on and the LTC2954 monitors PB and KILL for a turnoff command while consuming only 6µA of supply current.  A high to low transition on PB (t5) starts the power off sequence debounce timer. In order to assert the interrupt output (INT), PB must stay low continuously (PB high resets debounce timer) for 32ms (t6–t5). At the completion of the power down debounce timer (t6), an internal interrupt timer keeps the interrupt output low for at least 32ms, even if PB is released between t6 and t7. If PB is low at the end of this 32ms internal timer (t7), the external adjustable power down timer is started. The capacitor placed at the PDT pin will determine the time period of this timer. If the push button is released prior to 16 cycles of the PDT pin, the interrupt output will go high (t8). Note that the enable output is not directly changed by this interrupt pulse. The function of the interrupt signal is to initiate a software shutdown. At t9, the µP has performed its power down functions and asserted the KILL input low. This releases the enable output, which in turn shuts down system power. Note that if the push button is held long enough to count 16 cycles at the PDT pin, the enable pin would be released immediately after the 16th cycle. The tKILL PB DC/DC TURNS OFF EN DC/DC TURNS OFF PB BLANKING (INTERNAL SIGNAL) EN 256ms µP SETS KILL LOW KILL XXX DON’T CARE 2954 F03 Figure 3. µP Turns Off Power (LTC2954-1) U system is now in its reset state where the LTC2954 is in low power mode (6µA) and PB is monitored for a high to low transition. Aborted Power On Sequence The power on sequence is aborted when the KILL remains low at the end of the 512ms blanking time. Figure 2 is a simplified version of an aborted power on sequence. At time tABORT, since KILL is still low, EN pulls low (thus turning off the DC/DC converter). µP Turns Off Power During Normal Operation Once the system has powered on and is operating normally, the µP can turn off power by setting KILL low, as shown in (Figure 3). At time t KILL, KILL is set low by the µP. This immediately pulls EN low, thus turning off the DC/DC converter. DC/DC Turn Off Blanking When the DC/DC converter is turned off, it can take a significant amount of time for its output to decay to ground. It is desirable to wait until the output of the DC/DC converter is near ground before allowing the user (via PB) to restart the converter. This condition guarantees that the µP has always powered down completely before it is restarted. Figure 4 shows the µP turning power off. After a low on KILL releases enable, the internal 256ms timer ignores the PB pin. This is shown as tEN/EN, LOCKOUT in (Figure 4). tEN/EN, Lockout PB POWER ON PB IGNORED APPLICATIO S I FOR ATIO W U U µP SETS KILL LOW KILL XXX DON’T CARE 2954 F04 Figure 4. DC/DC Turn Off Blanking (LTC2954-1) 2954f 11 LTC2954 LTC2954-1, LTC2954-2 Versions The LTC2954-1 (high true EN) and LTC2954-2 (low true EN) differ only by the polarity of the high voltage (33V ABS MAX), enable pin. The LTC2954-1 EN pin is a low leakage high true open drain output designed to drive the shutdown pin of DC/DC converters. The LTC2954-2 is a low leakage, low true open drain enable output designed to drive the gate of an external PFET. The LTC2954-2 provides a user manual power path control. High Voltage Pins The VIN, PB and EN/EN pins can operate at voltages up to 26.4V. PB can, additionally, operate below ground (–6V) TYPICAL APPLICATIO S Voltage Monitoring with KILL Input The KILL pin can be used as a voltage monitor. Figure 5 shows an application where the KILL pin has a dual function. It is driven by a low leakage open drain output of the µP. It is also connected to a resistive divider that monitors battery voltage (VIN). When the battery voltage falls below the set value, the voltage at the KILL pin falls below 0.6V and the EN pin is quickly pulled low. Note that the resistor values should be as large as possible, but small enough to keep leakage currents from tripping the 0.6V KILL comparator. VIN = 9V VIN R3 806k 1% R2 100k 1% R1 10k INT µP PB GND ONT VOUT 3.3V LT1767-3.3 SHDN C4 0.1µF VIN EN LTC2954-1 INT KILL PDT CONT* 0.033µF CPDT* 1µ F PB GND ONT KILL (OPEN DRAIN) 2954 F05 *OPTIONAL Figure 5. Input Voltage Monitoring with KILL Input 12 U without latching up the device. PB has an ESD HBM rating of ±10kV. If the push button switch connected to PB exhibits high leakage current, then an external pull-up resistor to VIN is recommended. Furthermore, if the push button switch is physically located far from the LTC2954 PB pin, parasitic capacitances may couple onto the high impedance PB input. Additionally, parasitic series inductance may cause unpredictable ringing at the PB pin. Placing a 5.1k resistor from the PB pin to the push button switch would mitigate parasitic inductance problems. Placing a 0.1µF capacitor on the PB pin would lessen the impact of parasitic capacitive coupling. The DC/DC converter shown has an internal pull-up current on its SHDN pin. A pull-up resistor on EN is thus not needed. Operation Without µP Figure 6 shows how to connect the KILL pin when there is no circuitry available to drive it. The minimum pulse width detected is 30µs. If there are glitches on the resistor pull-up voltage that are wider than 30µs and transition below 0.6V, then an appropriate bypass capacitor should be connected to the KILL pin. The optional CPDT external VIN = 9V VIN VOUT 3.3V LT1767-3.3 SHDN R1 100k C4 0.1µF VIN EN LTC2954-1 INT KILL PDT CONT* 0.033µF CPDT* 1 µF APPLICATIO S I FOR ATIO W U U U + *OPTIONAL C3* 0.01µF 2954 F06 Figure 6. No µP Application 2954f LTC2954 TYPICAL APPLICATIO S capacitor extends the length of time (beyond 64ms) that the PB input must be held low before releasing the enable output. High Voltage Power Path Switching The high voltage EN open drain output of the LTC2954-2 is designed to switch on/off an external power PFET. This allows a user to connect/disconnect a power supply (or battery) to its load by toggling the PB pin. Figure 7 shows the LTC2954-2 controlling a two cell Li-Ion battery application. The KILL pin is connected to the output of the PFET through a resistive divider. The KILL pin serves as a voltage monitor. When VOUT drops below 6V, causing a 4.2V SINGLE CELL Li-Ion BATTERY + C4 0.1µF CERAMIC VIN LTC2954-2 PB GND ONT EN INT KILL PDT CONT* 0.033µF 4.2V SINGLE CELL Li-Ion BATTERY + Figure 7. Power Path Control with 6V Under Voltage Detect PARASITICS TRACE CAPACITANCE NOISE TRACE INDUCTANCE C5 0.1µF R6 5.1k VIN PB LTC2954-1 EN INT KILL GND ONT PDT U KILL voltage below VKILL(TH), the EN pin becomes an open  circuit 30µs later. Since the PDT pin is open circuited, the power down debounce time defaults to 64ms. PB Pin in a Noisy Environment The rugged PB pin is designed to operate in noisy environments. Transients below ground (>–6V) and above VIN  (2µA), the PB voltage may fall close to the threshold window. To mitigate the effect of the board leakage, a 10k resistor to VIN is recommended (see Figure 9). 14 U Reverse Battery Protection To protect the LTC2954 from a reverse battery connection, place a 1k resistor in series with the VIN pin (see Figure 10). VIN R7 10k VIN LTC2954-1/ LTC2954-2 2.4V PB EXTERNAL BOARD LEAKAGE CURRENT >2µA 100k GND PINS OMITTED FOR CLARITY IF EXTERNAL PARASITIC BOARD LEAKAGE >2µA, USE EXTERNAL PULL-UP RESISTOR 2954 F09 Figure 9. External Pull-Up Resistor on PB Pin 2954f LTC2954 U (Reference LTC DWG # 05-08-1702 Rev B) 0.61 ± 0.05 (2 SIDES) 0.70 ± 0.05 2.55 ± 0.05 1.15 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ± 0.05 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF 2.00 ± 0.10 (2 SIDES) 0.56 ± 0.05 (2 SIDES) 0.75 ± 0.05 3.00 ± 0.10 (2 SIDES) R = 0.05 TYP R = 0.115 TYP 5 0.40 ± 0.10 8 PACKAGE DESCRIPTIO DDB Package 8-Lead Plastic DFN (3mm × 2mm) 4 0.25 ± 0.05 2.15 ± 0.05 (2 SIDES) 1 0.50 BSC PIN 1 R = 0.20 OR 0.25 × 45° CHAMFER (DDB8) DFN 0905 REV B RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0 – 0.05 BOTTOM VIEW—EXPOSED PAD (Reference LTC DWG # 05-08-1637) 0.52 MAX 0.65 REF 2.90 BSC (NOTE 4) TS8 Package 8-Lead Plastic TSOT-23 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.65 BSC 0.80 – 0.90 0.22 – 0.36 8 PLCS (NOTE 3) 0.20 BSC DATUM ‘A’ 1.00 MAX 0.01 – 0.10 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 2954f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC2954 U + VIN R8 1k R5 910k VOUT LT1761-1.8 SHDN 1.8V C4 0.1µF VIN LTC2954-1 PB GND ONT CONT* 0.033µF EN INT KILL PDT CPDT* 1µ F R1 10k INT KILL µP *OPTIONAL 2954 TA02 TYPICAL APPLICATIO 9V BATTERY Figure 10. Reverse Battery Protection RELATED PARTS PART NUMBER LTC2900 TC2909 LTC2910 LTC2914 LTC2950/LTC2951 LTC4411 LTC4412HV LTC4055 LT4351 DESCRIPTION Programmable Quad Supply Monitor Precision Triple/Dual Input UV, OV and Negative Voltage Monitor Octal Positive/Negative Voltage Monitor Quad UV/OV Positive/Negative Voltage Monitor Push Button On/Off Controllers 2.6A Low Loss Ideal Diode in ThinSOT Power Path Controller in ThinSOT MOSFET Diode-OR Controller COMMENTS Adjustable RESET, 10-Lead MSOP and 3mm x 3mm DFN Packages 6.5V Shunt Regulator for High Voltage Operation Eight Adjustable Inputs (0.5V) Adjustable UV and OV Trip Values High Voltage, Low Power Push Button Controller with Power Down Fault Detect KILL Timer No External MOSFET, Automatic Switching Between DC Sources Efficient Diode-ORing, Automatic Switching Between DC Sources, 3V to 36V Wide Input Range: 1.2V to 18V LLTC2904/LTC2905 Pin-Programmable Dual Supply Monitors Adjustable RESET and Tolerance, 8-Lead SOT-23 and 3mm x 2mm DFN Packages USB Power Controller and Li-Ion Charger Automatic Switchover, Charges 1-Cell Li-Ion Batteries 2954f 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● LT 0606 • PRINTED IN USA FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2006