LTC3723-1

FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ LTC3723-1/LTC3723-2 Synchronous Push-Pull PWM Controllers DESCRIPTIO The LTC®3723-1/LTC3723-2 synchronous push-pull PWM controllers provide all of the control and protection functions necessary for compact and highly efficient, isolated power converters. High integration minimizes external component count, while preserving design flexibility. The robust push-pull output stages switch at half the oscillator frequency. Dead-time is independently programmed with an external resistor. Synchronous rectifier timing is adjustable to optimize efficiency. A UVLO program input provides precise system turn-on and turn off voltages. The LTC3723-1 features peak current mode control with programmable slope compensation and leading edge blanking, while the LTC3723-2 employs voltage mode control with voltage feedforward capability. The LTC3723-1/LTC3723-2 feature extremely low operating and start-up currents. Both devices provide reliable short-circuit and overtemperature protection. The LTC3723-1/LTC3723-2 are offered in a 16-pin SSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. High Efficiency Synchronous Push-Pull PWM 1.5A Sink, 1A Source Output Drivers Supports Push-Pull, Full-Bridge, Half-Bridge, and Forward Topologies Adjustable Push-Pull Dead-Time and Synchronous Timing Adjustable System Undervoltage Lockout and Hysteresis Adjustable Leading Edge Blanking Low Start-Up and Quiescent Currents Current Mode (LTC3723-1) or Voltage Mode (LTC3723-2) Operation Single Resistor Slope Compensation VCC UVLO and 25mA Shunt Regulator Programmable Fixed Frequency Operation to 1MHz 50mA Synchronous Output Drivers Soft-Start, Cycle-by-Cycle Current Limiting and Hiccup Mode Short-Circuit Protection 5V, 15mA Low Dropout Regulator Available in 16-Pin SSOP Package APPLICATIO S ■ ■ Telecommunications, Infrastructure Power Systems Distributed Power Architectures TYPICAL APPLICATIO VIN Isolated Push-Pull Converter VOUT UVLO DRVA ME FROM AUXILIARY WINDING • SPRG VCC DRVB CS • SYNC LTC3901 MF VREF DPRG CT RLEB SDRA SDRB VREF LTC3723-1 VOUT VREF SS COMP FB GND U U U VOUT V+ COLL LT1431 GND-F GND-S RREF 372312 TA01 372312f 1 LTC3723-1/LTC3723-2 ABSOLUTE AXI U RATI GS VCC to GND (Low Impedance Source) .......– 0.3V to 10V (Chip Self-Regulates at 10.3V) UVLO to GND ............................................. – 0.3V to VCC All Other Pins to GND (Low Impedance Source) .........................– 0.3V to 5.5V VCC (Current Fed) ................................................. 40mA PACKAGE/ORDER I FOR ATIO TOP VIEW VREF SDRB SDRA DRVB VCC DRVA GND CT 1 2 3 4 5 6 7 8 16 SPRG 15 UVLO 14 SS 13 FB 12 RLEB 11 COMP 10 CS 9 DPRG GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 100°C/W ORDER PART NUMBER LTC3723EGN-1 GN PART MARKING 37231 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 9.5V unless otherwise noted. SYMBOL Input Supply VCCUV VCCHY ICCST ICCRN VSHUNT RSHUNT SUVLO SHYST ROS IRMP VCC Undervoltage Lockout VCC UVLO Hysteresis Start-Up Current Operating Current Shunt Regulator Voltage Shunt Resistance System UVLO Threshold System UVLO Hysteresis Current Ramp Offset Voltage Ramp Discharge Current Measured on VCC Measured on VCC VCC = VUVLO – 0.3V No Load on Outputs Current into VCC = 10mA Current into VCC = 10mA to 17mA Measured on UVLO Pin, 10mA into VCC Current Flows Out of UVLO Pin, 10mA into VCC Measured on COMP, RAMP = 0V RAMP = 1V, COMP = 0V, CT = 4V, 3723-1 Only 4.8 8.5 ● ELECTRICAL CHARACTERISTICS PARAMETER CONDITIONS Pulse Width Modulator 0.65 50 V mA 372312f 2 U U W WW U W (Note 1) VREF Output Current ............................... Self-Regulated Operating Temperature (Notes 5,6) LTC3723E ........................................... – 40°C to 85°C Storage Temperature Range ................. – 65°C to 125°C Lead Temperature (Soldering, 10sec)................... 300°C TOP VIEW VREF SDRB SDRA DRVB VCC DRVA GND CT 1 2 3 4 5 6 7 8 16 SPRG 15 UVLO 14 SS 13 FB 12 DPRG 11 COMP 10 CS 9 RAMP GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 100°C/W ORDER PART NUMBER LTC3723EGN-2 GN PART MARKING 37232 MIN TYP 10.25 MAX 10.7 230 8 10.8 3.5 5.2 11.5 UNITS V V µA mA V Ω V µA 3.8 4.2 145 3 10.3 1.4 5.0 10 LTC3723-1/LTC3723-2 The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 9.5V unless otherwise noted. SYMBOL ISLP DCMAX DCMIN DTADJ Oscillator OSCI OSCT OSCV VFB FBI AVOL IIB VOH VOL ISOURCE ISINK Reference VREF REFLD REFLN REFTV REFSC DRVH(x) DRVL(x) RDH(x) RDL(x) TDR(x) TDF(x) OUTH(x) OUTL(x) RHI(x) RLO(x) TR(x) TF(x) CLPP CLSD CLDEL Initial Accuracy Load Regulation Line Regulation Total Variation Short-Circuit Current Output High Voltage Output Low Voltage Pull-Up Resistance Pull-Down Resistance Rise-Time Fall-Time Output High Voltage Output Low Voltage Pull-Up Resistance Pull-Down Resistance Rise-Time Fall-Time Pulse by Pulse Current Limit Threshold Shutdown Current Limit Threshold Current Limit Delay to Output TA = 25°C, Measured on VREF Load on VREF = 100µA to 5mA VCC = 6.5V to 9.5V Line, Load and Temperature VREF Shorted to GND IOUT(x) = – 100mA IOUT(x) = 100mA IOUT(x) = – 10mA to –100mA IOUT(x) = – 10mA to –100mA COUT(x) = 1nF COUT(x) = 1nF IOUT(x) = – 30mA IOUT(x) = 30mA IOUT(x) = – 10mA to -30mA IOUT(x) = – 10mA to -30mA COUT(x) = 50pF COUT(x) = 50pF Measured on CS Measured on CS 100mV Overdrive on CS, (Note 2) 280 475 9.0 ● ELECTRICAL CHARACTERISTICS PARAMETER Slope Compensation Current Maximum Duty Cycle Minimum Duty Cycle Dead-Time Initial Accuracy VCC Variation CT Ramp Amplitude FB Input Voltage FB Input Range Open-Loop Gain Input Bias Current Output High Output Low Output Source Current Output Sink Current CONDITIONS Measured on CS, CT = 1V, 3723-1 Only CT = 2.25V COMP = 4.5V COMP = 0V ● ● MIN TYP 30 68 MAX UNITS µA µA 47 48.2 0 130 50 % % ns TA = 25°C, CT = 270pF VCC = 6.5V to 9.5V, Overtemperature Measured on CT COMP = 2.5V, (Note 3) Measured on FB, (Note 4) COMP = 1V to 3V, (Note 3) COMP = 2.5V, (Note 3) Load on COMP = –100µA Load on COMP = 100µA COMP = 2.5V COMP = 2.5V ● 220 –3 250 2.35 280 3 kHz % V Error Amplifier 1.172 – 0.3 70 4.7 400 2 4.925 90 5 4.92 0.27 700 5 5.00 2 1 4.900 18 9.0 5.000 30 9.2 0.17 2.9 1.7 10 10 9.2 0.44 11 15 10 10 300 600 80 320 725 0.6 15 20 0.6 4 2.5 5.075 15 10 5.100 45 0.5 50 1.2 1.22 2.5 V V dB nA V V µA mA V mV mV V mA V V Ω Ω ns ns V V Ω Ω ns ns mV mV ns 372312f Push-Pull Outputs Synchronous Outputs Current Limit and Shutdown 3 LTC3723-1/LTC3723-2 The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 9.5V unless otherwise noted. SYMBOL SSI SSR FLT PARAMETER Soft-Start Current Soft-Start Reset Threshold Fault Reset Threshold CONDITIONS SS = 2.5V Measured on SS Measured on SS MIN 10 0.7 4.5 TYP 13 0.4 4.2 MAX 16 0.1 3.5 UNITS µA V V ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Includes leading edge blanking delay, RLEB = 20k, not tested in production. Note 3: FB is driven by a servo loop amplifier to control VCOMP for these tests. Note 4: Set FB to –0.3V, 2.5V and insure that COMP does not phase invert. Note 5: The LTC3723E–1/LTC3723E-2 are guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. TYPICAL PERFOR A CE CHARACTERISTICS Start-Up ICC vs VCC 200 150 100 10.00 FREQUENCY (kHz) ICC (µA) VCC (V) 50 0 0 2 4 VCC (V) 6 Leading Edge Blanking Time vs RLEB 350 300 250 BLANK TIME (ns) VREF (V) 200 150 100 VREF (V) 50 0 0 10 20 30 40 50 60 RLEB (kΩ) 70 80 90 100 372312 G04 4 UW 8 (TA = 25°C unless otherwise noted) Oscillator Frequency vs Temperature 260 CT = 270pF VCC vs ISHUNT 10.50 10.25 250 240 9.75 230 9.50 10 372312 G01 0 10 30 20 ISHUNT (mA) 40 50 372312 G02 220 – 60 – 40 – 20 0 20 40 60 TEMPERATURE (°C) 80 100 372312 G03 VREF vs IREF 5.05 TJ = 25°C VREF vs Temperature 5.01 5.00 5.00 TJ = 85°C 4.95 4.99 4.90 TJ = –40°C 4.85 4.98 4.80 0 5 10 15 20 25 IREF (mA) 30 35 40 4.97 – 60 – 40 – 20 0 20 40 60 TEMPERATURE (°C) 80 100 372312 G05 372312 G06 372312f LTC3723-1/LTC3723-2 TYPICAL PERFOR A CE CHARACTERISTICS Error Amplifier Gain/Phase 190 DELAY (ns) ICC (µA) 100 80 60 40 20 0 –180 –270 –360 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M GAIN (dB) PHASE (DEG) Slope Current vs Temperature 90 80 70 CT = 2.25V 10.5 10.4 SHUNT VOLTAGE (V) CURRENT (µA) 60 50 40 30 20 10 0 –55 –25 5 35 65 TEMPERATURE (°C) 95 125 CT = 1V 10.2 10.1 10.0 9.9 9.8 –55 DELAY (ns) FB Input Voltage vs Temperature 1.205 1.204 1.203 FB VOLTAGE (V) 1.201 1.200 1.199 1.198 1.197 –55 –25 5 35 65 TEMPERATURE (°C) 95 125 DELAY (ns) 1.202 UW (TA = 25°C unless otherwise noted) LTC3723 Deadtime vs RDPRG With and Without 200k Prebias Compensation 275 250 225 200k PREBIAS 200 175 150 125 100 75 50 NO 200k PREBIAS Start-Up ICC vs Temperature 180 170 160 150 140 130 120 110 100 –55 –25 5 35 65 TEMPERATURE (°C) 95 125 0 50 100 150 200 250 300 350 400 450 500 RDPRG (kΩ) 372312 G09 372312 G07 372312 G08 VCC Shunt Voltage vs Temperature ICC = 10mA 900 800 700 10.3 600 500 400 300 200 100 0 –25 5 35 65 TEMPERATURE (°C) 95 125 Synchronous Driver Turn-Off Delay vs RSPRG Referenced to CT Peak 0 50 150 200 100 RSPRG (kΩ) 250 300 372312 G10 372312 G11 372312 G12 Synchronous Driver Turn-Off Delay vs RSPRG Referenced to Push-Pull Driver Outputs 350 300 250 200 150 100 50 0 –50 0 50 100 150 200 RSPRG (kΩ) 250 300 RDPRG = 150k 372312 G13 372312 G14 372312f 5 LTC3723-1/LTC3723-2 PI DESCRIPTIO S VREF (Pin 1/Pin 1): Output of the 5.0V Reference. VREF is capable of supplying up to 18mA to external circuitry. VREF should be decoupled to GND with a 0.47µF ceramic capacitor. SDRB (Pin 2/Pin 2): 50mA Driver for Synchronous Rectifier associated with DRVB. SDRA (Pin 3/Pin 3): 50mA Driver for Synchronous Rectifier associated with DRVA. DRVB (Pin 4/Pin 4): High Speed 1.5A Sink, 1A Source Totem Pole MOSFET Driver. Connect to gate of external push-pull MOSFET with as short a PCB trace as practical to preserve drive signal integrity. A low value resistor connected between DRVA and the MOSFET gate is optional and will improve the gate drive signal quality if the PCB trace from the driver to the MOSFET cannot be made short. VCC (Pin 5/Pin 5): Supply Voltage Input to the LTC3723-1/ LTC3723-2 and 10.25V Shunt Regulator. The chip is enabled after VCC has risen high enough to allow the VCC shunt regulator to conduct current and the UVLO comparator threshold is exceeded. Once the VCC shunt regulator has turned on, VCC can drop to as low as 6V (typical) and maintain operation. Bypass VCC to GND with a high quality 1µF or larger ceramic capacitor to supply the transient currents caused by the high speed switching and capacitive loads presented by the on chip totem pole drivers. DRVA (Pin 6/Pin 6): High Speed 1.5A Sink, 1A Source Totem Pole MOSFET Driver. Connect to gate of external push-pull MOSFET with as short a PCB trace as practical to preserve drive signal integrity. A low value resistor connected between DRVA and the MOSFET gate is optional and will improve the gate drive signal quality if the PCB trace from the driver to the MOSFET cannot be made short. GND (Pin 7/Pin 7): All circuits in the LTC3723 are referenced to GND. Use of a ground plane is highly recom- 6 U U (LTC3723-1/LTC3723-2) mended. VIN and VREF bypass capacitors must be terminated with a star configuration as close to GND as practical for best performance. CT (Pin 8/Pin 8): Timing Capacitor for the Oscillator. Use a ±5% or better low ESR ceramic capacitor for best results. CT ramp amplitude is 2.35V peak-to-peak (typical). DPRG (Pin 9/Pin 12): Programming Input for Push-Pull Dead-Time. Connect a resistor between DPRG and VREF to program the dead-time. The nominal voltage on DPRG is 2V. RAMP (N/A/Pin 9): Input to PWM Comparator for LTC3723-2 Only (Voltage Mode Controller). The voltage on RAMP is internally level shifted by 650mV. CS (Pin 10/Pin 10): Input to Pulse-by-Pulse and Overload Current Limit Comparators, Output of Slope Compensation Circuitry. The pulse-by-pulse comparator has a nominal 300mV threshold, while the overload comparator has a nominal 600mV threshold. An internal switch discharges CS to GND after every timing period. Slope compensation current flows out of CS during the PWM period. An external resistor connected from CS to the external current sense resistor programs the amount of slope compensation. COMP (Pin 11/Pin 11): Error Amplifier Output, Inverting Input to Phase Modulator. RLEB (Pin 12/N/A): Timing Resistor for Leading Edge Blanking. Use a 10k to 100k resistor connected between RLEB and GND to program from 40ns to 310ns of leading edge blanking of the current sense signal on CS for the LTC3723-1. A ±1% tolerance resistor is recommended. The LTC3723-2 has a fixed blanking time of approximately 80ns. The nominal voltage on RLEB is 2V. If leading edge blanking is not required, tie RLEB to VREF to disable. FB (Pin 13/Pin 13): Error Amplifier Inverting Input. This is the voltage feedback input for the LTC3723. The nominal regulation voltage at FB is 1.2V. 372312f LTC3723-1/LTC3723-2 PI DESCRIPTIO S SS (Pin 14/Pin 14): Soft-Start/Restart Delay Circuitry Timing Capacitor. A capacitor from SS to GND provides a controlled ramp of the current command (LTC3723-1) or duty cycle (LTC3723-2). During overload conditions, SS is discharged to ground initiating a soft-start cycle. SS charging current is approximately 13µA. SS will charge up to approximately 5V in normal operation. During a constant overload current fault, SS will oscillate at a low frequency between approximately 0.5V and 4V. UVLO (Pin 15/Pin 15): Input to Program System Turn-On and Turn-Off Voltages. The nominal threshold of the UVLO comparator is 5.0V. UVLO is connected to the main DC system feed through a resistor divider. When the UVLO TI I G DIAGRA DRVA DRVB SDRA SDRB CURRENT SENSE OR CT RAMP PWM COMPARATOR (–) 372312 TD01 W U UW U (LTC3723-1/LTC3723-2) threshold is exceeded, the LTC3723-1/LTC3723-2 commences a soft-start cycle and a 10µA (nominal) current is fed out of UVLO to program the desired amount of system hysteresis. The hysteresis level can be adjusted by changing the resistance of the divider. UVLO can also be used to terminate all switching by pulling UVLO down to less than 4V. An open drain or collector switch can perform this function without changing the system turn on or turn off voltages. SPRG (Pin 16/Pin 16): A resistor is connected between SPRG and GND to set the turn off delay for the synchronous rectifier driver outputs. The nominal voltage on SPRG is 2V. PROGRAMMABLE SYNCHRONOUS TURN-OFF DELAY PROGRAMMABLE DEAD-TIME 372312f 7 LTC3723-1/LTC3723-2 BLOCK DIAGRA S LTC3723-1 Block Diagram VCC 5 UVLO 15 VREF 1 CT 8 DPRG 9 SPRG 16 VCC UVLO 10.25V “ON” 6V “OFF” ERROR AMPLIFIER FB 13 – + 1.2V 5V 50k COMP 11 14.9k + 650mV – 1A SOURCE Q R Q S R S 1A SOURCE 4 DRVB SHUTDOWN CURRENT LIMIT 1.5A SINK FAULT LOGIC Q T Q 1.5A SINK 6 DRVA + – SS 14 VREF 13µA + 600mV – CS 10 RLEB 12 BLANK + 300mV PULSE-BY-PULSE CURRENT LIMIT 7 – 8 W + – 10µA VCC REF, LDO 1.2V 5V REF GOOD SYSTEM UVLO VCC GOOD 3 SDRA SYNC RECTIFIER DRIVE LOGIC 2 SDRB – + PULSE WIDTH MODULATOR OSCILLATOR SLOPE COMPENSATOR GND 372312 BD01 372312f LTC3723-1/LTC3723-2 BLOCK DIAGRA S LTC3723-2 Block Diagram VCC 5 UVLO 15 VREF 1 CT 8 SPRG 16 VCC UVLO 10.25V “ON” 6V “OFF” ERROR AMPLIFIER FB 13 – + 1.2V 5V 50k COMP 11 + 650mV – RAMP 9 Q R Q S R S Q T Q OUTPUT DRIVE LOGIC 1A SOURCE 4 DRVB 1.5A SINK SHUTDOWN CURRENT LIMIT 1.5A SINK 1A SOURCE 6 DRVA + – SS 14 VREF 13µA + 600mV – CS 10 BLANK + 300mV PULSE-BY-PULSE CURRENT LIMIT – W + – 10µA VCC REF, LDO 1.2V 5V REF GOOD SYSTEM UVLO VCC GOOD 3 SDRA SYNC RECTIFIER DRIVE LOGIC 2 SDRB – + PULSE WIDTH MODULATOR OSCILLATOR FAULT LOGIC 7 GND 9 DPRG 372312 BD02 372312f 9 LTC3723-1/LTC3723-2 OPERATIO Please refer to the detailed Block Diagrams for this discussion. The LTC3723-1 and LTC3723-2 are synchronous PWM push-pull controllers. The LTC3723-1 operates with peak pulse-by-pulse current mode control while the LTC3723-2 offers voltage mode control operation. They are best suited for moderate to high power isolated power systems where small size and high efficiency are required. The push-pull topology delivers excellent transformer utilization and requires only two low side power MOSFET switches. Both controllers generate 180° out of phase 0% to < 50% duty cycle drive signals on DRVA and DRVB. The external MOSFETs are driven directly by these powerful on-chip drivers. The external MOSFETs typically control opposite primary windings of a centertapped power transformer. The centertap primary winding is connected to the input DC feed. The secondary of the transformer can be configured in different synchronous or nonsynchronous configurations depending on the application needs. The duty ratio is controlled by the voltage on COMP. A switching cycle commences with the falling edge of the internal oscillator clock pulse. The LTC3723-1 attenuates the voltage on COMP and compares it to the current sense signal to terminate the switching cycle. The LTC3723-2 compares the voltage on COMP to a timing ramp to terminate the cycle. The LTC3723-2’s CT waveform can be used for this purpose or separate R-C components can be connected to RAMP to generate the timing ramp. If the voltage on CS exceeds 300mV, the present cycle is terminated. If the voltage on CS exceeds 600mV, all switching stops and a soft-start sequence is initiated. The LTC3723-1 / LTC3723-2 also provide drive signals for secondary side synchronous rectifier MOSFETs. Synchronous rectification improves converter efficiency, especially as the output voltages drop. Independent turn-off control of the synchronous rectifiers is provided via SPRG in order to optimize the benefit of the synchronous rectifiers. A resistor from SPRG to GND sets the desired turn off delay. A host of other features including an error amplifier, system UVLO programming, adjustable leading edge blanking, slope compensation and programmable dead-time provide flexibility for a variety of applications. 10 U Programming Driver Dead-Time The LTC3723-1/LTC3723-2 controllers include a feature to program the minimum time between the output signals on DRVA and DRVB commonly referred to as the driver dead-time. This function will come into play if the controller is commanded for maximum duty cycle. The dead-time is set with an external resistor connected between DPRG and VREF (see Figure 1). The nominal regulated voltage on DPRG is 2V. The external resistor programs a current which flows into DPRG. The dead-time can be adjusted from 90ns to 300ns with this resistor. The dead-time can also be modulated based on an external current source that feeds current into DPRG. Care must be taken to limit the current fed into DPRG to 350µA or less. An internal 10µA current source sets a maximum deadtime if DPRG is floated. The internal current source causes the programmed deadtime to vary non-linearly with increasing values of RDPRG (see typical performance characteristics). An external 200k resistor connected from DPRG to GND will compensate for the internal 10µA current source and linearize the deadtime delay vs RDPRG characteristic. Powering the LTC3723-1/LTC3723-2 The LTC3723-1/LTC3723-2 utilize an integrated VCC shunt regulator to serve the dual purposes of limiting the voltage applied to VCC as well as signaling that the chip’s bias voltage is sufficient to begin switching operation (under voltage lockout). With its typical 10.2V turn-on voltage and 4.2V UVLO hysteresis, the LTC3723-1/LTC3723-2 is tolerant of loosely regulated input sources such as an auxiliary transformer winding. The VCC shunt is capable of sinking up to 40mA of externally applied current. The UVLO turn-on and turn-off thresholds are derived from an internally trimmed reference making them extremely accurate. In addition, the LTC3723-1/LTC3723-2 exhibits VREF RDPRG DPRG 10µA OPTIONAL 200k + V 2V + 2.5V – – TURN-ON OUTPUT 372312 F01 Figure 1. Delay Timeout Circuitry 372312f LTC3723-1/LTC3723-2 OPERATIO very low (145µA typ) start-up current that allows the use of 1/8W to 1/4W trickle charge start-up resistors. The trickle charge resistor should be selected as follows: RSTART(MAX) = VIN(MIN) – 10.7V/250µA Adding a small safety margin and choosing standard values yields: APPLICATION DC/DC Off-Line PFC Preregulator VIN RANGE 36V to 72V 85V to 270VRMS 390VDC RSTART 100k 430k 1.4M VCC should be bypassed with a 0.1µF to 1µF multilayer ceramic capacitor to decouple the fast transient currents demanded by the output drivers and a bulk tantalum or electrolytic capacitor to hold up the VCC supply before the bootstrap winding, or an auxiliary regulator circuit takes over. CHOLDUP = (ICC + IDRIVE) • tDELAY/3.8V (minimum UVLO hysteresis) Regulated bias supplies as low as 7V can be utilized to provide bias to the LTC3723-1/LTC3723-2. Refer to Figure 2 for various bias supply configurations. 12V ±10% 1.5k 1N5226 3V 1µF VCC VCC VIN VBIAS < VUVLO 1N914 RSTART Figure 2. Bias Configurations Programming Undervoltage Lockout The LTC3723-1/LTC3723-2 provides undervoltage lockout (UVLO) control for the input DC voltage feed to the power converter in addition to the VCC UVLO function described in the preceding section. Input DC feed UVLO is provided with the UVLO pin. A comparator on UVLO compares a divided down input DC feed voltage to the 5V precision reference. When the 5V level is exceeded on UVLO, the SS pin is released and output switching commences. At the same time a 10µA current is enabled which flows out of UVLO into the voltage divider connected to U UVLO. The amount of DC feed hysteresis provided by this current is: 10µA • RTOP, (Figure 3). The system UVLO threshold is: 5V • {(RTOP + RBOTTOM)/RBOTTOM}. If the voltage applied to UVLO is present and greater than 5V prior to the VCC UVLO circuitry activation, then the internal UVLO logic will prevent output switching until the following three conditions are met: (1) VCC UVLO is enabled, (2) VREF is in regulation and (3) UVLO pin is greater than 5V. UVLO can also be used to enable and disable the power converter. An open drain transistor connected to UVLO as shown in Figure 3 provides this capability. RTOP UVLO ON OFF RBOTTOM 372312 F03 Figure 3. System UVLO Setup Off-Line Bias Supply Generation If a regulated bias supply is not available to provide VCC voltage to the LTC3723-1/LTC3723-2 and supporting circuitry, one must be generated. Since the power requirement is small, approximately 1W, and the regulation is not critical, a simple open-loop method is usually the easiest and lowest cost approach. One method that works well is to add a winding to the main power transformer, and post regulate the resultant square wave with an L-C filter (see Figure 4a). The advantage of this approach is that it maintains decent regulation as the supply voltage varies, and it does not require full safety isolation from the input winding of the transformer. Some manufacturers include a primary winding for this purpose in their standard VIN RSTART VCC 1µF + CHOLD 372312 F02 + 15V* CHOLD 2k 1µ F 372312 F04a *OPTIONAL Figure 4a. Auxiliary Winding Bias Supply 372312f 11 LTC3723-1/LTC3723-2 OPERATIO product offerings as well. A different approach is to add a winding to the output inductor and peak detect and filter the square wave signal (see Figure 4b). The polarity of this winding is designed so that the positive voltage square wave is produced while the output inductor is freewheeling. An advantage of this technique over the previous is that it does not require a separate filter inductor and since the voltage is derived from the well-regulated output voltage, it is also well controlled. One disadvantage is that this winding will require the same safety isolation that is required for the main transformer. Another disadvantage is that a much larger VCC filter capacitor is needed, since it does not generate a voltage as the output is first starting up, or during short-circuit conditions. VIN LOUT RSTART ISO BARRIER VOUT 1µF VCC Figure 4b. Output Inductor Bias Supply Programming the LTC3723-1/LTC3723-2 Oscillator The high accuracy LTC3723-1/LTC3723-2 oscillator circuit provides flexibility to program the switching frequency and slope compensation required for current mode control (LTC3723-1). The oscillator circuit produces a 2.35V peak-to-peak amplitude ramp waveform on CT. Typical maximum duty cycles of 49% are possible. The oscillator is capable of operation up to 1MHz by the following equation: CT = 1/(14.8k • FOSC) Note that this is the frequency seen on CT. The output drivers switch at 1/2 of this frequency. Also note that higher switching frequency and added driver dead-time via DPRG will reduce the maximum duty cycle. The LTC3723-1/LTC3723-2 can be synchronized to an external frequency source such as another PWM chip. In –VIN DRVB SDRB LTC3723 GND TO SYNCHRONOUS SECONDARY MOSFET fSW ≅ 210µA 2 • 2.56V • CT CT CT 372312 F06 Figure 6. Two-Transistor Forward Converter (Duty Cycle < 50%) • 372312f 12 U Figure 5, the leading edge of an external pulse is used to terminate the natural clock cycle. If the external frequency is higher than the oscillator frequency, the internal oscillator will synchronize with the external input frequency. LTC3723 CT CT 68pF fOSC ≅ 210µA 2.56V • CT 390Ω BAT54 fOSC < fEXT < 1.25 • fOSC EXTERNAL FREQUENCY SOURCE fSW = fOSC/2 372312 F05 Figure 5. Synchronization from External Source Single-Ended Operation In addition to push-pull and full-bridge topologies, singleended topologies such as the forward and flyback converter can benefit from the many advanced features of the LTC3723. In Figure 6, the LTC3723 is used with the LTC4440, 100V high side driver to implement a twotransistor forward converter. DRVB is used which limits the converter’s maximum duty cycle to 50% (less programmable driver dead time). VIN TG LTC4440 IN GND TS + CHOLD 372312 F04b LTC3723-1/LTC3723-2 OPERATIO The 50% duty-cycle limit is overcome with the circuit shown in Figure 7. Operation is similar to external synchronization, except DRVA output is used to terminate its own clock cycle early. Switching period is now equal to the oscillator period plus programmable driver dead time. Maximum on time is equal to oscillator period minus driver dead time. Although near 100% duty cycle operation may be of benefit with non-isolated converters, it is often desirable to limit the duty cycle of single-ended isolated converters. Instead of immediately ending the unused clock’s output, Figure 8 uses a transistor to switch in additional timing capacitor charge current. This allows one to preset the maximum duty. DRVA DRVB LTC3723-1 CT CT f SW ≅ 1 ⎛ 2.56V • C T ⎞ + TDPRG⎟ ⎜ ⎝ 210µA ⎠ 68pF 390Ω BAT54 Figure 7. LTC3723-1 > 50% Duty Cycle VIN • –VIN DRVB DRVA 50k VREF R CT CT SDRB LTC3723-1 TO SYNCHRONOUS SECONDARY MOSFET f SW ≅ 1 ⎞ ⎛1 1 2.56V • C T ⎜ + ⎟ ⎝ 210µA 210µA + (3 / R) ⎠ MMBT2369 Figure 8. LTC3723-1 One-Switch Forward or Flyback Converter (Maximum Duty Cycle 50% to 100%) U Voltage Mode with LTC3723-2 Figure 9 shows how basic connections differ between current mode LTC3723-1 and voltage mode LTC3723-2. Oscillator may be used as the ramp input or the LTC37232 includes an internal 10mA ramp discharge useful when implementing voltage feedforward. Open loop control in which the duty cycle varies inversely proportional to input voltage is shown in Figure 10. LTC3723-1 CT 8 CT DPRG 9 RDPRG VREF 1 RLEB 12 RLEB TO INPUT VOLTAGE LTC3723-2 CT ⎞ ⎛ 2.56V • C T DMAX ≅ f SW ⎜ – TDPRG⎟ ⎠ ⎝ 210µA LTC3723-2 DPRG 12 RAMP 9 CT 8 VREF 1 CT RDPRG 372312 F09 RAMP 9 CT VREF 1 DPRG 12 8 RDPRG 372312 F07 Figure 9. LTC3723-1 Current Mode and LTC3723-2 Voltage Mode Connections TO INPUT VOLTAGE LTC3723-2 CT 8 CT RAMP 9 COMP 11 FB 13 372312 F10 ⎛ 2.56V • C T ⎞ – TDPRG⎟ DMAX ≅ f SW ⎜ ⎝ 210µA ⎠ 372312 F08 Figure 10. LTC3723-2 Open Loop Control (Duty Cycle is Inversely Proportional to Input Voltage) 372312f 13 LTC3723-1/LTC3723-2 OPERATIO The LTC3723-1 derives a compensating slope current from the oscillator ramp waveform and sources this current out of CS. This function is disabled in the LTC3723-2. The desired level of slope compensation is selected with an external resistor connected between CS and the external current sense resistor, (Figure 11). Current Sensing and Overcurrent Protection Current sensing provides feedback for the current mode control loop and protection from overload conditions. The LTC3723-1/LTC3723-2 are compatible with either resistive sensing or current transformer methods. Internally connected to the LTC3723-1/LTC3723-2 CS pin are two comparators that provide pulse-by-pulse and overcurrent shutdown functions respectively, (Figure 12). LTC3723 CT I= Figure 11. Slope Compensation Circuitry H = SHUTDOWN OUTPUTS PULSE BY PULSE CURRENT LIMIT + CS 300mV – PWM RCS Figure 12. Current Sense/Fault Circuitry Detail 14 + UVLO ENABLE R + 600mV – SQ – OVERLOAD CURRENT LIMIT + – U V(CT) 33k SWITCH CURRENT CS RSLOPE RCS 33k ADDED SLOPE CURRENT SENSE WAVEFORM The pulse-by-pulse comparator has a 300mV nominal threshold. If the 300mV threshold is exceeded, the PWM cycle is terminated. The overcurrent comparator is set approximately 2x higher than the pulse-by-pulse level. If the current signal exceeds this level, the PWM cycle is terminated, the soft-start capacitor is quickly discharged and a soft-start cycle is initiated. If the overcurrent condition persists, the LTC3723-1/LTC3723-2 halts PWM operation and waits for the soft-start capacitor to charge up to approximately 4V before a retry is allowed. The softstart capacitor is charged by an internal 13µA current source. If the fault condition has not cleared when softstart reaches 4V, the soft-start pin is again discharged and a new cycle is initiated. This is referred to as hiccup mode operation. In normal operation and under most abnormal conditions, the pulse-by-pulse comparator is fast enough to prevent hiccup mode operation. In severe cases, however, with high input voltage, very low RDS(ON) MOSFETs and a shorted output, or with saturating magnetics, the overcurrent comparator provides a means of protecting the power converter. Leading Edge Blanking The LTC3723-1/LTC3723-2 provides programmable leading edge blanking to prevent nuisance tripping of the current sense circuitry. Leading edge blanking relieves the filtering requirements for the CS pin, greatly improving the response to real overcurrent conditions. It also allows the use of a ground referenced current sense resistor or transformer(s), further simplifying the design. With a single 10k to 100k resistor from RLEB to GND, blanking times of approximately 40ns to 320ns are programmed. If not required, connecting RLEB to VREF can disable leading edge blanking. Keep in mind that the use of leading edge blanking will slightly reduce the linear control range for the pulse width modulator. 372312 F11 PWM LATCH Q S PWM LOGIC UVLO ENABLE SQ R Q 4.1V 13µA SS 0.4V CSS Q 372312 F12 372312f LTC3723-1/LTC3723-2 OPERATIO High Current Drivers The LTC3723-1/LTC3723-2 high current, high speed drivers provide direct drive of external power N-channel MOSFET switches. The drivers swing from rail to rail. Due to the high pulsed current nature of these drivers (1.5A sink, 1A source), care must be taken with the board layout to obtain advertised performance. Bypass VCC with a 1µF minimum, low ESR, ESL ceramic capacitor. Connect this capacitor with minimal length PCB leads to both VCC and GND. A ground plane is highly recommended. The driver output pins (DRVA, DRVB) connect to the gates of the external MOSFET switches. The PCB traces making these connections should also be as short as possible to minimize overshoot and undershoot of the drive signal. Synchronous Rectification The LTC3723-1/LTC3723-2 produces the precise timing signals necessary to control secondary side synchronous rectifier MOSFETs on SDRA and SDRB. Synchronous rectifiers are used in place of Schottky or silicon diodes on the secondary side to improve converter efficiency. As MOSFET RDS(ON) levels continue to drop, significant efficiency improvements can be realized with synchronous rectification, provided that the MOSFET switch timing is optimized. Synchronous rectification also provides bipolar output current capability, that is, the ability to sink as well as source current. Programming the Synchronous Rectifier Turn-Off Delay The LTC3723-1/LTC3723-2 controllers include a feature to program the turn-off edge of the secondary side synchronous rectifier MOSFETs relative to the beginning of a U new primary side power delivery pulse. This feature provides optimized timing for the synchronous MOSFETs which improves efficiency. At higher load currents it becomes more advantageous to delay the turn-off of the synchronous rectifiers until the beginning of the new power pulse. This allows for secondary freewheeling current to flow through the synchronous MOSFET channel instead of its body diode. The turn-off delay is programmed with a resistor from SPRG to GND, (Figure 13). The nominal regulated voltage on SPRG is 2V. The external resistor programs a current which flows out of SPRG. The delay can be adjusted from approximately 20ns to 200ns, with resistor values of 10k to 200k. Do not leave SPRG floating. The amount of delay can also be modulated based on an external current source that sinks current out of SPRG. Care must be taken to limit the current out of SPRG to 350µA or less. SPRG RSPRG + V 2V + – TURN-OFF SYNC OUT – 372312 F13 Figure 13. Synchronous Delay Circuitry 372312f 15 TYPICAL APPLICATIO S 10V L4 1mH D4 5 Si7892DP ×3 Si7892DP ×3 C1, C2, C3 470µF 6.3V ×3 Si7450DP Si7450DP C5 68µF 20V D5 6 4.99k 1/4W 11 4.99k 4.99k 5 CSE– 2 ME 3 ME 12 14 15 MF CSE+ LTC3901EGN GND PGND GND PGND 8 4 10 13 TIMER 7 MF CSF – 4.99k 1/4W 6 CSF+ 9 SYNC 100Ω 5 220pF VF VE LTC3723-1/LTC3723-2 + –VOUT –VOUT R1 0.06Ω 1.5W R2 0.06Ω 1.5W T2 1(1.5mH):0.5 1 4 22Ω 8 0.1µF 16 VCC PVCC 1 1µF 390pF 1µ F 40.2k 100Ω 2k 1/4W Q1 8.5V 100Ω D6 9.1V 75k 470Ω • • 5V 330pF 10V 10 4 2 SDRB 3 SDRA 1k 1 MOC207 6 47nF 3 1 V+ LT1431CS8 COLL REF GND-F GND-S 6 5 8 Q2 2.49k 47Ω –VOUT –VOUT D7 330Ω 0.022µF 360Ω 787Ω 270Ω 0.68µF 11 DRVB CS 8.5V VOUT VOUT –VOUT VIN 30k 100Ω 1/4W 6 5 DRVA VCC 383k SS DPRG 14 9 1 820Ω 150k 5 2 C6 2.2nF 250V 100k 5V 68nF 0.47µF COMP VREF LTC3723EGN-1 15 UVLO CT SPRG RLEB GND FB 7 13 8 16 12 1µF 10k 66.5k 220pF 33k 1µF, 100V TDK C3225X7R2A105M C1-C3: SANYO 6TPB470M C4: TDK C3225X7R1H335M C5: AVX TPSE686M020R0150 C6: MURATA DE2E3KH222MB3B D1, D2: DIODES INC. ES1A D4, D5: BAS21 D6: MMBD5239B D7: BAT54 L4: COILCRAFT DO1608C-105 L5: VISHAY IHLP-2525CZ-01 L6: PULSE PA1294.650 Q1: FZT690B Q2: FMMT3904 R1, R2: IRC LRC-LR2512-01-R060-G T1: EFD25 TRANSPOWER TTI8696 T2: PULSE PA0785 372312 TA02 U 16 165W, 36V to 72V to 3.3V at 50A Isolated Push-Pull Converter D1 VE D2 VOUT VOUT L6 0.65µH VF T1 9T(150µH):9T:7T:1T:1T 1 470Ω 1W • • L5 1µH VIN • VIN 100pF 200V VF 3 2 9 10 7 8 11 12 • 1µF 100V 80Ω 1W 100pF 200V 1µF 100V ×3 80Ω 1W + 4 C4 3.3µF 50V 1µ F –VIN • 372312f LTC3723-1 36VIN to 72VIN to 12V/5A and –12V/1.6A Forward Converter T1 EFD20 VOUT VOUT 10k 1.5nF CS+ 2 5 6 3 Si7450DP 1.5nF 200V 220pF Si7456DP Si7456DP 10µF 25V L3 33µH 24Ω 1/4W FG CG 12Ω 1/2W L2 15µH L1 4.7µH VIN VIN 1µ F 100V 1µ F 100V ×2 • • –VIN + 47µF 16V ×2 95 0.03Ω 1W 48VIN • 7 8 1 BAS21 4 220pF 2.7k 2.7k 2.2nF 250V 12Ω 1/4W 24Ω 1/4W Si7456DP Si7456DP 220pF 10V L4 1mH BAS21 • TYPICAL APPLICATIO S 91 68µF 20V + + 47µF 16V ×2 EFFICIENCY (%) 89 –VOUT MMBD914 0.1µF FG CG CS+ 1.00k 909Ω 5 1 FG 8 560Ω 5 SYNC CS+ 2 CS– LTC3900ES8 GND 6 3 4 CG VCC TIMER 26.1k 7 1nF 0.47µF VOUT D1 4.3V MMBD914 0.1µF 87 1.78K 80 VREF 158K 85 30 40 50 60 70 OUTPUT POWER (W) VIN 120pF 4 10 1 T2 4 10V 30k A 6 100Ω 1/4W DRVA DRVB CS SDRB 8 220pF LTC3723EGN-1 11 2 5 VCC 383k 15 SPRG RLEB FB DPRG 16 12 13 9 174k 1 VREF 22nF 750Ω 6 VREF 10k 220pF 33k 0.47µF VREF COMP UVLO GND SS CT 4.7nF 1 MOC207 1k 15nF 5 5 2 6 COMP OPTO GND 2 OC 3 22nF 1.5k 1 VIN LT4430ES6 4 FB VOUT+ 7 14 CT 8 1µ F 470pF 21.5k 680pF 66.5k 10nF VREF A 50k MMBT2369 1µF, 100V TDK C3225X7R2A105M (1210) 10µF, 25V TDK C4532X5R1E106M 47µF, 16V SANYO 16TQC47M D1: MMBZ5229B L1: COILCRAFT DO1813P-561HC L2: TDK SLF12575T-150M4R7 L3: TDK SLF10145T-330M1R6 L4: COILCRAFT DO1608C-105 T1: PULSE PA1040 T2: PULSE PA0785 (1:0.5T) 1.13k 8.66k CT 372312 TA03 U LTC3723-1/LTC3723-2 93 • • 17 372312f • B A 3 3 2 • • TYPICAL APPLICATIO S 0.1µF 0.1µF 5 A B VF VE 6.19k 1/4W 1 D6 1k 6 11 12 CSF – CSF+ 9 SYNC 100Ω 220pF A B 6 4 3 SDRA CS COMP SPRG RLEB SS DPRG VREF 1 243k 68nF 0.47µF 330pF 750Ω 22nF 5 2 100k D8 10V 1 16 12 14 9 150k 270pF 33k 10k 11 6 10 MOC207 0.1µF 3 V+ LT1431CS8 COLL REF C4 2.2nF 250V GND-F GND-S 6 5 –VOUT 8 2.49k 1 1k 9.53k 22nF DRVB SDRB LTC3723EGN-1 UVLO FB GND CT 13 7 8 DRVA 2 665Ω ISNS 22nF T2 1(1.5mH):0.5 1 4 14 15 MF MF2 6 CSE+ LTC3901EGN GND PGND GND2 PGND2 8 4 10 13 5 CSE– 2 3 866Ω 6.19k 1/4W 1k 866Ω 1.5k R1 0.03Ω 1.5W R2 0.03Ω 1.5W C3 68µF 20V ISNS 12V L4 1mH D5 Si7852DP Si7852DP Si7370DP ×2 Si7370DP ×2 C1, C2 47µF 16V ×2 12V/20A 1µF 97 LTC3723-1/LTC3723-2 42VIN 96 48VIN –VOUT –VOUT 56VIN 95 EFFICIENCY (%) + • VOUT 16 ME ME2 VCC 1 PVCC TIMER 7 470pF VOUT 100Ω 1/4W –VOUT MMBT3904 1µF 4.7µF D7 10V 42.2k 100Ω 94 1k 93 6 20 22Ω 8 5 0.1µF 8 16 10 12 14 LOAD CURRENT (A) 18 VIN 12V 200Ω 1/4W 30k 1/4W 5 VCC 10k 464k 15 1.5nF 1µF 66.5k 1µF, 100V TDK C3225X7R2A105M C1,C2: SANYO 16TQC47M C3: AVX TPSE686M020R0150 C4: MURATA GHM3045X7R222K-GC D2: DIODES INC. ES1B D3-D6: BAS21 D7, D8: MMBZ5240B L4: COILCRAFT DO1608C-105 L5: COILCRAFT DO1813P-561HC L6: PULSE PA1294.132 OR PANASONIC ETQP1H1R0BFA R1, R2: IRC LRC2512-R03G T1: PULSE PA0805.004 T2: PULSE PA0785 372312 TA04 U 2 4 2 4 3 • VCC 6 INP BOOST LTC4440ES6 5 4.7Ω TG GND TS 11 9 VOUT VOUT VF D2 1µF 100V 7 1k 1/4W Si7852DP VCC 6 INP BOOST LTC4440ES6 5 4.7Ω TG GND TS Si7852DP 4 • 18 LTC3723-1 240W 42VIN to 56VIN to 12V/20A Isolated 1/4Brick (2.3" × 1.45") VF 470pF 100V 12V D3 T1 4T:6T(65µHMIN):6T:2T:2T VE L6 1.25µH VE 1 10Ω 1W D4 L5 0.56µH VIN VIN 42V TO 56V 1µ F 100V –VIN 1µF 100V ×3 12V 1 + • • 372312f LTC3723-1/LTC3723-2 TYPICAL APPLICATIO S LTC3723-1 300W 42VIN to 56VIN to 12V/25A Isolated Bus Converter L1 0.56µH VIN –VIN 1µF 100V 1µF 12V 100V ×3 1 B 3 BAS21 ES1B VIN 12V 1 A 3 VCC 6 INP BOOST LTC4440ES6 5 4.7Ω TG GND 0.1µF Si7370DP 2 TS 4 0.1µF Si7370DP VF 1nF 100V 10Ω ES1B 1W VE +VOUT VF HAT2169 ×2 2.2nF 250V L2 0.44µH HAT2169 ×2 22µF 25V ×3 –VOUT VF 1µF, 100V TDK C3225X7R2A105M 4.7µF, 25V TDK C4532X7R1E475M 22µF, 25V TDK C4532X7R1E226M D1: MMBZ5240B D2: MMBZ5242B L1: COILCRAFT DO1813P-561HC L2: PULSE PA0513.441 L3: COILCRAFT DO1608C-105 T1: PULSE PA0901.004 (4:4:4:4CT) T2: PULSE PA0785 (1:0.5T) 100Ω R1 0.015Ω 1.5W ISNS 68µF 20V 12V L3 1mH BAS21 1 BAS21 6 4.53k 4.53k 2.67k 1.27k 11 1 T2 4 CSF+ 9 100Ω 220pF VIN 30k 1/4W 12V MMBT3904 A 6 100Ω 1/4W 5 464k 15 DRVA VCC UVLO FB GND CT 13 7 1µF 8 B 4 DRVB LTC3723EGN-1 2 SDRB 3 SDRA CS COMP SPRG RLEB SS DPRG 16 270pF 33k 10k 68nF 0.47µF 12 14 9 150k D2 12V 24.9k 330pF 91 5 10 20 15 LOAD CURRENT (A) 25 7 5 10 20 15 LOAD CURRENT (A) 25 372312 TA05 VCC 6 INP BOOST LTC4440ES6 5 4.7Ω TG GND 2 TS 4 2 • • 4 3 7 Si7370DP A 5.1Ω 1/4W 4.7µF 25V 2x 5 Si7370DP B • • • + • OUTPUT VOLTAGE (V) EFFICIENCY (%) 100pF 66.5k PACKAGE DESCRIPTIO .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 0° – 8° TYP .0532 – .0688 (1.35 – 1.75) .008 – .012 (0.203 – 0.305) TYP 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U U +VOUT 1.2k 0.5W 0.33µF 100V –VOUT +VOUT BAS21 T1 29.46mm × 25.4mm × 10.2mm PLANAR 11 9 VE VE –VOUT +VOUT 2.67k 1k 1.27k MMBT3904 5 2 3 16 33.2k 1 1µF 4.7µF –VOUT D1 10V 12 14 15 6 CSF – MF MF2 CSE+ LTC3901EGN GND 8 PGND 4 GND2 10 CSE– ME ME2 VCC PVCC PGND2 13 TIMER 7 470pF 0.1µF 22Ω SYNC 8 • • 5 97 96 95 53VIN 94 93 92 ISNS 48VIN 13 12 42VIN 11 10 42VIN 9 8 53VIN 10 11 48VIN VREF 1 GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .004 – .0098 (0.102 – 0.249) .009 (0.229) REF 16 15 14 13 12 11 10 9 .045 ± .005 .0250 (0.635) BSC .229 – .244 (5.817 – 6.198) .150 – .157** (3.810 – 3.988) .254 MIN .150 – .165 1 23 4 56 7 8 .0165 ± .0015 .0250 BSC GN16 (SSOP) 0204 RECOMMENDED SOLDER PAD LAYOUT 372312f 19 LTC3723-1/LTC3723-2 TYPICAL APPLICATIO L1 0.33µH VIN 1µF 100V –VIN VIN 1µF 100V ×2 LTC3723-1 100W, 36VIN to 72VIN to 3.3V/30A Isolated Forward Converter T1 23.4mm × 20.1mm × 9.4mm PLANAR 2 4 3 5 Si7450DP 94 93 92 EFFICIENCY (%) • • • • 48VIN 91 90 89 88 87 86 5 10 15 20 LOAD CURRENT (A) 25 30 820Ω • VIN 30k 150Ω 1/4W 383k 10V A 6 DRVA 5 VCC 4 DRVB LTC3723EGN-1 15 UVLO GND SS 100pF 1µF 7 14 CT 68nF 220pF CT 8 10k 33k SPRG RLEB FB DPRG 16 12 13 VREF 1 VREF 4.7nF COMP 10nF 11 330Ω VREF 1 820Ω 6 5 5 2 6 2.2nF 250V VIN VOUT 372312 TA06 66.5k VREF A 50k MMBT2369 8.66k CT 1µF, 100V TDK C3225X7R2A105M (1210) 100µF, 6.3V TDK C3225X5R0J107M (1210) 2.2nF, 630V TDK C3216JB2J222K 470µF, 6.3V SANYO 6TPD470M D1: MMBZ5240B L1: COILCRAFT DO1813P-331HC L2: PULSE PA1292.910 L3: COILCRAFT DO1608C-105 T1: PULSE PA810.007 (7:6:6:1:1:1T) T2: PULSE PA0184 (1:1T) RELATED PARTS PART NUMBER LT 1952 LTC3705/LTC3706/ LTC3725/LTC3726/ LT3804 LTC3901 LT4430 LTC4440 ® DESCRIPTION Single Switch Synchronous Forward Controller Isolated Power Supply DC/DC Converter Chipset LTC3722-1/LTC3722-2 Dual Mode Phase Modulated Full-Bridge Controllers Secondary-Side Dual Output Controller with Opto Driver Secondary-Side Synchronous Driver for Push-Pull and Full Bridge Converters Secondary-Side Optocoupler Driver High Speed High Voltage High Side Gate Driver PolyPhase is a registered trademark of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. 372312f 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U L2 0.85µH 2.2nF VX Si7336ADP ×2 5.1Ω 1/2W Si7336ADP ×2 100µF 6.3V ×2 VOUT VOUT 7 8 10 11 2.2nF 5.1Ω 1/2W –VOUT 0.03Ω 1W 10V 68µF 20V –VOUT L3 1mH BAS21 1 BAS21 6 B0540W VREF 120K 1 T2 4 8 560Ω 5 FG SYNC 1 CS+ 562Ω 2 CS– LTC3900ES8 GND 6 –VOUT 3 VB 4 26.1k 7 1nF D1 10V 0.47µF 25V 845Ω 1.00k VX B0540W 15Ω 1/4W + 2.2nF 630V 470µF 6.3V + CG VCC TIMER • • 120pF 10 CS SDRB 2 220pF 8 5 9 150k 4.7nF 330Ω VOUT MOC207 0.47µF VB 1 COMP OPTO VIN LT4430ES6 GND 2 4 FB OC 3 47nF 6.04k 27.4k 1k 470pF COMMENTS High Efficiency, Adjustable Volt-Second Clamp, True PWM Soft-Start Simple as Buck Circuit, No Opto-Coupler, Fast Transient Response, PolyPhase® Operation Capability, Scalable for Higher Power ZVS Full-Bridge Controllers Regulates Two Secondary Outputs; Optocoupler Feedback Driver and Second Output Synchronous Driver Controller Drives N-Channel Synchronous MOSFETs, Programmable Timeout, Reverse Current Limit Overshoot Control on Start-Up and Short-Circuit Recovery, 600mV Reference, ThinSOT™ Package 80V Operation, 100V Tolerant, 1.5Ω Pull-Down, 2.4A Pull-Up LT 1105 • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2003