LTC3824IMSE-TR

FEATURES n n n n n n n n n n LTC3824 High Voltage Step-Down Controller With 40µA Quiescent Current DESCRIPTION The LTC®3824 is a step-down DC/DC controller designed to drive an external P-channel MOSFET. With a wide input range of 4V to 60V and a high voltage gate driver, the LTC3824 is suitable for many industrial and automotive high power applications. Constant frequency current mode operation provides excellent performance. The LTC3824 can be configured for Burst Mode operation. Burst Mode operation enhances low current efficiency (only 40μA quiescent current) and extends battery run time. The switching frequency can be programmed up to 600kHz and is easily synchronizable. Other features include current limit, soft-start, micropower shutdown, and Burst Mode disable. The LTC3824 is available in a 10-lead MSE power package. L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5731964. Wide Input Range: 4V to 60V Current Mode Constant Frequency PWM Very Low Dropout Operation: 100% Duty Cycle Programmable Switching Frequency: 200kHz to 600kHz Selectable High Efficient Burst Mode® Operation: 40μA Quiescent Current Easy Synchronization 8V, 2A Gate Drive (VCC > 10V) for Industrial High Voltage P-channel MOSFET Programmable Soft-Start Programmable Current Limit Available in a Small 10-Pin Thermally Enhanced MSE Package APPLICATIONS n n n Industrial and Automotive Power Supplies Telecom Power Supplies Distributed Power Systems TYPICAL APPLICATION VIN 5.5V TO 60V CIN 33μF 100V 5V/2A Buck Converter + CCAP 0.1μF CAP VCC Efficiency and Power Loss vs Load Current 100 VIN = 12V VIN = 40V 2.5 90 EFFICIENCY (%) RS 0.025Ω EFFICIENCY 2.0 POWER LOSS (W) 80 1.5 SENSE LTC3824 RSET 392k GND 100pF SYNC/MODE VFB SS 0.1μF VC 10k 3.3nF 80.6k 3824 TA01 GATE 70 VIN = 40V POWER LOSS VIN = 12V 50 10 100 LOAD CURRENT (mA) 1000 1.0 22μH COUT 100μF 2 422k VOUT 5V 2A 60 0.5 51Ω 0 2000 3824 TA01a 3824fc 1 LTC3824 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW GND SYNC/MODE RSET VC VFB 1 2 3 4 5 10 9 8 7 6 CAP GATE VCC SENSE SS 11 VCC ...........................................................................65V SS, RSET, VFB ..............................................................4V VC ...............................................................................3V SYNC/MODE ...............................................................6V VCC – VSENSE ..............................................................1V Maximum Temperatures (Note 2) LTC3824E............................................. –40°C to 85°C LTC3824I............................................ –40°C to 125°C Storage Temperature Range..................... –65° to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 43°C/W, θJC = 3°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LTC3824EMSE#PBF LTC3824IMSE#PBF LEAD BASED FINISH LTC3824EMSE LTC3824IMSE TAPE AND REEL LTC3824EMSE#TRPBF LTC3824IMSE#TRPBF TAPE AND REEL LTC3824EMSE#TR LTC3824IMSE#TR PART MARKING LTBRZ LTCGZ PART MARKING LTBRZ LTCGZ PACKAGE DESCRIPTION 10-Lead Plastic MSOP 10-Lead Plastic MSOP PACKAGE DESCRIPTION 10-Lead Plastic MSOP 10-Lead Plastic MSOP TEMPERATURE RANGE –40°C to 85°C –40°C to 125°C TEMPERATURE RANGE –40°C to 85°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, RSET = 392k, CCAP = 0.1μF No load on any outputs, unless . otherwise specified. PARAMETER Supply Voltage (VCC) Supply Current (IVCC) Supply Current (IVCC) Burst Mode Operation Supply Current in Shutdown VOLTAGE AMPLIFIER gm Reference Voltage (VREF) Transconductance FB Input Current VC High VC Low VC Source Current VC Sink Current VC = 0.8V, ΔIVC = ±2μA VFB = VREF (Note 3) IVC = 0 IVC = 0 VVC = 0.5V to 1.3V, VFB = VREF –100mV (VSYNC = 0V) VVC = 0.7V to 1.3V, VFB = VREF +100mV (VSYNC = 0V) l l ELECTRICAL CHARACTERISTICS CONDITIONS MIN l TYP 0.8 40 7 MAX 60 1.3 65 UNITS V mA μA μA 4 VC ≤ 0.4V (Switching Off), VCC ≤ 60V VSYNC = 0V (Burst Mode Operation Disable) VCC ≤ 60V, SYNC/MODE Open, VC = 0.6V VC ≤ 25mV, VCC ≤ 60V 0.792 0.788 220 0.8 260 10 1.6 0.35 15 15 0.808 0.812 370 30 0.5 V V μmho nA V V μA μA 3824fc 2 LTC3824 ELECTRICAL CHARACTERISTICS PARAMETER VC Threshold for Switching Off Soft-Start Current ISS VC Burst Mode Threshold VC Burst Mode Threshold Hysteresis SENSE Voltage at Burst Mode Operation Current Limit Threshold (VCC–VSENSE) FB Overvoltage Threshold Sense Input Current OSCILLATOR Switching Frequency Synchronization Pulse Threshold on SYNC Pin Synchronization Frequency Range VRSET Minimum On-Time (Measured at GATE Pin) Switching Frequency Foldback GATE DRIVER GATE Bias Voltage (VCC–VCAP) GATE Bias Voltage (VCAP–GND) GATE High Voltage (VCC–VGATE) GATE Peak Source Current GATE Low Voltage (VGATE–VCAP) GATE Peak Sink Current 9V ≤ VCC ≤ 60V, IGATE = 10mA VCC = 12V, IGATE = 15mA 4V ≤ VCC ≤ 8V, IGATE = 10mA 6V ≤ VCC ≤ 8V, IGATE = 15mA, VCC = 12V 4V ≤ VCC ≤ 60V, IGATE = –15mA CGATE = 10nF 8V ≤ VCC ≤ 60V, IGATE = 15mA 4V ≤ VCC < 8V, IGATE = 10mA CGATE = 10nF l l l The l denotes the specifications which apply over the full operating . temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, RSET = 392k, CCAP = 0.1μF No load on any outputs, unless otherwise specified. CONDITIONS VSYNC/MODE = 0V (Note 4) VSS = 0.1V to 1.5V VCC ≤ 60V, VC Rising, SYNC/MODE Open VCC ≤ 60V (VCC–VSENSE) at 30% Duty Cycle 70% Duty Cycle VCC ≤ 60V VC = 1.6V VSENSE = VCC RSET = 392k RSET = 200k Rising Edge VSYNC RSET = 392k RSET = 200k RSET = 392k 3V Buck Converter Circuit, ILOAD > 2A VFB = 0.3V l l l l l l l MIN TYP 5 0.84 0.04 30 20 MAX 0.4 UNITS V μA V V mV mV 80 100 8 0.1 120 2 230 460 1.3 mV % μA kHz kHz V kHz kHz V ns 170 320 200 400 230 460 1.2 350 35 7.0 6.8 0.2 50 7.9 0.85 0.5 2.5 0.1 0.05 2.5 300 600 75 8.8 1.5 2.8 0.8 0.5 kHz V V V V V A V V A Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3824E is guaranteed to meet performance specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 85°C temperature range are assured by design characterization and correlation with statistical process controls. The LTC3824I grade is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 3: This parameter is tested in a feedback loop that servos VFB to the reference voltage with the VC pin forced to 1V. Note 4: This specification represents the maximum voltage on VC where switching (GATE pin) is guaranteed to be off. 3824fc 3 LTC3824 TYPICAL PERFORMANCE CHARACTERISTICS (VCC-VCAP) vs IGATE at VDRIVE Low 8.5 8.4 2 8.3 VCC-VCAP (V) 8.2 8.1 8.0 7.9 7.8 7.7 7.6 0 10 20 30 IGATE (mA) 40 50 3824 G01 TA = 25°C unless otherwise noted. Switching Frequency Change vs VCC at RSET = 392kΩ 3 ICC vs VCC 3 2 ICC (mA) VFB = 0.75V 1 VFB = 0.85V ΔFREQUENCY (kHz) 50 60 3824 G02 1 0 –1 –2 0 0 10 20 30 VCC (V) 40 –3 0 10 20 30 VCC (V) 40 50 60 3824 G03 VREF Change vs VCC 0.4 700 600 0.2 FREQUENCY (kHz) ΔVREF (mV) 500 Switching Frequency vs RSET 2 ΔVREF vs Temperature 1 ΔVREF (mV) 400 3824 G05 3824 G06 0 400 300 0 –0.2 200 –0.4 0 10 20 30 VCC (V) 40 50 60 3824 G04 –1 100 100 200 RSET(kΩ) 300 –2 –40 –20 75 0 25 50 DIE TEMPERATURE (°C) 100 125 Burst Mode Disabled at ILOAD = 200mA, VOUT = 5V ILOAD = 200mA Burst Mode Operation VOUT = 3V VIN =12V, VOUT= 3V, ILOAD = 200mA VOUT 10mV/DIV VOUT 50mV/DIV INDUCTOR CURRENT 1A/DIV INDUCTOR CURRENT 1A/DIV 4μs/DIV 3824 G10 20μs/DIV 3824 G08 3824fc 4 LTC3824 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. Burst Mode Operation VOUT = 5V VIN =12V, VOUT= 5V, ILOAD = 200mA OUTPUT VOLTAGE AC COUPLED 100mV/DIV Load Current Step Response VOUT 50mV/DIV INDUCTOR CURRENT 1A/DIV INDUCTOR CURRENT 2A/DIV 50μs/DIV 3824 G09 100μs/DIV 3824 G10 PIN FUNCTIONS GND (Pin 1): Chip Ground Pin. SYNC/MODE (Pin 2): Synchronization Input and Burst Mode Operation Enable/Disable. If this pin is left open or pulled higher than 2V, Burst Mode operation will be enabled at light load and the typical threshold of entering Burst Mode operation is one third of current limit. If this pin is grounded or the synchronization pulse is present with a frequency greater than 20kHz then Burst Mode operation is disabled and the LTC3824 goes into pulse skipping at light loads. To synchronize the LTC3824, the duty cycle of the synchronizing pulse can range from 10% to 70% and the synchronizing frequency has to be higher than the programmed frequency. RSET (Pin 3): A resistor from RSET to ground sets the LTC3824 switching frequency. VC (Pin 4): The Output of the voltage error amplifier gm and the control signal of the current mode PWM control loop. Switching starts at 0.7V, and higher VC corresponds to higher inductor current. When VC is pulled below 25mV, the LTC3824 goes into micropower shutdown. VFB (Pin 5): Error Amplifier Inverting Input. A resistor divider to this pin sets the output voltage. When VFB is less than 0.5V, the switching frequency will fold back to 50kHz to reduce the minimum on-cycle. SS (Pin 6): Soft-Start Pin. A capacitor on this pin sets the output ramp-up rate. The typical time for SS to reach the programmed level is (C • 0.8V)/7μA. SENSE (Pin 7): Current Sense Input Pin. A sense resistor, RS, from VIN to SENSE sets the current limit to 100mV/RS. VCC (Pin 8): Chip Power Supply. Power supply bypassing is required. GATE (Pin 9): Gate Drive for The External P-channel MOSFET. Typical peak drive current is 2.5A and the drive voltage is clamped to 8V when VCC is higher than 9V. CAP (Pin 10): A Low ESR Capacitor of at Least 0.1μF is required from this pin to VCC to bypass the internal regulator for biasing the gate driver circuitry. Exposed Pad (Pin 11): GND. Must be soldered to PCB with expanded metal trace for rated thermal performance. 3824fc 5 LTC3824 BLOCK DIAGRAM SENSE VCC Burst Mode DISABLE VIN REFERENCE VREF B1 1.8V 100k SYNC/ MODE 2.5V 0.3μA GATE Q1 CCAP 0.1μF L VOUT RS + 1.1V SS M2 + 50pF + – – + + 1.5V RSET RFREQ 0.1V + R3 Burst Mode OPERATION CONTROL APPLICATIONS INFORMATION Operation The LTC3824 is a constant frequency current mode buck controller with programmable switching frequency up to 600kHz. Referring to the Block Diagram, the LTC3824’s basic functions include a transconductance amplifier gm to regulate the output voltage and control the current mode PWM current loop, the necessary logic to control the PWM switching cycles, a high speed gate driver to drive an external high power P-channel MOSFET and a voltage regulator to bias the gate driver circuit. In normal operation each switching cycle starts with switch turn-on and the inductor current is sampled through the current sense resistor. This current is amplified and then compared to the error amplifier output VC to turn the switch off. Voltage loop regulates the output voltage to the programmed level through the output resistor divider and the error amplifier. Amplifier E1 regulates the gate drive low to approximately 8V below VCC for VCC higher than 9V, and CCAP stabilizes the voltage. Note that when VCC is lower than 9V, gate drive high will be within 0.5V of VCC and gate drive low within 1V of ground. Important features include shutdown, current limit, softstart, synchronization and low quiescent current. 3824fc 6 – GND PWM + – SHUTDOWN Y6 + 0.025V D6 D7 D4 6μ 2.5V VC R1 2k C1 470pF CSS 0.1μF SS VREF 0.8V FB – GM + – – Y2 50KHz FOLDBACK SYNC DISABLE Y5 + + + – – + 2V Y1 S Q R OR1 OSC + + 8V CAP D1 C2 RF1 COUT – + Y3 2.5V SLOPE COMP R2 E1 M1 RF2 + 0.5V 3824 BD LTC3824 APPLICATIONS INFORMATION Burst Mode Operation The LTC3824 can be configured for Burst Mode operation to enhance light load efficiency (only 40μA quiescent current) and extend battery run time by leaving the SYNC/MODE pin open or pulling it higher than 2V. In this mode, when output load drops the loop control voltage VC also drops and when VC reaches approximately 0.9V at low duty cycle the LTC3824 goes into sleep mode with the switch turned off. During sleep mode the output voltage drops and VC rises up. When VC goes up to around 70mV the LTC3824 will turn on the switch and the burst cycle repeats. If the SYNC/MODE pin is grounded the Burst Mode operation will be disabled and the LTC3824 skips cycles at light load. Oscillation Frequency Setting and Synchronization The switching frequency of the LTC3824 can be set up to 600kHz by a resistor, RFREQ, from the RSET pin to ground. For 200kHz, RFREQ = 392k. See the Switching Frequency vs RFREQ graph in the Typical Performance Characteristics section. With a 100ns one-shot timer on-chip, the LTC3824 provides flexibility on the sync pulse width. The sync pulse threshold voltage level is about 1.2V. Short-Circuit Protection In normal operation when the output voltage is in regulation, VFB is regulated to 0.8V. If the output is shorted to ground and VFB drops below 0.5V the switching frequency will be reduced to 50kHz to allow the inductor current to discharge and prevent current runaway. Note that synchronization is enabled only when VFB is above 0.5V. Soft-Start During soft-start, the voltage on the SS pin (VSS) is the reference voltage that controls the output voltage and the output ramps up following VSS. The effective range of VSS is from 0V to 0.8V. The typical time for the output to reach the programmed level is: t SS = CSS • 0.8 V 7μA where CSS is the capacitor connected from the SS pin to GND. Overvoltage Protection To achieve good output regulation in Burst Mode operation, an overvoltage comparator, OVP with a threshold adap, tive to the VC voltage is used to monitor the FB voltage. In Burst Mode operation with low VC voltage, the OVP threshold is approximately 2% above VREF and the VREF is also shifted lower by 2% to contain the output ripple and to keep output regulation constant. As output load increases, OVP threshold increases with VC voltage to up to 8% above VREF. Undervoltage Lockout and Shutdown The undervoltage lockout threshold on VCC is 4V. The switch is allowed to turn on only when VCC is higher than 4V. When the VC pin is pulled down below 25mV the LTC3824 goes into micropower shutdown mode and only draws 7μA. Output Voltage Programming With a 0.8V feedback reference voltage, VREF, the output voltage, VOUT, is programmed by a resistor divider as shown in the Block Diagram. VOUT = 0.8V (1+RF1/RF2) Current Sense Resistor RS and Current Limit The maximum current the LTC3824 can deliver is determined by: IOUT(MAX) = 100mV/RS – IRIPPLE/2 where 100mV is the internal 100mV threshold across VCC and VSENSE, and IRIPPLE is the inductor peak-to-peak ripple current. RS should be placed very close to the power switch with very short traces. Good kelvin sensing is required for accurate current limit. 3824fc 7 LTC3824 APPLICATIONS INFORMATION Inductor Selection The maximum inductor current is determined by : IL(MAX) = IOUT(MAX) + IRIPPLE 2 (V – V ) • D where IRIPPLE = IN OUT f •L V +V and Duty Cycle D = OUT D VIN + VD The power dissipated by the MOSFET when the LTC3824 is in continuous mode is given by : PMOSFET = VOUT + VD (IOUT )2 (1+ δ)RDS(ON) VIN + VD + K(VIN )2 (IOUT )(CRSS )(f) The first term in the equation represents the I2R losses in the device and the second term is the switching losses. K (estimated as 1.7) is an empirical factor inversely related to the gate drive current and has the unit of 1/Amps. The δ term accounts for the temperature coefficient of the RDS(ON) of the MOSFET, which is typically 0.4%/°C. CRSS is the MOSFET reverse transfer capacitance. Figure 1 illustrates the variation of normalized RDS(ON) over temperature for a typical power MOSFET. 2.0 NORMALIZED ON-RESISTANCE VD is the catch diode D1 forward voltage and f is the switching frequency. A small inductance will result in larger ripple current, output ripple voltage and also larger inductor core loss. An empirical starting point for the inductor ripple current is about 40% of maximum DC current. L= (VIN– VOUT ) • D f • 0.4 •IOUT(MAX ) 1.5 The saturation current level of the inductor should be sufficiently larger than IL(MAX). Power MOSFET Selection Important parameters for the power MOSFET include the drain-to-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)) versus gateto-source voltage, the gate-to-source and gate-to-drain charges (QGS and QGD, respectively), the maximum drain current (ID(MAX)) and the MOSFET’s thermal resistance (RTH(JC)) and RTH(JA). The gate drive voltage is set by the 8V internal regulator. Consequently, at least 10V VGS rated MOSFETs are required in high voltage applications. In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coefficient of RDS(ON)). The power dissipation calculation should be based on the worst-cast specifications for VSENSE(MAX), the required load current at maximum duty cycle, the voltage and temperature ranges, and the RDS(ON) of the MOSFET listed in the data sheet. 1.0 0.5 0 –50 50 100 0 JUNCTION TEMPERATURE (°C) 150 3824 F01 Figure 1. Normalized RDS(ON) vs Temperature From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + PMOSFET • RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original assumed value used in the calculation. Output Diode Selection The catch diode carries load current during the switch off-time. The average diode current is therefore dependent 3824fc 8 LTC3824 APPLICATIONS INFORMATION on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The worst condition for the diode is when the output is shorted to ground. Under this condition the diode must safely handle the maximum current at close to 100% of the time. Therefore, the diode must be carefully chosen to meet the worst case voltage and current requirements. Under normal conditions, the average current conducted by the diode is: ID = IOUT • (1 – D) A fast switching Schottky diode must be used to optimize efficiency. CIN and COUT Selection A low ESR input capacitor, CIN, sized for the maximum RMS P-channel switch current is required to prevent large input voltage transients. The maximum RMS capacitor current is given by: IRMS = IOUT(MAX) VOUT VIN VIN –1 VOUT The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible noise. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power. Percentage efficiency can be expressed as: % Efficiency = 100%–(L1 + L2 + L3 +......) where L1, L2, L3...are the individual loss components as a percentage of the input power. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, the following are the main sources: 1. The supply current into VCC. The VCC current is the sum of the DC supply current and the MOSFET driver and control currents. The DC supply current into the VCC pin is typically about 1mA. The driver current results from switching the gate capacitance of the power MOSFET; this current is typically much larger than the DC current. Each time the MOSFET is switched on and off, a packet of gate charge QG is transferred from the CAP pin to VCC throughout the external bypass capacitor, CCAP. The resulting dQ/dt is a current that must be supplied to the capacitor by the internal regulator. IQ = 1mA + f • QG PIC = VIN • IQ 3824fc This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. The output ripple, ΔVOUT , is determined by: VOUT IL ESR + 1 8fCOUT 9 LTC3824 APPLICATIONS INFORMATION 2. Power MOSFET switching and condution losses: V +V PMOSFET = OUT D (IOUT )2 (1+ δ)RDS(ON) VIN + VD + K(VIN )2 (IOUT )(CRSS )(f) 3. The I2R losses of the current sense resistor: P(SENSE R) = (IOUT)2 • R • D where D is the duty cycle 4. The inductor loss due to winding resistance: P(WINDING) = (IOUT)2 • RW 5. Loss of the catch diode: P(DIODE) = IOUT • VD • (1–D) 6. Other losses, including CIN and COUT ESR dissipation and inductor core losses, generally account for less than 2% of total losses. PCB Layout Considerations To achieve best performance from a LTC3824 circuit, the PC board layout must be carefully designed. For lower power applications, a 2-layer PC board is sufficient. However, at higher power levels, a multiple layer PC board is recommended. Using a solid ground plane under the circuit is the easiest way to ensure that switching noise does not affect the operation. In order to help dissipate the power from the MOSFET and diode, keep the ground plane on the layers closest to the layers where power components are mounted. Use power planes for the MOSFET and diode in order to improve the spreading of heat from these components into the PCB. For best electrical performance the LTC3824 circuit should be laid out as following: Place all power components in a tight area. This will minimize the size of high current loops. Orient the input and output capacitors and current sense resistor in a way that minimizes the distance between the pads connected to ground plane. Place the LTC3824 and associated components tightly together and next to the section with power components. Use a local via to ground plane for all pads that connect to ground. Use multiple vias for power components. Connect the current sense input directly to the current sense resistor pad. VCC and SENSE are the inputs of the internal current sense amplifier and should be connected as close to the sense resistor pads as possible. A 100pF capacitor is required across the VCC and sense pins for noise filtering and should be placed as close to the pins as possible. Design Example As an example, the LTC3824 is designed for an automotive 5V power supply with the following specifications: Maximum IOUT = 2A, typical VIN = 6V to 18V and can reach 60V briefly during load dump condition, and operating switching frequency = 400kHz. For f = 400kHz, RSET is chosen to be 180k. Allow inductor ripple current to be 0.8A (40% of the maximum output current) at VIN = 18V, L= (18V – 5V)5V = 12μH (400kHz • 0.8A)18 V COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design a 220μF tantalum capacitor is used. For worse-case conditions CIN should be rated for at least 1A ripple current (half of the maximum output current). A 47μF tantalum capacitor is adequate. A current limit of 3.3A is selected and RSENSE can be calculated by : RSENSE = 100mV = 0.03 3.3A and a 25mΩ resistor can be used. 3824fc 10 LTC3824 TYPICAL APPLICATION 12V 2A Buck Converter VIN 12.5V TO 60V CIN2 2.2μF 100V CAP CCAP 0.1μF CIN1: SANYO 63MV68AX CIN2: TDK C4532X7R2A225M COUT: SANYO OSCON, 16SP270M, TDKC2012X7RIC105K L1: D104C919AS-330M D1: SS3H9 Q1: Si7465DP 100pF RS 0.025Ω CIN1 33μF 100V + VCC SYNC/MODE SENSE LTC3824 RSET 301k GND 1000pF D1 68k SS 0.1μF VC 15k 3824 TA02 GATE Q1 L1 33μH + 113k COUT 270μF VOUT 12V 1μF 2A 16V X7R VFB 8.06k 1000pF PACKAGE DESCRIPTION MSE Package 10-Lead Plastic MSOP Exposed Die Pad , (Reference LTC DWG # 05-08-1664 Rev B) BOTTOM VIEW OF EXPOSED PAD OPTION 1 2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004) 3.00 0.102 (.118 .004) (NOTE 3) 2.794 (.110 0.102 .004) 0.889 (.035 0.127 .005) 10 9 8 7 6 0.497 0.076 (.0196 .003) REF 5.23 (.206) MIN 2.083 (.082 0.102 3.20 – 3.45 .004) (.126 – .136) 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 10 12345 DETAIL “A” 0.18 (.007) GAUGE PLANE 0.254 (.010) DETAIL “A” 0 – 6 TYP SEATING PLANE 0.53 0.152 (.021 .006) 1.10 (.043) MAX 0.86 (.034) REF 0.17 – 0.27 (.007 – .011) TYP NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.50 (.0197) BSC 0.1016 (.004 0.0508 .002) MSOP (MSE) 0307 REV B 3824fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC3824 TYPICAL APPLICATION 3V 2A Buck Converter VIN 4.5V TO 60V CIN2 2.2μF 100V CIN1 33μF 100V CCAP 0.1μF CAP CIN1: SANYO 63MV68AX CIN2: TDK C4532X7R2A225M COUT: SANYO OSCON, 16SP270M, TDKC2012X7RIC105K L1: D104C919AS-330M D1: SS3H9 Q1: Si7465DP RS 0.025Ω + VCC 100pF SYNC/MODE SENSE LTC3824 RSET 301k GND 100pF D1 51Ω SS 0.1μF VC 15k 1000pF VFB 80.6k 3824 TA02a GATE Q1 L1 33μH + 223k COUT 270μF VOUT 3V 1μF 2A 16V RELATED PARTS PART NUMBER LTC1624 LT1976 LT3724 LTC3703/LTC3703-5 LT3800 LT3844 DESCRIPTION 36V Current Mode Controller 60V Monolithic Regulator 60V Current Mode DC/DC Controller 100V and 60V Synchronous Controllers 60V Current Mode Step-Down Controller, Synchronous 60V Current Mode Step-Down Controller COMMENTS 3.5V ≤ VIN ≤ 36V; N-Channel MOSFET; S8 3.3V ≤ VIN ≤ 60V; 1.5A Peak Switch Current 4V ≤ VIN ≤ 60V; 1.223V ≤ VOUT ≤ 36V; 200kHz High Efficiency; Buck or BOOST Topology 4V ≤ VIN ≤ 60V; 0.8V ≤ VOUT ≤ 36V; 16-Lead TSSOP Synchronizable, Adjustable Frequency; 4V ≤ VIN ≤ 60V 3824fc 12 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 1008 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006