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LTC6604IUFF-10-TRPBF

LTC6604IUFF-10-TRPBF

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC6604IUFF-10-TRPBF - Dual Very Low Noise, Differential Amplifi er and 10MHz Lowpass Filter - Linea...

  • 数据手册
  • 价格&库存
LTC6604IUFF-10-TRPBF 数据手册
FEATURES n LT6604-10 Dual Very Low Noise, Differential Amplifier and 10MHz Lowpass Filter DESCRIPTION The LT®6604-10 consists of two matched, fully differential amplifiers, each with a 4th order, 10MHz lowpass filter. The fixed frequency lowpass filter approximates a Chebyshev response. By integrating a filter and a differential amplifier, distortion and noise are made exceptionally low. At unity gain, the measured in band signal-to-noise ratio is an impressive 82dB. At higher gains, the input referred noise decreases, allowing the part to process smaller input differential signals without significantly degrading the signal-to-noise ratio. Gain and phase are highly matched between the two channels. Gain for each channel is independently programmed using two external resistors. The LT6604-10 enables level shifting by providing an adjustable output common mode voltage, making it ideal for directly interfacing to ADCs. The LT6604-10 is fully specified for 3V operation. The differential design enables outstanding performance at a 2VP-P signal level for a single 3V supply. See the back page of this datasheet for a complete list of related single and dual differential amplifiers with integrated 2.5MHz to 20MHz lowpass filters. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n n n n n n Dual Differential Amplifier with 10MHz Lowpass Filters 4th Order Filters Approximates Chebyshev Response Guaranteed Phase and Gain Matching Resistor-Programmable Differential Gain 82dB Signal-to-Noise (3V Supply, 2VP-P Output) Low Distortion, 2VP-P, 800Ω Load 1MHz: 88dBc 2nd, 97dBc 3rd 5MHz: 74dBc 2nd, 77dBc 3rd Specified for Operation with 3V, 5V and ±5V Supplies Fully Differential Inputs and Outputs Adjustable Output Common Mode Voltage Small 4mm × 7mm × 0.75mm QFN Package APPLICATIONS n n n n n n n Dual Differential ADC Driver Plus Filter Single-Ended to Differential Converter Matched, Dual, Differential Filter Stage Common Mode Translation of Differential Signals High Speed ADC Antialiasing and DAC Smoothing in Wireless Infrastructure or Networking Applications High Speed Test and Measurement Equipment Medical Imaging TYPICAL APPLICATION 3V LT6604-10 0.01μF V +A 3V 50Ω 50Ω 18pF LTC22xx DUAL ADC Channel to Channel Gain Matching, VS = 5V 20 50 TYPICAL UNITS 18 TA = 25°C GAIN = 1 16 f = 10MHz IN 14 12 10 8 + 402Ω +INA VMIDA VOCMA + – + –OUTA +OUTA V +B + AIN DOUT – 0.01μF 402Ω –INA – + – + 402Ω 3V 50Ω 50Ω 18pF +INB VMIDB VOCMB – + V– –OUTB +OUTB + AIN DOUT 6 4 2 0 660410 TA01 – 402Ω –INB – – –0.25 –0.2–0.15 –0.1–0.05 0 0.05 0.1 0.15 0.2 0.25 GAIN MATCH (dB) 660410 TA01b 660410fa 1 LT6604-10 ABSOLUTE MAXIMUM RATINGS Total Supply Voltage .................................................11V Operating Temperature Range (Note 6).... –40°C to 85°C Specified Temperature Range (Note 7) .... –40°C to 85°C Junction Temperature ........................................... 150°C Storage Temperature Range................... –65°C to 150°C Input Voltage +IN, –IN, VOCM, VMID (Note 8) ..............................±VS Input Current +IN, –IN, VOCM, VMID (Note 8) .........................±10mA Lead Temperature (Soldering, 10 sec) .................. 300°C PIN CONFIGURATION TOP VIEW 34 VMIDA 33 NC 32 V– 31 V– NC 1 +INA 2 NC 3 –INA 4 NC 5 VOCMA 6 V– 7 VMIDB 8 NC 9 +INB 10 NC 11 –INB 12 NC 13 VOCMB 14 V+B 17 NC 15 NC 16 35 30 NC 29 –OUTA 28 NC 27 +OUTA 26 NC 25 V+A 24 V– 23 NC 22 NC 21 –OUTB 20 NC 19 +OUTB 18 NC UFF PACKAGE 34-LEAD (4mm × 7mm) PLASTIC QFN TJMAX = 150°C, θJA = 34°C/W, θJC = 2.7°C/W EXPOSED PAD (PIN 35) IS V–, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LT6604CUFF-10#PBF LT6604IUFF-10#PBF TAPE AND REEL LTC6604CUFF-10#TRPBF LTC6604IUFF-10#TRPBF PART MARKING* 60410 60410 PACKAGE DESCRIPTION 34-Lead (4mm × 7mm) Plastic QFN 34-Lead (4mm × 7mm) Plastic QFN SPECIFIED TEMPERATURE RANGE 0°C to 70°C –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS PARAMETER Filter Gain Either Channel, VS = 3V CONDITIONS The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless otherwise specified VS = 5V (V+ = 5V, V– = 0V), RIN = 402Ω, and RLOAD = 1k. MIN l l l l l l TYP 0 0 –0.1 0.1 0.3 –28 –44 MAX 0.5 0.1 0.3 1 1.7 –25 UNITS dB dB dB dB dB dB dB VIN = 2VP-P, fIN = DC to 260kHz VIN = 2VP-P, fIN =1MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 5MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 8MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 10MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 30MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 50MHz (Gain Relative to 260kHz) –0.4 –0.1 –0.4 –0.3 –0.2 660410fa 2 LT6604-10 ELECTRICAL CHARACTERISTICS PARAMETER Matching of Filter Gain, VS = 3V CONDITIONS VIN = 2VP-P, fIN = DC to 260kHz VIN = 2VP-P, fIN =1MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 5MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 8MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 10MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 30MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 50MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN =1MHz VIN = 2VP-P, fIN = 5MHz VIN = 2VP-P, fIN = 8MHz VIN = 2VP-P, fIN = DC to 260kHz VIN = 2VP-P, fIN =1MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 5MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 8MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 10MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 30MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 50MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = DC to 260kHz VIN = 2VP-P, fIN =1MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 5MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 8MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 10MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 30MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN = 50MHz (Gain Relative to 260kHz) VIN = 2VP-P, fIN =1MHz VIN = 2VP-P, fIN = 5MHz VIN = 2VP-P, fIN = 8MHz VIN = 2VP-P, fIN = DC to 260kHz VIN = 2VP-P, fIN = DC to 260kHz VS = 3V VS = 5V VS = ±5V l l l l l l l l l l l l l l l l l l l l l l l l The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless otherwise specified VS = 5V (V+ = 5V, V– = 0V), RIN = 402Ω, and RLOAD = 1k. MIN TYP 0.1 0.01 0.03 0.08 0.15 0.3 0.4 0.2 0.5 1 –0.5 –0.1 –0.4 –0.4 –0.3 0 0 –0.1 0.1 0.2 –28 –44 0.1 0.01 0.03 0.08 0.15 0.3 0.4 0.2 0.5 1 –0.6 11.4 11.4 11.4 –0.1 12 12 12 780 56 88 97 74 77 –119 –111 l l l l l l l l l MAX 0.6 0.1 0.3 0.4 0.7 1.8 2.8 1 3 4 0.5 0.1 0.3 0.9 1.4 –25 0.6 0.1 0.3 0.4 0.7 1.8 2.8 1 3 4 0.4 12.6 12.6 12.6 UNITS dB dB dB dB dB dB dB deg deg deg dB dB dB dB dB dB dB dB dB dB dB dB dB dB deg deg deg dB dB dB dB ppm/°C μVRMS dBc dBc dBc dBc dB dB VP-P_DIFF VP-P_DIFF μA Matching of Filter Phase, VS = 3V Filter Gain Either Channel, VS = 5V Matching of Filter Gain, VS = 5V Matching of Filter Phase, VS = 5V Filter Gain Either Channel, VS = ±5V Filter Gain, RIN = 100Ω Filter Gain Temperature Coefficient (Note 2) Noise Distortion (Note 4) fIN = 260kHz, VIN = 2VP-P Noise BW = 10kHz to 10MHz, RIN = 402Ω 1MHz, 2VP-P, RL = 800Ω 5MHz, 2VP-P, RL = 800Ω 2nd Harmonic 3rd Harmonic 2nd Harmonic 3rd Harmonic Channel Separation (Note 9) Differential Output Swing 1MHz, 2VP-P, RL = 800Ω 5MHz, 2VP-P, RL = 800Ω Measured Between +OUT and –OUT, VOCM shorted to VMID VS = 5V VS = 3V Average of +IN and –IN RIN = 402Ω VS = 3V VS = 5V VS = ±5V VS = 3V VS = 5V VS = ±5V 3.85 3.85 –85 5.0 4.9 –40 5 10 8 5 5 5 20 30 35 13 22 30 Input Bias Current Input Referred Differential Offset mV mV mV mV mV mV RIN = 100Ω 660410fa 3 LT6604-10 ELECTRICAL CHARACTERISTICS PARAMETER Differential Offset Drift Input Common Mode Voltage (Note 3) Differential Input = 500mVP-P, RIN = 100Ω VS = 3V VS = 5V VS = ±5V VS = 3V VS = 5V VS = ±5V l l l l l l l l l l l The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Unless otherwise specified VS = 5V (V+ = 5V, V– = 0V), RIN = 402Ω, and RLOAD = 1k. CONDITIONS MIN 0 0 –2.5 1 1.5 –1 –35 –40 –55 2.45 4.3 –15 –10 5 5 –5 61 VS = 5V VS = 3V VOCM = VMID = VS/2 VS = 3V, VS = 5V VS = 3V, VS = 5V VS = ±5V VS = 5V VS = 3V 2.51 1.5 5.5 –3 –3 35 36 39 43 46 2.56 7.7 TYP 10 1.5 3 1 1.5 3 2 40 40 35 MAX UNITS μV/°C V V V V V V mV mV mV dB V V kΩ μA μA mA mA mA Output Common Mode Voltage (Note 5) Differential Output = 2VP-P, VMID at Midsupply Output Common Mode Offset (with Respect to VOCM) Common Mode Rejection Ratio Voltage at VMID VMID Input Resistance VOCM Bias Current Power Supply Current (per Channel) VS = 3V VS = 5V VS = ±5V l l l l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: This is the temperature coefficient of the internal feedback resistors assuming a temperature independent external resistor (RIN). Note 3: The input common mode voltage is the average of the voltages applied to the external resistors (RIN). Specification guaranteed for RIN ≥ 100Ω. Note 4: Distortion is measured differentially using a differential stimulus. The input common mode voltage, the voltage at VOCM, and the voltage at VMID are equal to one half of the total power supply voltage. Note 5: Output common mode voltage is the average of the +OUT and –OUT voltages. The output common mode voltage is equal to VOCM. Note 6: The LT6604C-10 is guaranteed functional over the operating temperature range –40°C to 85°C. Note 7: The LT6604C-10 is guaranteed to meet 0°C to 70°C specifications and is designed, characterized and expected to meet the extended temperature limits, but is not tested at –40°C and 85°C. The LT6604I-10 is guaranteed to meet specified performance from –40°C to 85°C. Note 8: Input pins (+IN, –IN, VOCM and VMID) are protected by steering diodes to either supply. If the inputs should exceed either supply voltage, the input current should be limited to less than 10mA. In addition, the inputs +IN, –IN are protected by a pair of back-to-back diodes. If the differential input voltage exceeds 1.4V, the input current should be limited to less than 10mA. Note 9: Channel separation (the inverse of crosstalk) is measured by driving a signal into one input, while terminating the other input. Channel separation is the ratio of the resulting output signal at the driven channel to the output at the channel that is not driven. 660410fa 4 LT6604-10 TYPICAL PERFORMANCE CHARACTERISTICS Amplitude Response 10 0 –10 –20 –30 –40 –50 –60 –70 –80 100k 1M 10M FREQUENCY (Hz) 100M 660410 G01 Passband Gain and Group Delay VS = 5V GAIN = 1 1 0 –1 –2 GAIN (dB) –3 –4 –5 –6 –7 V = 5V S –8 GAIN = 1 TA = 25°C –9 0.5 GROUP DELAY GAIN 60 55 50 45 40 35 30 25 20 15 5.3 10.1 FREQUENCY (MHz) 10 14.9 660410 G02 DIFFOUT DIFFIN ) GROUP DELAY (ns) GAIN 20LOG ( Passband Gain and Group Delay 12 11 10 9 GAIN (dB) 8 7 6 5 4 V = 5V S 3 GAIN = 4 TA = 25°C 2 0.5 GROUP DELAY GAIN 60 55 OUTPUT IMPEDANCE (Ω) 50 45 40 35 30 25 20 15 5.3 10.1 FREQUENCY (MHz) 10 14.9 660410 G03 Output Impedance vs Frequency (OUT + or OUT–) 100 80 Common Mode Rejection Ratio VS = 5V 75 GAIN = 1 VIN = 1VP-P 70 TA = 25°C 65 CMRR (dB) 60 55 50 45 40 GROUP DELAY (ns) 10 1 0.1 100k 1M 10M FREQUENCY (Hz) 100M 660410 G04 35 100k 1M 10M FREQUENCY (Hz) 100M 660410 G05 Power Supply Rejection Ratio 90 80 70 DISTORTION (dBc) 60 PSRR (dB) 50 40 30 20 10 0 VS = 3V VIN = 200mVP-P TA = 25°C V+ TO DIFFOUT 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M –50 –60 –70 –80 –90 –100 –40 Distortion vs Frequency VIN = 2VP-P, VS = 3V, RL = 800Ω at Each Output, TA = 25°C, Gain = 1 DIFFERENTIAL INPUT, 2ND HARMONIC DIFFERENTIAL INPUT, 3RD HARMONIC SINGLE-ENDED INPUT, 2ND HARMONIC SINGLE-ENDED INPUT, 3RD HARMONIC –40 –50 DISTORTION (dBc) –60 –70 –80 –90 –100 0.1 1 FREQUENCY (MHz) 10 660410 G07 Distortion vs Frequency VIN = 2VP-P, VS = ± 5V, RL = 800Ω at Each Output, TA = 25°C, Gain = 1 DIFFERENTIAL INPUT, 2ND HARMONIC DIFFERENTIAL INPUT, 3RD HARMONIC SINGLE-ENDED INPUT, 2ND HARMONIC SINGLE-ENDED INPUT, 3RD HARMONIC 0.1 1 FREQUENCY (MHz) 10 660410 G08 660410 G06 660410fa 5 LT6604-10 TYPICAL PERFORMANCE CHARACTERISTICS Distortion vs Signal Level VS = 3V, RL = 800Ω at Each Output, TA = 25°C, Gain = 1 –40 –50 DISTORTION (dBc) –60 –70 –80 –90 –100 0 1 2 3 INPUT LEVEL (VP-P) 4 5 660410 G09 Distortion vs Signal Level VS = ± 5V, RL = 800Ω at Each Output, TA = 25°C, Gain = 1 –40 –50 DISTORTION (dBc) –60 –70 –80 –90 –100 –110 0 1 2 3 4 5 660410 G10 Distortion vs Input Common Mode Level, 2VP-P, 1MHz Input, 1x Gain, RL = 800Ω at Each Output, TA = 25°C –40 DISTORTION COMPONENT (dBc) –50 –60 –70 –80 –90 2ND HARMONIC, VS = 3V 3RD HARMONIC, VS = 3V 2ND HARMONIC, VS = 5V 3RD HARMONIC, VS = 5V 2ND HARMONIC, 5MHz INPUT 3RD HARMONIC, 5MHz INPUT 2ND HARMONIC, 1MHz INPUT 3RD HARMONIC, 1MHZ INPUT 2ND HARMONIC, 5MHz INPUT 3RD HARMONIC, 5MHz INPUT 2ND HARMONIC, 1MHz INPUT 3RD HARMONIC, 1MHZ INPUT –100 –3 INPUT LEVEL (VP-P) 2 3 –1 0 1 –2 INPUT COMMON MODE VOLTAGE RELATIVE TO VMID (V) 660410 G11 Distortion vs Input Common Mode Level, 0.5VP-P, 1MHz Input, 4x Gain, RL = 800Ω at Each Output, TA = 25°C –40 DISTORTION COMPONENT (dBc) –50 –60 –70 –80 –90 2ND HARMONIC, VS = 3V 3RD HARMONIC, VS = 3V 2ND HARMONIC, VS = 5V 3RD HARMONIC, VS = 5V 40 38 SUPPLY CURRENT (mA) 36 34 32 30 28 26 –3 2 3 –1 0 1 –2 INPUT COMMON MODE VOLTAGE RELATIVE TO VMID (V) 660410 G12 24 Single Channel Supply Current vs Total Supply Voltage TA = 85°C VOUT+ 50mV/DIV TA = 25°C DIFFERENTIAL INPUT 200mV/DIV TA = –40°C Transient Response, Differential Gain = 1 100ns/DIV 660410 G14 –100 2 3 6 7 4 5 8 9 TOTAL SUPPLY VOLTAGE (V) 10 660410 G13 Channel Separation vs Frequency (Note 9) –20 VIN = 2VP-P VS = 5V –40 RL = 800Ω AT EACH OUTPUT GAIN = 1 –60 –80 –100 –120 –140 0.1 –40 DISTORTION COMPONENT (dBc) –50 –60 –70 –80 –90 Distortion vs Output Common Mode Level, 2VP-P 1MHz Input, 1x Gain, TA = 25°C CHANNEL SEPARATION (dB) 2ND HARMONIC, VS = 3V 3RD HARMONIC, VS = 3V 2ND HARMONIC, VS = 5V 3RD HARMONIC, VS = 5V 2ND HARMONIC, VS = ±5V 3RD HARMONIC, VS = ±5V –100 1 10 FREQUENCY (MHz) 100 660410 G15 –1 1.5 0 0.5 1 –0.5 (VOCM – VMID) VOLTAGE (V) 2 660410 G16 660410fa 6 LT6604-10 PIN FUNCTIONS +INA and –INA (Pins 2, 4): Channel A Input Pins. Signals can be applied to either or both input pins through identical external resistors, RIN. The DC gain from differential inputs to the differential outputs is 402Ω/RIN. VOCMA (Pin 6): DC Common Mode Reference Voltage for the 2nd Filter Stage in Channel A. Its value programs the common mode voltage of the differential output of the filter. Pin 6 is a high impedance input, which can be driven from an external voltage reference, or Pin 6 can be tied to Pin 34 on the PC board. Pin 6 should be bypassed with a 0.01μF ceramic capacitor unless it is connected to a ground plane. V– (Pins 7, 24, 31, 32, 35): Negative Power Supply Pin (can be ground). VMIDB (Pin 8): The VMIDB pin is internally biased at midsupply, see Block Diagram. For single supply operation the VMIDB pin should be bypassed with a quality 0.01μF ceramic capacitor to ground. For dual supply operation, Pin 8 can be bypassed or connected to a high quality DC ground. A ground plane should be used. A poor ground will increase noise and distortion. Pin 8 sets the output common mode voltage of the 1st filter stage in channel B. It has a 5.5kΩ impedance, and it can be overridden with an external low impedance voltage source. +INB and –INB (Pins 10, 12): Channel B Input Pins. Signals can be applied to either or both input pins through identical external resistors, RIN. The DC gain from differential inputs to the differential outputs is 402Ω/RIN. VOCMB (Pin 14): Is the DC Common Mode Reference Voltage for the 2nd Filter Stage in Channel B. Its value programs the common mode voltage of the differential output of the filter. Pin 14 is a high impedance input, which can be driven from an external voltage reference, or Pin 14 can be tied to Pin 8 on the PC board. Pin 14 should be bypassed with a 0.01μF ceramic capacitor unless it is connected to a ground plane. V+A and V+B (Pins 25, 17): Positive Power Supply Pins for Channels A and B. For a single 3.3V or 5V supply (Pins 7, 24, 31, 32 and 35 grounded) a quality 0.1μF ceramic bypass capacitor is required from the positive supply pin (Pins 25, 17) to the negative supply pin (Pins 7, 24, 31, 32 and 35). The bypass should be as close as possible to the IC. For dual supply applications, bypass the negative supply pins to ground and Pins 25 and 17 to ground with a quality 0.1μF ceramic capacitor. +OUTB and –OUTB (Pins 19, 21): Output Pins. Pins 19 and 21 are the filter differential outputs for channel B. With a typical short-circuit current limit greater than ±40mA, each pin can drive a 100Ω and/or 50pF load to AC ground. +OUTA and –OUTA (Pins 27, 29): Output Pins. Pins 27 and 29 are the filter differential outputs for channel A. With a typical short-circuit current limit greater than ±40mA, each pin can drive a 100Ω and/or 50pF load to AC ground. VMIDA (Pin 34): The VMIDA pin is internally biased at midsupply, see Block Diagram. For single supply operation the VMIDA pin should be bypassed with a quality 0.01μF ceramic capacitor to ground. For dual supply operation, Pin 34 can be bypassed or connected to a high quality DC ground. A ground plane should be used. A poor ground will increase noise and distortion. Pin 34 sets the output common mode voltage of the 1st filter stage in channel A. It has a 5.5kΩ impedance, and it can be overridden with an external low impedance voltage source. Exposed Pad (Pin 35): V–. The Exposed Pad must be soldered to the PCB. 660410fa 7 LT6604-10 BLOCK DIAGRAM VMIDA 34 NC 1 RIN +INA NC 33 V+A 11k 2 402Ω V– V– 32 V– 31 30 NC PROPRIETARY LOWPASS FILTER STAGE 200Ω VIN+A 29 –OUTA 11k NC 3 RIN 28 NC VIN A – –INA 4 + – OP AMP VOCM – + 200Ω +– VOCM 27 +OUTA NC 5 200Ω –+ 200Ω 26 NC VOCMA 6 402Ω V– 7 V+B 11k VMIDB 8 402Ω V– 25 V+A 24 V– PROPRIETARY LOWPASS FILTER STAGE 200Ω 22 NC 23 NC 11k NC 9 RIN +INB VIN+B 10 + – OP AMP VOCM – + 200Ω +– VOCM 21 –OUTB NC 11 RIN –INB 200Ω –+ 20 NC 200Ω VIN–B 12 402Ω 19 +OUTB NC 13 14 VOCMB 15 NC 16 NC 17 V+B 18 NC 660410 BD 660410fa 8 LT6604-10 APPLICATIONS INFORMATION Interfacing to the LT6604-10 Note: The LT6604-10 contains two identical filters. The following applications information only refers to one filter. The two filters are independent except that they share the same negative supply voltage V–. The two filters can be used simultaneously by replicating the example circuits. The referenced pin numbers correspond to the A channel filter The LT6604-10 channel requires two equal external resistors, RIN, to set the differential gain to 402Ω/RIN. The inputs to the filter are the voltages VIN+ and VIN– presented to these external components, Figure 1. The difference between VIN+ and VIN– is the differential input voltage. The average of VIN+ and VIN– is the common mode input voltage. Similarly, the voltages VOUT+ and VOUT– appearing at Pins 27 and 29 of the LT6604-10 are the filter outputs. The difference between VOUT+ and VOUT– is the differential output voltage. The average of VOUT+ and VOUT– is the common mode output voltage. Figure 1 illustrates the LT6604-10 operating with a single 3.3V supply and unity passband gain; the input signal is DC coupled. The common mode input voltage is 0.5V, and the differential input voltage is 2VP-P. The common mode output voltage is 1.65V, and the differential output voltage is 2VP-P for frequencies below 10MHz. The common mode output voltage is determined by the voltage at VOCM. Since VOCM is shorted to VMID, the output common mode is the mid-supply voltage. In addition, the common mode input voltage can be equal to the mid-supply voltage of VMID. Figure 2 shows how to AC couple signals into the LT660410. In this instance, the input is a single-ended signal. AC coupling allows the processing of single-ended or differential signals with arbitrary common mode levels. The 0.1μF coupling capacitor and the 402Ω gain setting resistor form a high pass filter, attenuating signals below 4kHz. Larger values of coupling capacitors will proportionally reduce this highpass 3dB frequency. 3.3V V 3 2 1 0 VIN+ VIN VIN– t + 0.1μF – V 3 VOUT+ VOUT– 2 1 0 660410 F01 402Ω VIN 0.01μF 402Ω 4 – 27 34 1/2 + LT6604-10 6 2 25 VOUT+ VOUT– t + 7 – 29 Figure 1 3.3V V 0.1μF 2 1 0 –1 VIN+ 0.1μF t VIN + 0.1μF 402Ω 4 – 27 34 1/2 + LT6604-10 6 2 25 3 VOUT+ VOUT– 2 1 0 V VOUT+ VOUT– 0.01μF 402Ω + 7 – 29 660410 F02 Figure 2 660410fa 9 LT6604-10 APPLICATIONS INFORMATION In Figure 3 the LT6604-10 is providing 12dB of gain. The gain resistor has an optional 62pF in parallel to improve the passband flatness near 10MHz. The common mode output voltage is set to 2V. Use Figure 4 to determine the interface between the LT6604-10 and a current output DAC. The gain, or “transimpedance,” is defined as A = VOUT/IIN. To compute the transimpedance, use the following equation: 402 • R1 A= (Ω) (R1+ R2) By setting R1 + R2 = 402Ω, the gain equation reduces to A = R1 (Ω). The voltage at the pins of the DAC is determined by R1, R2, the voltage on VMID and the DAC output current (IIN+ or IIN–). Consider Figure 4 with R1 = 49.9Ω and R2 = 348Ω. The voltage at VMID, for VS = 3.3V, is 1.65V. The voltage at the DAC pins is given by: 62pF V 3 2 1 0 500mVP-P (DIFF) VIN+ VIN– t 62pF 0.01μF VIN + VDAC = VMID • R1 R1• R2 + IIN • R1+ R2 + 402 R1+ R2 = 103mV + IIN • 43.6Ω IIN is IIN+ or IIN–. The transimpedance in this example is 50.4Ω. Evaluating the LT6604-10 The low impedance levels and high frequency operation of the LT6604-10 require some attention to the matching networks between the LT6604-10 and other devices. The previous examples assume an ideal (0Ω) source impedance and a large (1k) load resistance. Among practical examples where impedance must be considered is the evaluation of the LT6604-10 with a network analyzer. 5V 0.1μF V 3 VOUT+ 2 VOUT– 1 0 VOUT– 25 VIN – 100Ω 4 – 27 34 1/2 + LT6604-10 6 2 VOUT+ + 7 – 29 100Ω + – 2V 660410 F03 t Figure 3 CURRENT OUTPUT DAC IIN– R1 IIN+ R1 R2 4 3.3V 0.1μF 25 VOUT+ VOUT– NETWORK ANALYZER SOURCE 50Ω COILCRAFT TTWB-1010 1:1 388Ω 4 53.6Ω 2.5V 0.1μF COILCRAFT TTWB-16A 4:1 402Ω NETWORK ANALYZER INPUT 0.01μF R2 27 – 34 1/2 + 6 LT6604-10 2 25 + 7 – 27 – 34 1/2 + LT6604-10 6 2 50Ω 402Ω 660410 F05 29 + 7 – 29 388Ω 0.1μF 402 • R1 VOUT+ – VOUT– = R1 + R2 IIN+ – IIN– 660410 F04 –2.5V Figure 4 Figure 5 660410fa 10 LT6604-10 APPLICATIONS INFORMATION Figure 5 is a laboratory setup that can be used to characterize the LT6604-10 using single-ended instruments with 50Ω source impedance and 50Ω input impedance. For a unity gain configuration the LT6604-10 requires an 402Ω source resistance yet the network analyzer output is calibrated for a 50Ω load resistance. The 1:1 transformer, 53.6Ω and 388Ω resistors satisfy the two constraints above. The transformer converts the single-ended source into a differential stimulus. Similarly, the output of the LT6604-10 will have lower distortion with larger load resistance yet the analyzer input is typically 50Ω. The 4:1 turns (16:1 impedance) transformer and the two 402Ω resistors of Figure 5, present the output of the LT6604-10 with a 1600Ω differential load, or the equivalent of 800Ω to ground at each output. The impedance seen by the network analyzer input is still 50Ω, reducing reflections in the cabling between the transformer and analyzer input. Differential and Common Mode Voltage Ranges The differential amplifiers inside the LT6604-10 contain circuitry to limit the maximum peak-to-peak differential voltage through the filter. This limiting function prevents excessive power dissipation in the internal circuitry and provides output short-circuit protection. The limiting function begins to take effect at output signal levels above 2VP-P and it becomes noticeable above 3.5VP-P. This is illustrated in Figure 6; the LT6604-10 channel was configured with unity passband gain and the input of the filter was driven with a 1MHz signal. Because this voltage 20 0 OUTPUT LEVEL (dBV) –20 –40 –60 –80 1dB PASSBAND GAIN COMPRESSION POINTS limiting takes place well before the output stage of the filter reaches the supply rails, the input/output behavior of the IC shown in Figure 6 is relatively independent of the power supply voltage. The two amplifiers inside the LT6604-10 channel have independent control of their output common mode voltage (see the Block Diagram section). The following guidelines will optimize the performance of the filter. VMID can be allowed to float, but it must be bypassed to an AC ground with a 0.01μF capacitor or some instability may be observed. VMID can be driven from a low impedance source, provided it remains at least 1.5V above V– and at least 1.5V below V+. An internal resistor divider sets the voltage of VMID. While the internal 11k resistors are well matched, their absolute value can vary by ±20%. This should be taken into consideration when connecting an external resistor network to alter the voltage of VMID. VOCM can be shorted to VMID for simplicity. If a different common mode output voltage is required, connect VOCM to a voltage source or resistor network. For 3V and 3.3V supplies the voltage at VOCM must be less than or equal to the mid supply level. For example, voltage (VOCM) ≤ 1.65V on a single 3.3V supply. For power supply voltages higher than 3.3V the voltage at VOCM can be set above mid supply. The voltage on VOCM should not be more than 1V below the voltage on VMID. The voltage on VOCM should not be more than 2V above the voltage on VMID. VOCM is a high impedance input. The LT6604-10 was designed to process a variety of input signals including signals centered on the mid-supply voltage and signals that swing between ground and a positive voltage in a single supply system (Figure 1). The range of allowable input common mode voltage (the average of VIN+ and VIN– in Figure 1) is determined by the power supply level and gain setting (see “Electrical Characteristics”). 1MHz 25°C 1MHz 85°C 3RD HARMONIC 85°C 3RD HARMONIC 25°C 2ND HARMONIC 85°C 2ND HARMONIC 25°C –100 –120 0 1 4 3 5 2 1MHz INPUT LEVEL (VP-P) 6 660410 F06 Figure 6 660410fa 11 LT6604-10 APPLICATIONS INFORMATION Common Mode DC Currents In applications like Figure 1 and Figure 3 where the LT660410 not only provides lowpass filtering but also level shifts the common mode voltage of the input signal, DC currents will be generated through the DC path between input and output terminals. Minimize these currents to decrease power dissipation and distortion. Consider the application in Figure 3. VMID sets the output common mode voltage of the 1st differential amplifier inside the LT6604-10 channel (see the Block Diagram section) at 2.5V. Since the input common mode voltage is near 0V, there will be approximately a total of 2.5V drop across the series combination of the internal 402Ω feedback resistor and the external 100Ω input resistor. The resulting 5mA common mode DC current in each input path, must be absorbed by the sources VIN+ and VIN–. VOCM sets the common mode output voltage of the 2nd differential amplifier inside the LT6604-10 channel, and therefore sets the common mode output voltage of the filter. Since, in the example of Figure 3, VOCM differs from VMID by 0.5V, an additional 2.5mA (1.25mA per side) of DC current will flow in the resistors coupling the 1st differential amplifier output stage to the filter output. Thus, a total of 12.5mA per channel is used to translate the common mode voltages. A simple modification to Figure 3 will reduce the DC common mode currents by 36%. If VMID is shorted to VOCM the common mode output voltage of both op amp stages will be 2V and the resulting DC current will be 8mA per channel. Of course, by AC coupling the inputs of Figure 3, the common mode DC current can be reduced to 2.5mA per channel. Noise The noise performance of the LT6604-10 channel can be evaluated with the circuit of Figure 6. Given the low noise output of the LT6604-10 and the 6dB attenuation of the transformer coupling network, it will be necessary to measure the noise floor of the spectrum analyzer and subtract the instrument noise from the filter noise measurement. Example: With the IC removed and the 25Ω resistors grounded, Figure 6, measure the total integrated noise (eS) of the spectrum analyzer from 10kHz to 10MHz. With the IC inserted, the signal source (VIN) disconnected, and the input resistors grounded, measure the total integrated noise out of the filter (eO). With the signal source connected, set the frequency to 1MHz and adjust the amplitude until VIN measures 100mVP-P. Measure the output amplitude, VOUT, and compute the passband gain A = VOUT/VIN. Now compute the input referred integrated noise (eIN) as: eIN = (eO )2 – (eS )2 A Table 1 lists the typical input referred integrated noise for various values of RIN. Table 1. Noise Performance PASSBAND GAIN 4 2 1 RIN 100Ω 200Ω 402Ω INPUT REFERRED INTEGRATED NOISE 10kHz TO 10MHz 24μVRMS 34μVRMS 56μVRMS INPUT REFERRED NOISE dBm/Hz –149 –146 –142 660410fa 12 LT6604-10 APPLICATIONS INFORMATION Figure 8 is plot of the noise spectral density as a function of frequency for an LT6604-10 channel with RIN = 402Ω using the fixture of Figure 7 (the instrument noise has been subtracted from the results). The noise at each output is comprised of a differential component and a common mode component. Using a transformer or combiner to convert the differential outputs to single-ended signal rejects the common mode noise and gives a true measure of the S/N achievable in the system. Conversely, if each output is measured individually and the noise power added together, the resulting calculated noise level will be higher than the true differential noise. Power Dissipation The LT6604-10 amplifiers combine high speed with large signal currents in a small package. There is a need to ensure that the die’s junction temperature does not exceed 150°C. The LT6604-10 has an Exposed Pad (pin 35) which is connected to the lower supply (V–). Connecting the pad to a ground plane helps to dissipate the heat generated by the chip. Metal trace and plated through-holes can be used to spread the heat generated by the device to the backside of the PC board. Junction temperature, TJ, is calculated from the ambient temperature, TA, and power dissipation, PD. The power dissipation is the product of supply voltage, VS, and supply current, IS. Therefore, the junction temperature is given by: TJ = TA + (PD • θJA) = TA + (VS • IS •θJA) where the supply current, IS, is a function of signal level, load impedance, temperature and common mode voltages. For a given supply voltage, the worst-case power dissipation occurs when the differential input signal is maximum, the common mode currents are maximum (see Applications Information regarding Common Mode DC Currents), the load impedance is small and the ambient temperature is maximum. To compute the junction temperature, measure the supply current under these worstcase conditions, use 34°C/W as the package thermal resistance, then apply the equation for TJ. For example, using the circuit in Figure 3 with DC differential input voltage of 250mV, a differential output voltage of 1V, no load resistance and an ambient temperature of 85°C, the supply current (current into V+) measures 48.9mA per channel. The resulting junction temperature is: TJ = TA + (PD • θJA) = 85 + (5 • 2 • 0.0489 • 34) = 102°C. The thermal resistance can be affected by the amount of copper on the PCB that is connected to V–. The thermal resistance of the circuit can increase if the exposed pad is not connected to a large ground plane with a number of vias. 35 2.5V 0.1μF VIN RIN 25 COILCRAFT TTWB-1010 25Ω 1:1 SPECTRUM ANALYZER INPUT SPECTRAL DENSITY (nVRMS/√Hz) 30 25 20 15 10 5 0 0.1 SPECTRAL DENSITY 140 120 INTEGRATED NOISE (μVRMS) 100 80 60 40 20 0 100 660410 F08 – 27 34 1/2 + LT6604-10 6 2 4 50Ω 25Ω 660410 F07 + 7 – RIN 29 0.1μF INTEGRATED NOISE –2.5V Figure 7 1.0 10 FREQUENCY (MHz) Figure 8 660410fa 13 LT6604-10 TYPICAL APPLICATION Dual, Matched, 5th Order, 10MHz Lowpass Filter V+ 0.1μF VINA– R R C VINA+ C= R R 4 25 27 34 1/2 + LT6604-10 6 2 – VOUTA+ VOUTA– + 7 0.1μF – 29 1 2π • R • 10MHz GAIN = 402Ω , MAXIMUM GAIN = 4 V– 2R V+ 0.1μF VINB– R R C VINB+ C= R R 12 17 VOUTB+ VOUTB– – 19 8 1/2 + LT6604-10 14 10 + 24 – 21 0.1μF 1 2π • R • 10MHz GAIN = 402Ω , MAXIMUM GAIN = 4 V– 2R 660410 TA02a Amplitude Response 10 0 –10 –20 GAIN (dB) –30 –40 –50 –60 DIFFERENTIAL GAIN = 1 –70 R = 200Ω C = 82pF –80 100k 1M 10M FREQUENCY (Hz) Transient Response 5th Order, 10MHz Lowpass Filter Differential Gain = 1 VOUT* 50mV/DIV DIFFERENTIAL INPUT 200mV/DIV 100ns/DIV 100M 660410 TA02b 660410 TA02c 660410fa 14 LT6604-10 PACKAGE DESCRIPTION UFF Package 34-Lead Plastic QFN (4mm × 7mm) (Reference LTC DWG # 05-08-1758 Rev Ø) 0.70 ± 0.05 1.90 ± 0.05 1.83 ± 0.05 1.47 ± 0.05 1.90 ± 0.05 PACKAGE OUTLINE 4.50 ± 0.05 3.10 ± 0.05 1.50 REF 2.64 ± 0.05 1.29 ± 0.05 0.25 ± 0.05 0.50 BSC 6.00 REF 6.10 ± 0.05 7.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.10 TYP PIN 1 NOTCH R = 0.30 OR 0.25 × 45° CHAMFER 1.50 REF 33 34 0.40 ± 0.10 1 1.90 ± 0.10 2 4.00 ± 0.10 PIN 1 TOP MARK (NOTE 6) 0.75 ± 0.05 1.47 ± 0.10 7.00 ± 0.10 6.00 REF 1.83 ± 0.10 1.90 ± 0.10 2.64 ± 0.10 (UFF34) QFN 0807 REV Ø 0.200 REF 0.00 – 0.05 R = 0.125 TYP 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD 0.99 ± 0.10 NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 660410fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT6604-10 RELATED PARTS PART NUMBER Integrated Filters LTC1562-2 LTC1565-31 LTC1566-1 LT1568 LTC1569-7 LT6600-2.5 LT6600-5 LT6600-10 LT6600-15 LT6600-20 LT6604-2.5 LT6604-5 LT6604-15 Very Low Noise, 8th Order Filter Building Block 650kHz Linear Phase Lowpass Filter Low Noise, 2.3MHz Lowpass Filter Very Low Noise, 4th Order Filter Building Block Linear Phase, Tunable 10th Order Lowpass Filter Very Low Noise Differential 2.5MHz Lowpass Filter Very Low Noise Differential 5MHz Lowpass Filter Very Low Noise Differential 10MHz Lowpass Filter Very Low Noise Differential 15MHz Lowpass Filter Very Low Noise Differential 20MHz Lowpass Filter Dual Very Low Noise, Differential Amplifier and 2.5MHz Lowpass Filter Dual Very Low Noise, Differential Amplifier and 5MHz Lowpass Filter Dual Very Low Noise, Differential Amplifier and 15MHz Lowpass Filter Lowpass and Bandpass Filters up to 300kHz Continuous Time, 7th Order, Differential Continuous Time, 7th Order, Differential Lowpass and Bandpass Filters up to 10MHz Single-Resistor Programmable Cut-Off to 300kHz SNR = 86dB at 3V Supply, 4th Order Filter SNR = 82dB at 3V Supply, 4th Order Filter SNR = 82dB at 3V Supply, 4th Order Filter SNR = 76dB at 3V Supply, 4th Order Filter SNR = 76dB at 3V Supply, 4th Order Filter SNR = 86dB at 3V Supply, 4th Order Filter SNR = 82dB at 3V Supply, 4th Order Filter SNR = 76dB at 3V Supply, 4th Order Filter DESCRIPTION COMMENTS 660410fa 16 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0908 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008
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