LTC6909IMS-PBF

LTC6909 1 to 8 Output, Multiphase Silicon Oscillator with Spread Spectrum Modulation FEATURES ■ ■ DESCRIPTION The LTC®6909 is an easy to use precision oscillator that can provide 1-, 2-, 3-, 4-, 5-, 6-, 7- or 8-phase synchronized outputs. The LTC6909 also offers spread spectrum frequency modulation (SSFM), which can be enabled to improve electromagnetic compatibility (EMC) performance. Eight separate outputs provide up to eight rail-to-rail, 50% duty cycle clock signals. Using three logic inputs, the outputs are configured for phase separation, ranging from 45° to 120° (three to eight phases). The clock outputs can also be held low or configured for Hi-Z. A single resistor, combined with the phase configuration, sets the output frequency, based on the following formula: fOUT = 20MHz • 10k/(RSET • PH) where PH = 3, 4, 5, 6, 7 or 8 The LTC6909 can be used in applications requiring only one or two output phases. Alternatively, the LTC6908 family of parts provides the same two output signals but in a smaller SOT-23 or 2mm × 3mm DFN package. The LTC6908-1 provides complimentary (180°) outputs while the LTC6908-2 provides quadrature (90°) outputs. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 1-, 2-, 3-, 4-, 5-, 6-, 7- or 8-Phase Outputs One External Resistor Sets the Output Frequency from 12.5kHz to 6.67MHz Optional Spread Spectrum Frequency for Improved EMI Performance ±10% Frequency Spreading Outputs Can Be Held Low or Floated (Hi-Z) Three Spread Spectrum Modulation Rates fOUT/16, fOUT/32 and fOUT/64 400μA Supply Current Operates from a Single 2.7V to 5.5V Supply Fast Start-Up Time First Cycle Accurate Outputs Are High Impedance Until Frequency Settles MS16 Package APPLICATIONS ■ Synchronizing Multiple Switching Power Supplies L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 6342817, 6614313, 7417509. TYPICAL APPLICATION Providing a 4-Phase Synchronizing Clock to LTM Modules 0 10V TO 14V INTVCC LTC6909 OUT1 V+D GND 71.5k 0.1μF V+A SET PH0 PH1 PH2 MOD OUT2 OUT3 OUT4 OUT6 OUT7 OUT8 LTM4601-1 ENABLE SSFM 0.01μF DISABLE SSFM 6909 TA01 150kHz to 30MHz Output Frequency Spectrum (9kHz Res BW) SSFM DISABLED OUTPUT (dBc) –10 –20 –30 –40 –50 0 SSFM ENABLED SSFM = fOUT/32 0.1μF LTM4601 S0FT-START 1.5V 48A TRACKING LTM4601-1 TRACKING LTM4601-1 TRACKING OUTPUT (dBc) OUT5 –10 –20 –30 –40 –50 150kHz 30MHz FREQUENCY (FUNDAMENTAL AND HARMONICS SHOWN) 6909 TA01b 6909f 1 LTC6909 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW V+A GND PH0 PH1 OUT1 OUT2 OUT3 OUT4 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SET PH2 MOD V+D OUT8 OUT7 OUT6 OUT5 Supply Voltage (V+A) to GND ......................................6V Supply Voltage (V+D) to GND......................................6V Maximum Voltage on Any Pin ................ (GND – 0.3V) ≤ VPIN ≤ (V+ + 0.3V) Operating Temperature Range (Note 2) LTC6909C ............................................ –40°C to 85°C LTC6909I.............................................. –40°C to 85°C LTC6909H .......................................... –40°C to 125°C Specified Temperature Range (Note 3) LTC6909C ................................................ 0°C to 70°C LTC6909I.............................................. –40°C to 85°C LTC6909H .......................................... –40°C to 125°C Junction Temperature ........................................... 150°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C MS PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 125°C/W ORDER INFORMATION LEAD FREE FINISH LTC6909CMS#PBF LTC6909IMS#PBF LTC6909HMS#PBF TAPE AND REEL LTC6909CMS#TRPBF LTC6909IMS#TRPBF LTC6909HMS#TRPBF PART MARKING* 6909 6909 6909 PACKAGE DESCRIPTION 16-Lead Plastic MSOP 16-Lead Plastic MSOP 16-Lead Plastic MSOP SPECIFIED TEMPERATURE RANGE 0°C to 70°C –40°C to 85°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS SYMBOL ΔfMASTER PARAMETER Frequency Accuracy (Notes 4, 5) The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C or as noted. Test conditions are V+ = V+A = V+D = 2.7V to 5.5V, RL = 5k, CL = 5pF unless otherwise noted. The modulation is turned off (MOD is connected to OUT1) and PH = 8 unless otherwise specified. RSET is defined as the resistor connected from the SET pin to the V+ A pin. CONDITIONS V+ = 5V PH = 3 500kHz ≤ fMASTER ≤ 10MHz 500kHz ≤ fMASTER ≤ 10MHz 100kHz ≤ fMASTER < 500kHz 10MHz ≤ fMASTER ≤ 20MHz 500kHz ≤ fMASTER ≤ 10MHz 500kHz ≤ fMASTER ≤ 10MHz 100kHz ≤ fMASTER < 500kHz ● ● ● ● ● ● ● ● MIN TYP ±1 ±2.5 ±3 ±3.5 ±0.5 ±2 ±2.5 ±0.004 0.4 0.04 MAX ±2.5 ±3 ±4.5 ±3.5 ±2.5 ±3 ±4.5 0.9 0.35 UNITS % % % % % % % %/°C %/V %/V V+ = 2.7V PH = 3 ΔfOUT/ΔT ΔfOUT/ΔV+ Frequency Drift Over Temperature Frequency Drift Over Supply RSET = 100k V+ = 4.5V to 5.5V, RSET = 100k V+ = 2.7V to 3.6V, RSET = 100k 6909f 2 LTC6909 ELECTRICAL CHARACTERISTICS SYMBOL RSET PARAMETER Range of the RSET Resistor Connected Between the V+A Pin and the SET Pin Frequency Spread with SSFM Enabled Long-Term Stability of the Output Frequency (Note 9) Duty Cycle (Note 6) V+A, V+D IS Operating Supply Voltage Range V+ Combined Supply Current RSET = 2M, RL = ∞, PH = 8, MOD = V+, (fOUT = 12.5kHz), SSFM = fOUT/64 V+ = 5V V+ = 2.7V RSET = 20k, RL = ∞, PH = 3, MOD = GND, (fOUT = 3.33MHz), SSFM = fOUT/16 V+ = 5V V+ = 2.7V RSET = 2M, RL = ∞, PH = 8, MOD = OUT1, (fOUT = 12.5kHz), SSFM Off V+ = 5V V+ = 2.7V VIH_MOD VIL_MOD IMOD VIH_PH VIL_PH IIN_PHX VOH High Level MOD Input Voltage Low Level MOD Input Voltage MOD Input Current (Note 7) High Level PHx Input Voltage Low Level PHx Input Voltage High Level Output Voltage (OUT1 Through OUT8)(Note 7) MOD Pin = V+, V+ = 5V MOD Pin = GND, V+ = 5V PHx Refers to PH0, PH1 and PH2 PHx Refers to PH0, PH1 and PH2 < V+ No Load 5mA Load to GND No Load 3mA Load to GND No Load 5mA Load to V+ No Load 3mA Load to V+ V+ = 5V V+ = 2.7V VOL Low Level Output Voltage (OUT1 Through OUT8)(Note 7) V+ = 5V V+ = 2.7V tr tf Output Rise Time (Note 8) Output Fall Time (Note 8) V+ = 5V V+ = 2.7V V+ = 5V V+ = 2.7V SSFM Disabled ● ● The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C or as noted. Test conditions are V+ = V+A = V+D = 2.7V to 5.5V, RL = 5k, CL = 5pF unless otherwise noted. The modulation is turned off (MOD is connected to OUT1) and PH = 8 unless otherwise specified. RSET is defined as the resistor connected from the SET pin to the V+ A pin. CONDITIONS 4.5V ≤ V+ ≤ 5.5V 2.7V ≤ V+ ≤ 4.5V RSET = 100k MOD Pin = V+, GND or Open ● MIN 10 20 ±7 TYP MAX 2000 2000 UNITS kΩ kΩ % ppm/ √kHr ±10 300 ±13 45 2.7 50 55 5.5 % V ● ● 0.6 0.55 0.85 0.8 mA mA ● ● 2.4 1.55 2.7 1.8 mA mA ● ● ● ● ● ● ● ● ● ● ● ● ● 0.4 0.37 V+ – 0.4 0.65 0.6 0.4 mA mA V V μA μA V V μA V V V V –4 V+ – 0.4 2 –2 4 0.4 ±1 4.35 2.1 4.92 4.65 2.63 2.4 0.07 0.25 0.07 0.25 1.6 2.5 1.6 2 0.55 0.55 Digital Input Current, PH0, PH1, PH2 0V < VIN V V V V ns ns ns ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: LTC6909C and the LTC6909I are guaranteed functional over the operating temperature range of –40°C to 85°C. Note 3: The LTC6909C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6909C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6909I is guaranteed to meet specified performance from –40°C to 85°C. The LTC6909H is guaranteed to meet specified performance from –40°C to 125°C. 6909f 3 LTC6909 ELECTRICAL CHARACTERISTICS Note 4: fMASTER is the internal master oscillator frequency. The output frequency is fMASTER/PH. The PH value is determined by the connections of the PH0, PH1 and PH2 pins as described in the Applications Information section. Note 5: Frequency accuracy is defined as the deviation from the fOUT equation. fMASTER = 20MHz • 10k/RSET, fOUT = 20MHz • 10k/(RSET • PH), PH = 3, 4, 5, 6, 7 or 8. Note 6: Guaranteed by 5V test. Note 7: To conform to the Logic IC Standard, current out of a pin is defined as a negative value. Note 8: Output rise and fall times are measured between the 10% and the 90% power supply levels with no output loading. These specifications are based on characterization. Note 9: Long term drift on silicon oscillators is primarily due to the movement of ions and impurities within the silicon and is tested at 30°C under otherwise nominal operating conditions. Long term drift is specified as ppm/√kHr due to the typically nonlinear nature of the drift. To calculate drift for a set time period, translate that time into thousands of hours, take the square root and multiply by the typical drift number. For instance, a year is 8.77kHr and would yield a drift of 888ppm at 300ppm/√kHr. Drift without power applied to the device (aging) may be approximated as 1/10th of the drift with power, or 30ppm/√kHr for a 300ppm/√kHr device. TYPICAL PERFORMANCE CHARACTERISTICS Frequency Error vs RSET, V+ = 2.7V 5 4 GUARANTEED MAX OVER TEMPERATURE 3 FREQUENCY ERROR (%) 2 1 0 –1 –2 –3 –4 GUARANTEED MIN OVER TEMPERATURE 100k RSET (Ω) 6909 G01 Frequency Error vs RSET, V+ = 5V 5 4 3 FREQUENCY ERROR (%) 2 1 TYPICAL MAX 0 –1 –2 TYPICAL MIN –3 –4 GUARANTEED MIN OVER TEMPERATURE TA = 25°C 1.00 0.75 FREQUENCY ERROR (%) GUARANTEED MAX OVER TEMPERATURE 0.50 0.25 0 –0.25 –0.50 –0.75 100k RSET (Ω) 6909 G02 Frequency Error vs Temperature TA = 25°C TYPICAL MAX TYPICAL MAX TYPICAL MIN TYPICAL MIN –5 10k 1M 10M –5 10k 1M 10M –1.00 –40 –20 0 40 20 TEMPERATURE (°C) 60 80 6909 G03 Supply Current vs Supply Voltage 1800 1600 SUPPLY CURRENT (μA) 1400 1200 1000 800 600 400 200 0 2.7 3.2 4.2 3.7 SUPPLY VOLTAGE (V) 4.7 6909 G04 Supply Current vs RSET (SSFM Enabled) 3000 2500 2000 1500 1000 V+ = 2.7V, PH = 3 V+ = 5V, PH = 3 2500 V+ = 5V, PH = 8 ISUPPLY (μA) ISUPPLY (μA) 2000 1500 1000 500 CLOAD = 5pF 3000 Supply Current vs RSET (SSFM Disabled) V+ = 5V, PH = 3 CLOAD = 5pF RLOAD = 5k PH = 3, SSFM ENABLED CLOAD = 5pF RLOAD = 5k RSET = 20k V+ = 5V, PH = 8 V+ = 2.7V, PH = 3 RSET = 400k RSET = 100k RSET = 2M 500 0 10k V+ = 2.7V, PH = 8 100k RSET (Ω) 6909 G05 V+ = 2.7V, PH = 8 1M 10M 0 10k 100k RSET (Ω) 6909 G06 1M 10M 6909f 4 LTC6909 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Temperature 700 650 SUPPLY CURRENT (μA) 600 550 500 450 400 –40 –20 V+ = 2.7V RSET = 100k PH = 3 CLOAD = 5pF SSFM DISABLED 0 20 40 60 80 TEMPERATURE (°C) 100 120 6909 G07 Typical Output Resistance vs Supply Voltage 110 100 OUTPUT RESISTANCE (Ω) 4.5 Output Rise/Fall Time vs Supply Voltage CLOAD = 5pF 4.0 TA = 25°C RLOAD = 5k 3.5 3.0 2.5 2.0 1.5 1.0 0.5 FALL TIME RISE TIME V+ = 5V 90 80 70 60 50 40 30 20 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 SUPPLY VOLTAGE (V) 6909 G08 OUTPUT RISE/FALL TIME (ns) 0 2.7 3.2 3.7 4.2 4.7 SUPPLY VOLTAGE (V) 5.2 6909 G09 Jitter vs RSET 1.2 1.0 0.8 V+ = 2.7V, DIV = 3 0.6 0.4 0.2 0 10k V+ = 5V, DIV = 8 V+ = 2.7V, DIV = 8 100k RSET (Ω) 6909 G10 Output Operating at 3.33MHz CLOAD = 5pF V+ = 5V, DIV = 3 500mV/DIV JITTER (% P-P) 50ns/DIV V+ = 3.3V CLOAD = 15pF RLOAD = 5k 10M 6909 G11 1M Output Operating at 6.66MHz Output Frequency Spectrum SSFM Enable and Disabled 0 RES BW = 9kHz SSFM ENABLED (N = 16) 1V/DIV 10dB/DIV SSFM DISABLED 50ns/DIV V+ = 5V CLOAD = 15pF RLOAD = 5k 6909 G12 –100 2.5 MHz FREQUENCY (200kHz/DIV) 6909 G13 6909f 5 LTC6909 PIN FUNCTIONS V+A (Pin 1): Analog Voltage Supply (2.7V ≤ V+A ≤ 5.5V). This supply should be kept free of noise and ripple. It should be bypassed directly to GND with a 0.1μF or greater low ESR capacitor. V+A and V+D must be connected to the same supply voltage. GND (Pin 2): Ground Connections. Should be tied to a ground plane for best performance. PH0, PH1, PH2 (Pins 3, 4, 15): Output Phasing Selection Pins. These are standard CMOS logic input pins and they do not have an internal pull-up or pull-down. These pins must be connected to a valid logic input 0 or 1 voltage. Connect the pins to GND for a logic 0 and to the V+D pin for a logic 1. These pins configure the output phase relationships as follows: PH2 0 0 0 0 1 1 1 1 PH1 0 0 1 1 0 0 1 1 PH0 0 1 0 1 0 1 0 1 MODE All Outputs Are Floating (Hi-Z) All Outputs Are Held Low 3-Phase Mode (PH = 3) 4-Phase Mode (PH = 4) 5-Phase Mode (PH = 5) 6-Phase Mode (PH = 6) 7-Phase Mode (PH = 7) 8-Phase Mode (PH = 8) internal frequency setting loop has settled, the outputs are active, clean and operating at the set frequency (first cycle accurate). V+D (Pin 13): Digital Voltage Supply (2.7V ≤ V+D ≤ 5.5V). This pin should be bypassed directly to GND with a 0.1μF or greater low ESR capacitor. V+D and V+A must be connected to the same supply voltage. MOD (Pin 14): Spread Spectrum Frequency Modulation Setting Input. This input selects among four modulation rate settings. The MOD pin should be tied to ground for an fOUT/16 modulation rate. Floating the MOD pin selects an fOUT/32 modulation rate. The MOD pin should be tied to V+D for the fOUT/64 modulation rate. Tying one of the active outputs to the MOD pin turns the modulation off. To detect a floating MOD pin, the LTC6909 attempts to pull the pin to the midsupply point. This is realized with two internal current sources, one tied to V+D and MOD and the other one tied to GND and MOD. Therefore, driving the MOD pin high requires sourcing approximately 2μA. Likewise, driving the MOD pin low requires sinking approximately 2μA. When the MOD pin is floated for the fOUT/32 modulation rate, it must be bypassed using a 1nF or larger, capacitor to GND. Any AC signal coupling to the MOD pin could potentially be detected and stop the frequency modulation. SET (Pin 16): Frequency Setting Resistor Input. The value of the resistor connected between this pin and V+A determines the frequency of the master oscillator. The output frequency, fOUT, is the master oscillator frequency divided by PH as set by the PH0, PH1 and PH2 pin connections. The voltage on this pin is held approximately 1.1V below V+A. For best performance, use a precision metal film resistor with a value between 20k and 400k, and limit the capacitance on the pin to less than 10pF. Resistor values outside of this range will have some loss of accuracy as noted in the Electrical Characteristics table. The PH0, PH1, PH2 pin connections not only determine the phase relationship of the output signals but also divide the master oscillator frequency by the value PH. OUT1 Through OUT8 (Pins 5 Through 12): Oscillator Outputs. These are CMOS rail-to-rail logic outputs with a series resistance of approximately 40Ω, capable of driving 1k and/or 50pF loads. Larger loads may cause minor frequency inaccuracies due to supply bounce at high frequencies. When any output pin is not in use, it is in a floating, high impedance state. The outputs are also held in a high impedance state during start-up. After the part’s 6909f 6 LTC6909 BLOCK DIAGRAM PH0 PH1 PH2 3 4 15 IMASTER fMASTER = 20MHz • 10k • + = 20MHz • 10k/RSET V – VSET (SSFM = OFF) V+A RSET SET 16 VBIAS 1 VSET V+D 13 + V MASTER OSCILLATOR OUT ISET = V+ – VSET RSET 1 POLE LPF IMASTER OUTPUT PHASING DRIVERS DRIVER DRIVER DRIVER DRIVER DRIVER 5 OUT1 6 OUT2 7 OUT3 8 OUT4 9 OUT5 10 OUT6 11 OUT7 12 OUT8 – IREF MDAC DRIVER DRIVER DRIVER V+ + – 3-STATE INPUT DECODER DETECT CLOCK INPUT GND PSEUDORANDOM CODE GENERATOR POR OUTPUT Hi-Z UNTIL STABLE MOD 14 DIVIDE BY 16/32/64 + – GND 2 WHEN A CLOCK SIGNAL IS PRESENT AT THE MOD PIN INPUT, THE MODULATION IS DISABLED 6909 BD 6909f 7 LTC6909 OPERATION As shown in the Block Diagram, the LTC6909’s master oscillator is controlled by the ratio of the voltage between the V+A and SET pins and the current entering the SET pin (IMASTER). When the spread spectrum frequency modulation (SSFM) is disabled, IMASTER is strictly determined by the (V+A – VSET) voltage and the RSET resistor. When SSFM is enabled, IMASTER is modulated by a filtered pseudorandom noise (PRN) signal. Here the IMASTER current is a random value uniformly distributed between (ISET – 10%) and (ISET + 10%). In this way, the frequency is modulated to produce an approximately flat frequency spectrum, centered about the set frequency with a bandwidth equal to approximately 20% of the center frequency. The voltage on the SET pin is forced to approximately 1.1V below V+A by the PMOS transistor and its gate bias voltage. This voltage is accurate to ±5% at a particular input current and supply voltage (see Figure 1). The LTC6909 is optimized for use with resistors between 20k and 400k corresponding to master oscillator frequencies between 500kHz and 10MHz. Accurate master oscillator frequencies up to 20MHz (RSET = 10k) are attainable if the supply voltage is greater than 4V. The RSET resistor, connected between the V+A and SET pins, locks together the (V+A – VSET) voltage and the current ISET. This allows the parts to attain excellent frequency accuracy regardless of the precision of the SET pin. The master oscillation frequency is: fMASTER = 20MHz • 10k/RSET 1.4 1.3 VRES = V+ – VSET 1.2 V+ = 5V 1.1 V+ = 3V 1.0 0.9 0.8 0.1 When the spread spectrum frequency modulation (SSFM) is disabled, the master oscillator frequency is stationary. When SSFM is enabled, the master oscillator frequency varies from 0.9 • fMASTER to 1.1 • fMASTER. Output Frequency and Configurations The output frequency of the LTC6909 is set by the RSET resistor value and the connections of the PH0, PH1 and PH2 logic input pins. The following formula defines the relationship: fOUT = 20MHz • 10k/(RSET • PH) where PH = 3, 4, 5, 6, 7 or 8 and is defined as follows: PH2 0 0 0 0 1 1 1 1 PH1 0 0 1 1 0 0 1 1 PH0 0 1 0 1 0 1 0 1 MODE All Outputs Are Floating (Hi-Z) All Outputs Are Held Low 3-Phase Mode (PH = 3) 4-Phase Mode (PH = 4) 5-Phase Mode (PH = 5) 6-Phase Mode (PH = 6) 7-Phase Mode (PH = 7) 8-Phase Mode (PH = 8) TA = 25°C The PH0, PH1 and PH2 pins are standard logic input pins. These pins do not have any active pull-up or pull-down circuitry. As such, they cannot be left floating and must be connected to a valid logic high or low voltage. The PH0, PH1 and PH2 pin connections not only divide the master oscillator frequency by the value PH but also determine the phase relationship between the output signals. Figure 2 shows the output waveforms for each of the eight possible output configurations. Note that 2-phase, complementary (180° phase shifted) outputs are available in the 4-, 6- and 8-phase modes by choosing the correct pair of signals. For example, in 4-phase mode, OUT1 and OUT3 (or OUT2 and OUT4) are complementary. 1 10 IRES (μA) 100 1000 6909 F01 Figure 1. V+ – VSET Variation with IRES 6909f 8 LTC6909 OPERATION MASTER OSCILLATOR PH2 - PH1 - PH0 = 000 PH2 - PH1 - PH0 = 001 PH2 - PH1 - PH0 = 010 OUT1 OUT2 OUT3 OUT4 Hi-Z OUT5 Hi-Z OUT6 Hi-Z OUT7 Hi-Z OUT8 Hi-Z PH2 - PH1 - PH0 = 011 OUT1 OUT2 OUT3 OUT4 OUT5 Hi-Z OUT6 Hi-Z OUT7 Hi-Z OUT8 Hi-Z PH2 - PH1 - PH0 = 100 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 Hi-Z OUT7 Hi-Z OUT8 Hi-Z PH2 - PH1 - PH0 = 101 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 Hi-Z OUT8 Hi-Z 6909 F02a ALL OUTPUTS ARE Hi-Z ALL OUTPUTS ARE LOW PH = 3, fOUTPUT = fMASTER/3 ADJACENT OUTPUTS ARE PHASE SHIFTED BY 120° PH = 4, fOUTPUT = fMASTER/4 ADJACENT OUTPUTS ARE PHASE SHIFTED BY 90° PH = 5, fOUTPUT = fMASTER/5 ADJACENT OUTPUTS ARE PHASE SHIFTED BY 72° PH = 6, fOUTPUT = fMASTER/6 ADJACENT OUTPUTS ARE PHASE SHIFTED BY 60° Figure 2a. Output Waveforms for Different PH Settings 6909f 9 LTC6909 OPERATION MASTER OSCILLATOR PH2 - PH1 - PH0 = 110 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 Hi-Z PH2 - PH1 - PH0 = 111 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 6909 F02b PH = 7, fOUTPUT = fMASTER/7 ADJACENT OUTPUTS ARE PHASE SHIFTED BY 51.43° PH = 8, fOUTPUT = fMASTER/8 ADJACENT OUTPUTS ARE PHASE SHIFTED BY 45° Figure 2b. Output Waveforms for Different PH Settings 6909f 10 LTC6909 OPERATION Spread Spectrum Frequency Modulation The LTC6909 can operate with spread spectrum frequency modulation (SSFM). In this mode, the oscillator’s frequency is modulated by a pseudorandom noise (PRN) signal to spread the oscillator’s energy over a wide frequency band. This spreading decreases the peak electromagnetic radiation levels and improves electromanetic compatibility (EMC) performance. The amount of frequency spreading is fixed at 20% (±10%), where frequency spreading is defined as: Frequency Spreading (in %) = 100 • (fMAX – fMIN)/fOUT The IMASTER current is a dynamic signal generated by a multiplying digital-to-analog converter (MDAC) referenced to ISET and lowpass filtered. IMASTER varies in a psuedorandom noise-like manner between 0.9 • ISET and 1.1 • ISET. This causes the output frequency to vary in a pseudorandom noise-like manner between 0.9 • fOUT and 1.1 fOUT. To disable the SSFM, connect one of the active outputs to the MOD pin. An AC detector circuit shuts down the modulation circuitry if a frequency in the vicinity of the output frequency is detected at the MOD pin. As stated previously, the modulating waveform is a pseudorandom noise-like waveform. The pseudorandom signal fOUT + 10% is generated by a linear feedback shift register that is 15 bits long. The pseudorandom sequence will repeat every (215 – 1) • N clock cycles. This guarantees a repetition rate below 13Hz for output frequencies up to 6.67MHz. Seven bits of the shift register are sent in parallel to the MDAC which produces the modulating current waveform. Being a digitally generated signal, the output of the MDAC is not a perfectly smooth waveform, but consists of (27) discrete steps that change every shift register clock cycle. Note that the shift register clock is the output frequency, fOUT, divided by N, where N is the modulation rate divider setting, which is determined by the state of the MOD pin. The MOD pin should be tied to ground for the N = 16 setting. Floating the MOD pin selects N = 32. The MOD pin should be tied to V+ for the N = 64 setting. The output of the MDAC is then filtered by a lowpass filter with a corner frequency set to the modulation rate (fOUT/N). This limits the rate of frequency change and softens the corners of the frequency control signal, but allows the waveform to fully settle at each frequency step. The rise and fall times of this single pole filter are approximately 0.35/fCORNER. This is beneficial for clocking switching regulators, as discussed in the Applications Information section. Figure 3 illustrates how the output frequency varies over time. FREQUENCY 128 STEPS fOUT – 10% tSTEP = N/fOUT tSTEP tREPEAT TIME tREPEAT = ((215 – 1) • N)/fOUT 6909 F03 Figure 3 6909f 11 LTC6909 APPLICATIONS INFORMATION SELECTING THE FREQUENCY-SETTING RESISTOR The LTC6909 has a master oscillator frequency range spanning 100kHz to 20MHz depending on the RSET resistor value. However, accuracy may suffer if the oscillator is operated at a master oscillator frequency greater than 10MHz with a supply voltage lower than 4V. With a linear correspondence between the master oscillator period and the RSET resistance, a simple equation relates resistance with frequency. RSET =10k • 20MHz/fMASTER RSETMIN = 10k (5V supply), 20k (2.7V supply), RSETMAX = 2M Any RSET resistor tolerance will shift the output frequency by the same amount. ALTERNATIVE METHODS OF SETTING THE OUTPUT FREQUENCY OF THE LTC6909 The oscillator may be programmed by any method that sources a current into the SET pin. The circuit in Figure 4 sets the oscillator frequency using a programmable current source and in the expression for fOUT, the resistor RSET is replaced by the ratio of 1.1V/ICONTROL. As already explained in the Operation section, the voltage difference between V+ and SET is approximately 1.1V ±5%, therefore, the Figure 4 circuit is less accurate than if a resistor controls the output frequency. V+ CBYP V+A V+ CBYP V+A VCONTROL + – RSET GND SET 6909 F05 fOUT = 10k • 20MHz/RSET(1 – VCONTROL/1.13V) Figure 5. Voltage Controlled Oscillator the relationship between the input current and the voltage between V+ and SET; the frequency accuracy will be degraded. The oscillator frequency, however, will increase monotonically with decreasing VCONTROL. SETTING THE MODULATION RATE OF THE LTC6909 The modulation rate of the LTC6909 is equal to fOUT/N, where N is the modulation rate divider setting, which is determined by the state of the MOD pin. The MOD pin should be tied to ground for the N = 16 setting. Floating the MOD pin selects N = 32. The MOD pin should be tied to V+ for the N = 64 setting. To disable the SSFM, connect one of the active outputs to the MOD pin. An AC detector circuit shuts down the modulation circuitry if a frequency that is close to the output frequency is detected at the MOD pin. When the MOD pin is floated, for the fOUT/32 modulation rate, it must be bypassed by at least a 1nF capacitor to GND. Any AC signal coupling to the MOD pin could potentially be detected and stop the frequency modulation. DRIVING LOGIC CIRCUITS The outputs of the LTC6909 are suitable for driving general digital logic circuits. However, the form of frequency spreading used in the LTC6909 may not be suitable for many logic designs. Many logic designs have fairly tight timing and cycle-to-cycle jitter requirements. These systems often benefit from a spread spectrum clocking system where the frequency is slowly and linearly modulated by a triangular waveform, not a pseudorandom waveform. This type of frequency spreading maintains a minimal difference in the timing from one clock edge to the next adjacent clock edge (cycle-to-cycle jitter). The LTC6909 uses a 6909f ICONTROL GND SET 6909 F04 fMASTER = 10k • (20MHz/1.13V) • ICONTROL(A) Figure 4. Current Controlled Oscillator Figure 5 shows the LTC6909 configured as a VCO. A voltage source is connected in series with an external 10k resistor. The master oscillator frequency, fMASTER, will vary with VCONTROL, that is the voltage source connected between V+ and the SET pin. Again, this circuit decouples 12 LTC6909 APPLICATIONS INFORMATION pseudorandom modulating signal where the frequency transitions have been slowed and the corners rounded by a first order lowpass filter with a corner frequency set to the modulation rate (fOUT/N), where N is the modulation rate divider setting, which is determined by the state of the MOD pin. This filtered modulating signal may be acceptable for many logic systems but the cycle-to-cycle jitter issues must be considered carefully. DRIVING SWITCHING REGULATORS The LTC6909 is designed primarily to provide an accurate and stable clock for switching regulator systems. The CMOS logic outputs are suitable for directly driving most switching regulators and switching controllers. Linear Technology has a broad line of fully integrated switching regulators and switching regulator controllers designed for synchronization to an external clock. All of these parts have one pin assigned for external clock input. The nomenclature varies depending on the part’s family history. SYNC, PLLIN, SYNC/MODE, EXTCLK, FCB and S/S (shorthand for SYNC/SHDN) are examples of clock input pin names used with Linear Technology ICs. For the best EMC performance, the LTC6909 should be run with the MOD pin tied to ground (SSFM enabled, modulation rate set to fOUT/16). Regulatory testing is done with strictly specified bandwidths and conditions. Modulating faster than, or as close to, the test bandwidth as possible gives the lowest readings. The optimal modulating rate is not as straightforward when the goal is to lower radiated signal levels interfering with other circuitry in the system. The modulation rate will have to be evaluated with the specific system conditions to determine the optimal rate. Depending on the specific frequency synchronization method a switching regulator employs, the modulation rate must be within the synchronization capability of the regulator. Many regulators use a phase-locked loop (PLL) for synchronization. For these parts, the PLL loop filter should be designed to have sufficient capture range and bandwidth. The frequency hopping transitions of the LTC6909 are slowed by a lowpass filter. The corner frequency of this filter is set to the modulation rate (fOUT/N), where N is the modulation rate divider setting, which is determined by the state of the MOD pin. The MOD pin should be tied to ground for the N = 16 setting. Floating the MOD pin selects N = 32. The MOD pin should be tied to V+ for the N = 64 setting. This is an important feature when driving a switching regulator. The switching regulator is itself a servo loop with a bandwidth typically on the order of 1/10 to 1/20 of the operating frequency. When the clock frequency’s transition is within the bandwidth of the switching regulator, the regulator’s output stays in regulation. If the transition is too sharp, beyond the bandwidth of the switching regulator, the regulator’s output will experience a sharp jump and then settle back into regulation. If the bandwidth of the regulator is sufficiently high, beyond fOUT/N, then there will not be any regulation issues. One aspect of the output voltage that will change is the output ripple voltage. Every switching regulator has some output ripple at the clock frequency. For most switching regulator designs with fixed MOSFET’s, fixed inductor, fixed capacitors, the amount of ripple will vary with the regulator’s operating frequency (the main exception being hysteretic architecture regulators). An increase in frequency results in lower ripple and a frequency decrease gives more ripple. This is true for static frequencies or dynamic frequency modulated systems. If the modulating signal was a triangle wave, the regulator’s output would have a ripple that is amplitude modulated by the triangle wave. This repetitive signal on the power supply could cause system problems by mixing with other desired signals creating distortion. Depending on the switching regulator’s inductor design and triangle wave frequency, it may even result in an audible noise. The LTC6909 uses a pseudorandom noise-like signal. On an oscilloscope, it looks essentially noise-like of even amplitude. The signal is broadband and any mixing issues are eliminated. Additionally, the pseudorandom signal repeats at such a low rate that it is well below the audible range. The LTC6909 with the spread spectrum frequency modulation enabled results in improved EMC performance. If the bandwidth of the switching regulator is sufficient, not a difficult requirement in most cases, the regulator’s regulation, efficiency and load response are maintained 6909f 13 LTC6909 APPLICATIONS INFORMATION while peak electromagnetic radiation (or conduction) is reduced. Output ripple may be somewhat increased, but its behavior is very much like noise and its system impact is benign. SUPPLY BYPASSING, SIGNAL CONNECTIONS AND PCB LAYOUT Using the LTC6909 in spread spectrum mode naturally eliminates any concerns for output frequency accuracy and stability as it is continually hopping to new settings. In fixed frequency applications however, some attention to V+ supply voltage ripple is required to minimize additional output frequency error. Ripple frequency components on the supply line near the programmed output frequency of the LTC6909 in excess of 30mVP-P could create an additional 0.2% of frequency error. In applications where a fixed frequency LTC6909 output clock is used to synchronize the same switching regulator that provides the V+ supply to the oscillator, noticeable jitter of the clock may occur if the ripple exceeds 30mVP-P . The LTC6909’s accuracy is affected as described above by supply ripple on the V+A pin only. The V+D pin is essentially insensitive to supply ripple. The V+A pin supplies the power for the analog section of the LTC6909 and its current is largely constant for a given RSET resistor value. The V+D pin supplies the digital section including the output drivers and its current requirement consists mainly of large bursts that digital circuitry requires when switching. The peak current required by the output drivers is by far the largest. The current is mainly dependent on output capacitive loading and the supply voltage. Figure 6 shows how to connect the V+A and V+D supply pins to the power supply as well as a suggested PCB layout. The PCB layout assumes a two layer board with a ground plane in the layer beneath the part and 0805 sized passive components. The PCB layout in Figure 6 is a guide and need not be followed exactly. However, there are several items to note from the layout as follows: 1. There should be a ground plane underneath and around the part. Connect the GND pin to this plane through multiple (three to four minimum) vias to minimize inductance. 2. Place the bypass capacitors, C1 and C2, as close to the V+A and V+D pins as possible to minimize the inductance between the capacitor’s lead and the part’s pins. 3. The connection to the V+A and V+D pins to the main supply should be through a low impedance path. If the board has a V+ power plane, use it instead of the top layer connection shown in Figure 6. Use multiple vias (three to four minimum) at each point to connect the V+A and V+D pins to the V+ plane to minimize the inductance. 4. Connect the bypass capacitors, C1 and C2, directly to the GND pin using a low inductance path. The connection from C1 to the GND pin is easily done directly on the top layer. The C2 path is more difficult but is accomplished through multiple vias to the ground plane. 5. Connect the RSET resistor directly to the SET pin and the V+A pin. Connecting the resistor to the V+ supply through any manner other than directly to the V+A pin will result greater frequency error. 6. Provide a ground shield around the RSET resistor and its connections to V+A and SET. The SET pin is a fairly high impedance point and is susceptible to interference from noisy signal lines such as the part’s CMOS outputs OUT1 through OUT8. 7. Route the output signals, OUT1 through OUT8, away from the SET pin as soon as possible to minimize coupling. 8. When using the LTC6909 with spread spectrum disabled, an active output is connected to the MOD pin. This is best done by routing the OUT1 signal under the part as shown in Figure 6. The ground shield between this trace and the RSET resistor is very important to minimize coupling of the OUT1 signal into the SET pin. 6909f 14 LTC6909 APPLICATIONS INFORMATION 9. The connections for PH0, PH1 and PH2 are not shown in Figure 6. These pins are connected to either GND or V+D depending on the output phasing required for the application. Connection to ground is done underneath the part. Connecting PH2 to V+D is also straightforward. Connecting PH0 or PH1 to V+D may require one or both traces to go down a layer. If you are dynamically changing one or all of the PH pins, place a 10k resistor in series with the signal line. Locate the resistor fairly close to the PH pin. This signal typically comes from a microcontroller or the power good signal from a switching regulator and is usually quite noisy. The series resistor provides some isolation between the noisy signal and the LTC6909. START-UP ISSUES AND CONSIDERATIONS The start-up time and settling time to within 1% of the final value is estimated by the following equation: t START ≈ R SET ⎛ 25μ s ⎞ •⎜ ⎟ + 10 μ s ⎝ 1k ⎠ To assist in an orderly start-up sequence, the LTC6909’s outputs are in a high impedance state for the first 128 master clock cycles after power-up. This ensures that the first clock cycle is very close to the desired operating frequency. Powering up and down complex multiphase switching regulator circuits is always chaotic and can have serious system consequences if it is not done carefully. In addition to the LTC6909’s muting of the outputs to ensure first cycle accuracy, the PH0-PH1-PH2 codes 000 (all outputs are 10000 TA = 25°C V+ = 3V START-UP DELAY (μs) 1000 100 10 1k 10k 100k RSET (Ω) 1M 10M 6909 F07 For instance, with RSET = 100k, the LTC6909 will settle to within 1% of its 1MHz final value in approximately 260μs. Figure 7 shows the start-up time for various RSET resistors. Figure 7. Start-Up Time RSET C1 0.1μF V+A GND PH0 GROUND PLANE PH1 OUT1 LTC6909 SET PH2 MOD V+D OUT8 C2 0.1μF GROUND PLANE DIRECT, LOW IMPEDANCE CONNECTION TO THE V+ SUPPLY V+A GND PH0 PH1 OUT1 OUT2 OUT3 OUT4 SET PH2 MOD V+D OUT8 OUT7 OUT6 OUT5 6909 F06 C1 RSET C2 Figure 6. Supply Bypassing and PCB Layout 6909f 15 LTC6909 APPLICATIONS INFORMATION high impedance) and 001 (all outputs are low) are useful for controlling the clocking of switching regulators during start-up. At start-up, most switching regulators ignore the clock input until a power good state is achieved. Nearly all of Linear Technology’s switching regulators operate in this manner. However, some switching regulators from other vendors do not ignore the clock input on start-up and yet are not synchronizable until the power good state is reached. Attempting to synchronize these switching regulators before they reach the power good state can lead to problems. For these switching regulators it is best to have the LTC6909 held in the PH0-PH1-PH2 codes 000 or 001 until the switching regulator issues a power good signal. In most cases, simply connecting a switching regulator’s power good signal to the PH0, PH1 and/or PH2 pins accomplishes this. At most, an additional single logic inverter is required to switch from either the 000 or 001 states to any of the other six states through a power good signal. Another way to use the PH0, PH1 and PH2 inputs to assist with power-up/down issues is to use an external part to provide a supply monitor or an undervoltage lockout (UVLO). There are several parts available that combine a comparator with a reference to fulfill this function. The V+ LTC6909 does not have its own internal UVLO. If the supply is below 2.7V, frequency accuracy may suffer. At a supply voltage around 2V or lower, the LTC6909 will operate erratically or will stop. It may stop randomly in a logic high or low state. Figure 8 shows a circuit using an LTC1998 to monitor the supply voltage and control the logic state of the PH0 and PH1 pins. The LTC1998’s threshold is set at 2.5V with 50mV of hysteresis. On power-up, as the supply ramps up, the LTC1998 holds PH0 and PH1 low, keeping the LTC6909’s outputs in a high impedance state. Once the supply is above 2.55V, the LTC1998 pulls the PH0 and PH1 pins high, setting the LTC6909 into the 4-phase operating mode. On power-down, the supply ramps down and the LTC1998’s output goes low once the supply is below 2.45V. This puts the LTC6909’s outputs in the high impedance state. All switch overs are synchronized to the LTC6909’s internal oscillator to avoid glitches and runt pulses. To adjust the on/off supply voltage threshold, change the configuration of the LTC1998. As with the power good signal, at most an additional single logic inverter is required to switch from either the 000 or 001 states to any of the other six states. RSET 1 0.1μF 1 0.1μF 2 3 LTC1998 BATT GND VTHA BATTLO VLOGIC VHA 6 5 4 953k 2 3 4 5 6 7 49.9k 8 LTC6909 V+A GND PH0 PH1 OUT1 OUT2 OUT3 OUT4 SET PH2 MOD V+D OUT8 OUT7 OUT6 OUT5 6909 F08 16 15 14 13 12 11 10 9 0.1μF Figure 8. Adding a UVLO Feature to the LTC6909. In This Example, the LTC6909 Is in 4-Phase Mode for a V+ > ≈2.5V (PHx = 011) and the Outputs Are All High Impedance for V+ < ≈2.5V (PHx = 000) 6909f 16 LTC6909 TYPICAL APPLICATIONS Simply Parallel Multiple DC/DC μModule™ Regulator Systems to Achieve Higher Output Current. Board Layout Is as Easy as Copying and Pasting Each μModule Regulator’s Layout With Very Few External Components Required VIN 10V TO 14V 51.1k 51.1k VIN PGOOD MPGM RUN COMP INTVCC DRVCC CLOCK SYNC 0° PHASE PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL DIFFVOUT VOSNS+ VOSNS– fSET TRACK/SS CONTROL 60.4k + RSET N RSET N = NUMBER OF PHASES VOUT = 0.6V VOUT 1.5V 48A MAX 22μF 6.3V 470μF 6.3V 220pF LTM4601 + + CIN* 100μF 25V 10μF 25V ×2 392k 71.5k LTC6909 V+A SET GND PH0 PH1 OUT1 OUT2 OUT3 OUT4 PH2 MOD V+D OUT8 OUT7 OUT6 OUT5 SSFM DISABLED SGND PGND RSET 10k 120pF 0.1μF 5% MARGIN MARGIN CONTROL CLOCK SYNC 90° PHASE 0.1μF SSFM ENABLED 0.01μF 4.5V TO 20V VIN PGOOD MPGM RUN COMP INTVCC DRVCC 10μF 25V ×2 392k SGND PGND TRACK/SS CONTROL PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL NC3 NC2 NC1 fSET 22μF 6.3V + LTM4601-1 470μF 6.3V CLOCK SYNC 180° PHASE 4.5V TO 20V VIN PGOOD MPGM RUN COMP INTVCC DRVCC 10μF 25V ×2 392k SGND PGND TRACK/SS CONTROL PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL NC3 NC2 NC1 fSET 22μF 6.3V + LTM4601-1 470μF 6.3V CLOCK SYNC 270° PHASE 4.5V TO 20V VIN PGOOD MPGM RUN COMP INTVCC DRVCC 392k SGND PGND TRACK/SS CONTROL PLLIN TRACK/SS VOUT VFB MARG0 MARG1 VOUT_LCL NC3 NC2 NC1 fSET 6909 TA02 0.1μF 22μF 6.3V PGOOD 10μF 25V ×2 + LTM4601-1 470μF 6.3V *CIN OPTIONAL TO REDUCE ANY LC RINGING. NOT NEEDED FOR LOW INDUCTANCE PLANE CONNECTION μModule is a trademark of Linear Technology Corporation. 6909f 17 LTC6909 TYPICAL APPLICATIONS Using Additional Standard Logic Inverters to Achieve 10- and 14-Phase Outputs (Inverters Are 74HC04 or Equivalent) 10 OUTPUT PHASES (OUTPUTS SHIFTED BY 36 DEGREES) 0.1μF V+ LTC6909 OUT1 V+D GND V+A 0.1μF RSET SET PH0 PH1 PH2 MOD OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 0° (360°) 180° 72° 252° 144° 324° 216° 36° 288° 108° 0.1μF RSET 0.1μF V+ LTC6909 OUT1 V+D GND V+A SET PH0 PH1 PH2 MOD OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 0° (360°) 180° 51.43° 231.43° 102.86° 282.86° 154.29° 334.29° 205.71° 25.71° 257.14° 77.14° 308.57° 128.57° 6909 TA03 14 OUTPUT PHASES (OUTPUTS SHIFTED BY 25.71 DEGREES) Combining Eight Outputs With a Lowpass Filter to Create a Sine Wave 2.7V TO 5.5V 249k 1 0.1μF 2 3 4 V +A GND PH0 PH1 LTC6909 16 15 SET PH2 500mV/DIV MOD 14 V+D 13 0.1μF 787k 2μs/DIV V+ = 5 V THD = 0.2% 6909 TA06 787k 402k 140k 80.6k 5 6 7 8 OUT1 OUT2 OUT3 OUT4 OUT8 OUT7 OUT6 OUT5 12 11 402k 10 140k 9 80.6k 1 LP LTC1563-2 V+ 16 0.1μF 100kHz SINE WAVE OUTPUT OPEN 2 3 4 5 6 7 SA NC INVA NC LPA LPB NC INVB NC SB NC EN 15 14 13 12 11 10 9 16.2k 16.2k 20k 21k 0.1μF AGND V– 8 6909 TA04 6909f 18 LTC6909 PACKAGE DESCRIPTION MS Package 16-Lead Plastic MSOP (Reference LTC DWG # 05-08-1669 Rev Ø) 0.889 (.035 0.127 .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.305 0.038 (.0120 .0015) TYP 0.50 (.0197) BSC 4.039 0.102 (.159 .004) (NOTE 3) 16151413121110 9 RECOMMENDED SOLDER PAD LAYOUT 0.280 0.076 (.011 .003) REF 0.254 (.010) GAUGE PLANE DETAIL “A” 0 – 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 0.53 0.152 (.021 .006) DETAIL “A” 0.18 (.007) SEATING PLANE 12345678 1.10 (.043) MAX 0.86 (.034) REF NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC 0.1016 (.004 0.0508 .002) MSOP (MS16) 1107 REV Ø 6909f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC6909 TYPICAL APPLICATION Providing an 8-Phase Synchronizing Clock to LTM Modules INPUT SUPPLY 0.1μF INTVCC LTC6909 OUT1 V+D GND 35.7k 0.1μF V+A SET PH0 PH1 PH2 MOD OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 LTM4601-1 TRACKING LTM4601-1 TRACKING LTM4601-1 TRACKING LTM4601-1 TRACKING LTM4601-1 OUTPUT4 6909 TA05 LTM4601 S0FT-START OUTPUT1 TRACKING LTM4601-1 TRACKING LTM4601-1 TRACKING OUTPUT2 OUTPUT3 OUTPUT4 OUTPUT3 OUTPUT4 OUTPUT3 RELATED PARTS PART NUMBER LTC1799 LTC6900 LTC6902 LTC6905 LTC6905-XXX LTC6906 LTC6907 LTC6908-1 LTC6908-2 LTC6930-XXX DESCRIPTION 1kHz to 33MHz ThinSOT™ Oscillator, Resistor Set 1kHz to 20MHz ThinSOT Oscillator, Resistor Set Multiphase Oscillator with Spread Spectrum Modulation 17MHz to 170MHz ThinSOT Oscillator, Resistor Set Fixed Frequency ThinSOT Oscillators, Up to 133MHz Micropower ThinSOT Oscillator, Resistor Set Micropower ThinSOT Oscillator, Resistor Set 50kHz to 10MHz Dual Output ThinSOT Oscillator, Resistor Set 50kHz to 10MHz Dual Output ThinSOT Oscillator, Resistor Set Fixed Frequency Oscillator, 32.768kHz to 8.192MHz COMMENTS Wide Frequency Range Low Power, Wide Frequency Range 2-, 3- or 4-Phase Outputs 0.1% Frequency Resolution, I2C or SPI Interface High Frequency, 100μs Start-Up, 7ps RMS Jitter No Trim Components Required 10kHz to 1MHz, 12mA at 100kHz 40kHz to 4MHz, 36μA at 400kHz Complementary Outputs (0°/180°) Quadrature Outputs (0°/90°) 0.09% Accuracy, 110μs Startup Time, 105μA at 32kHz LTC6903/LTC6904 1kHz to 68MHz Serial Port Programmable Oscillator ThinSOT is a trademark of Linear Technology Corporation. 6909f 20 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0209 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2009