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LMU216JC25

LMU216JC25

  • 厂商:

    LODEV

  • 封装:

  • 描述:

    LMU216JC25 - 16 x 16-bit Parallel Multiplier - LOGIC Devices Incorporated

  • 数据手册
  • 价格&库存
LMU216JC25 数据手册
LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier DESCRIPTION The L MU16 a nd L MU216 a re highspeed, low power 16-bit parallel multipliers. The LMU16 and LMU216 are functionally identical; they differ only in packaging. The LMU16 and LMU216 produce the 32-bit product of two 16-bit numbers. Data present at the A inputs, along with the TCA control bit, is loaded into the A register on the rising edge of CLK A. B data and the TCB control bit are similarly loaded by CLK B. The TCA and TCB controls specify the A and B operands as two’s complement when HIGH, or unsigned magnitude when LOW. RND is loaded on the rising edge of the logical OR of CLK A and CLK B. RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product. Subsequent truncation of the 16 least significant bits produces a result correctly rounded to 16-bit precision. At the output, the Right Shift control (RS) selects either of two output formats. RS LOW produces a 31-bit product with a copy of the sign bit inserted in the MSB postion of the least significant half. RS HIGH gives a full 32-bit product. Two 16-bit output registers are provided to hold the most and least significant halves of the result (MSP and LSP) as defined by RS. These registers are loaded on the rising edge of CLK M and CLK L respectively. For asynchronous output, these registers may be made transparent by setting the feed through control (FT) HIGH. The two halves of the product may be routed to a single 16-bit three-state output port (MSP) via a multiplexer. MSPSEL LOW causes the MSP outputs to be driven by the most significant half of the result. MSPSEL HIGH routes the least significant half of the result to the MSP outputs. In addition, the LSP is available via the B port through a separate three-state buffer. The output multiplexer control MSPSEL uses a pin which is a supply ground in the Fairchild MPY016H/ TMC216H. When this control is LOW (GND), the function is that of the MPY016H/TMC216H, thus allowing full compatibility. FEATURES u 20 ns Worst-Case Multiply Time u Low Power CMOS Technology u Replaces Fairchild MPY016/TMC216, Cypress CY7C516, IDT 7216L, and AMD Am29516 u Two’s Complement, Unsigned, or Mixed Operands u Three-State Outputs u 68-pin PLCC, J-Lead LMU16/216 BLOCK DIAGRAM B 15-0/ R 15-0 TCA A 15-0 16 CLK A CLK B A REGISTER TCB 16 B REGISTER RND REGISTER 32 RS FORMAT ADJUST 16 FT CLK M RESULT 16 REGISTER CLK L MSPSEL OEM 16 R 31-16 16 OEL Multipliers 1 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier FIGURE 1A. INPUT FORMATS AIN BIN Fractional Two’s Complement (TCA, TCB = 1) 15 14 13 –20 2–1 2–2 (Sign) 210 2–13 2–14 2–15 15 14 13 –20 2–1 2–2 (Sign) 210 2–13 2–14 2–15 Integer Two’s Complement (TCA, TCB = 1) 15 14 13 –215 214 213 (Sign) 210 22 21 20 15 14 13 –215 214 213 (Sign) 210 22 21 20 Unsigned Fractional (TCA, TCB = 0) 15 14 13 2–1 2–2 2–3 210 2–14 2–15 2–16 15 14 13 2–1 2–2 2–3 210 2–14 2–15 2–16 Unsigned Integer (TCA, TCB = 0) 15 14 13 215 214 213 210 22 21 20 15 14 13 215 214 213 210 22 21 20 FIGURE 1B. OUTPUT FORMATS MSP Fractional Two’s Complement (RS = 0) 31 30 29 –20 2–1 2–2 (Sign) LSP 18 17 16 2–13 2–14 2–15 15 14 13 –20 2–16 2–17 (Sign) 210 2–28 2–29 2–30 Fractional Two’s Complement (RS = 1) 31 30 29 –21 20 2–1 (Sign) 18 17 16 2–12 2–13 2–14 15 14 13 2–15 2–16 2–17 210 2–28 2–29 2–30 Integer Two’s Complement (RS = 1) 31 30 29 –231 230 229 (Sign) 18 17 16 218 217 216 15 14 13 215 214 213 210 22 21 20 Unsigned Fractional (RS = 1) 31 30 29 2–1 2–2 2–3 18 17 16 2–14 2–15 2–16 15 14 13 2–17 2–18 2–19 210 2–30 2–31 2–32 Unsigned Integer (RS = 1) 31 30 29 231 230 229 18 17 16 218 217 216 15 14 13 215 214 213 210 22 21 20 Multipliers 2 08/16/2000–LDS.16/216-N LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) Storage temperature ........................................................................................................... –65°C to +150°C Operating ambient temperature ........................................................................................... –55°C to +125°C VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V Output current into low outputs ............................................................................................................. 25 mA Latchup current ............................................................................................................................... > 400 mA OPERATING CONDITIONS To meet specified electrical and switching characteristics Mode Active Operation, Commercial Active Operation, Military Temperature Range (Ambient) 0°C to +70°C –55°C to +125°C Supply Voltage 4.75 V ≤ VCC ≤ 5.25 V 4.50 V ≤ VCC ≤ 5.50 V ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4) Symbol VOH VOL VIH VIL IIX IOZ ICC1 ICC2 Parameter Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Current Output Leakage Current VCC Current, Dynamic VCC Current, Quiescent (Note 3) Test Condition VCC = Min., IOH = –2.0 mA VCC = Min., IOL = 8.0 mA Min 2.4 Typ Max Unit V 0.5 2.0 0.0 VCC 0.8 ±20 ±20 12 25 1.0 V V V µA µA mA mA Ground ≤ VIN ≤ VCC (Note 12) Ground ≤ VOUT ≤ VCC (Note 12) (Notes 5, 6) (Note 7) Multipliers 3 08/16/2000–LDS.16/216-N 432109876543210987654321 432109876543210987654321 432109876543210987654321 *DISCONTINUED SPEED GRADE Symbol Symbol R31-0 HIGH IMPEDANCE 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 543210987654321098765432121098765432109876543210987654321 Min Max Min Max Min Max Min Max Min Max Min Max 15 20 2 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 65432121098765432109876543210987654321 1 65432121098765432109876543210987654321 65432121098765432109876543210987654321 6543212109876543210987654321098765432 15 15 1 DEVICES INCORPORATED SWITCHING WAVEFORMS MILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) COMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns) SWITCHING CHARACTERISTICS tDIS tENA tSEL tD tH tS tPW tMUC tMC tDIS tENA tSEL tD tH tS tPW tMUC tMC MSPSEL Parameter Three-State Output Disable Delay (Note 11) Three-State Output Enable Delay (Note 11) Output Select Delay Output Delay Input Hold Time Input Setup Time Clock Pulse Width Unclocked Multiply Time Clocked Multiply Time Parameter Three-State Output Disable Delay (Note 11) Three-State Output Enable Delay (Note 11) Output Select Delay Output Delay Input Hold Time Input Setup Time Clock Pulse Width Unclocked Multiply Time Clocked Multiply Time CLK L CLK M INPUT CLK A CLK B OEL OEM tS tH tPW tDIS Min Max Min Max Min Max Min Max Min Max Min Max tMC 75* 65* 4 25 25 25 30 65 85 25 25 30 35 75 95 tPW tMUC 15 15 15 15 1 tENA 2 55* 65* 25 25 25 30 55 75 25 25 30 30 65 85 15 15 15 15 16 x 16-bit Parallel Multiplier 1 2 LMU16/216– 45* 35* LMU16/216– 55* 40* 25 25 25 30 45 65 25 25 30 30 55 75 12 10 15 15 1 tD 2 tSEL 22 25 25 25 35 55 25 25 25 25 40 60 12 10 12 10 1 2 30* 25 08/16/2000–LDS.16/216-N LMU16/216 Multipliers 20 20 20 20 25 38 22 20 20 20 30 43 11 12 10 9 1 2 25* 20 18 18 18 18 20 30 22 20 20 20 25 38 LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier NOTES 9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except tDIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max 2. The products described by this spec- respectively. Alternatively, a diode ification include internal circuitry de- bridge with upper and lower current signed to protect the chip from damagsources of I OH and I OL respectively, ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF less, conventional precautions should minimum, and may be distributed. be observed during storage, handling, and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current stress values. pulses and fast turn-on/turn-off times. As a result, care must be exercised in the 3. This device provides hard clamping of testing of this device. The following transient undershoot and overshoot. In- measures are recommended: put levels below ground or above VCC will be clamped beginning at –0.6 V and a. A 0.1 µF ceramic capacitor should be VCC + 0.6 V. The device can withstand installed between VCC and Ground indefinite operation with inputs in the leads as close to the Device Under Test range of –0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors tion will not be adversely affected, how- should be installed between device VCC ever, input current levels will be well in and the tester common, and device ground and tester common. excess of 100 mA. 4. Actual test conditions may vary from b. Ground and VCC supply planes those designated but operation is guar- must be brought directly to the DUT anteed as specified. socket or contactor fingers. 5. Supply current for a given applica- c. Input voltages should be adjusted to tion can be accurately approximated by: compensate for inductive ground and VCC noise to maintain required DUT input NCV2 F levels relative to the DUT ground pin. 4 where 10. Each parameter is shown as a minimum or maximum value. Input requirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that ery cycle and no load, at a 5 MHz clock much time to meet the worst-case requirements of all parts. Responses from rate. the internal circuitry are specified from 7. Tested with all inputs within 0.1 V of the point of view of the device. Output VCC or Ground, no load. delay, for example, is specified as a 8. These parameters are guaranteed maximum since worst-case operation of any device always provides data within but not 100% tested. that time. N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 11. For the tENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the ±200mV level from the measured steady-state output voltage with ±10mA loads. The balancing voltage, V TH , is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. FIGURE A. OUTPUT LOADING CIRCUIT DUT S1 IOL CL IOH VTH FIGURE B. THRESHOLD LEVELS tENA OE Z 0 1.5 V 1.5 V 1.5 V tDIS 3.5V Vth VOL* 0.2 V 0 1 Z Z 1.5 V VOH* 0.2 V Z 1 0V Vth VOL* Measured VOL with IOH = –10mA and IOL = 10mA VOH* Measured VOH with IOH = –10mA and IOL = 10mA Multipliers 5 08/16/2000–LDS.16/216-N 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432654321098765432121098765432109876543210987654321 6 1 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 765432109876543212109876543210987654321098765432154321098765432121098765432109876543210987654321 6 DEVICES INCORPORATED Speed –55°C to +125°C — MIL-STD-883 COMPLIANT –55°C to +125°C — COMMERCIAL SCREENING 0°C to +70°C — COMMERCIAL SCREENING LMU16 — ORDERING INFORMATION 64-pin A4 A3 A2 A1 A0 OEL CLK L CLK B R0, B0 R1, B1 R2, B2 R3, B3 R4, B4 R5, B5 R6, B6 R7, B7 R8, B8 R9, B9 R10, B10 R11, B11 R12, B12 R13, B13 R14, B14 R15, B15 R16 R17 R18 R19 R20 R21 R22 R23 Sidebraze Hermetic DIP (D6) Discontinued Package 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 CLK A RND TCA TCB VCC VCC GND GND MSPSEL FT RS OEM CLK M R31 R30 R29 R28 R27 R26 R25 R24 6 68-pin G H D C K E B A F L J R/B15 R/B14 R/B9 R/B8 R/B7 R/B6 R/B5 R/B4 R/B3 R/B2 R/B1 R/B0 CLK L R/B13 R/B12 R/B11 R/B10 NC 1 R17 R16 NC CLK B OEL 2 16 x 16-bit Parallel Multiplier R19 R18 Ceramic Pin Grid Array (G2) 3 Discontinued Package R21 R20 (i.e., Component Side Pinout) A0 4 Through Package R23 R22 A2 A1 5 Top View R25 R24 A4 A3 6 R27 R26 A6 A5 7 R29 R28 A8 A7 8 08/16/2000–LDS.16/216-N LMU16/216 Multipliers R31 A10 A9 R30 CLK M OEM 9 MSPSEL GND CLK A A15 GND VCC TCA RND VCC TCB A14 A12 A11 NC RS 10 A13 NC FT 11 LMU16/216 DEVICES INCORPORATED 16 x 16-bit Parallel Multiplier LMU216 — ORDERING INFORMATION 68-pin R31 R30 R29 R28 R27 R26 R25 R24 R23 R22 R21 R20 R19 R18 R17 R16 NC NC CLK M OEM RS FT MSPSEL GND GND VCC VCC TCB TCA RND CLK A A15 A14 A13 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 Top View 53 52 51 50 49 48 47 46 45 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 NC A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 OEL CLK L CLK B Speed Plastic J-Lead Chip Carrier (J2) 0°C to +70°C — COMMERCIAL SCREENING 25 ns 20 ns LMU216JC25 LMU216JC20 –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT R15, B15 R14, B14 R13, B13 R12, B12 R11, B11 R10, B10 R9, B9 R8, B8 R7, B7 R6, B6 R5, B5 R4, B4 R3, B3 R2, B2 R1, B1 R0, B0 NC Multipliers 7 08/16/2000–LDS.16/216-N
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