LMU8UJC50

LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier DESCRIPTION The LMU08 and LMU8U are highspeed, low power 8-bit parallel multipliers. They are pin-for-pin equivalents with TRW TMC208K and TMC28KU type multipliers. Full military ambient temperature range operation is attained by the use of advanced CMOS technology. This facilitates use of the LMU08 product as a double precision operand in 8-bit systems. The LMU8U operates on unsigned data, producing an unsigned magnitude result. FEATURES u u u u u 20 ns Worst-Case Multiply Time Low Power CMOS Technology LMU08 Replaces TRW TMC208K LMU8U Replaces TRW TMC28KU Two’s Complement (LMU08), or Unsigned Operands (LMU8U) u Three-State Outputs u Package Styles Available: • 40-pin PDIP • 44-pin PLCC, J-Lead LMU08/8U BLOCK DIAGRAM CLK A CLK B Both the LMU08 and the LMU8U feature independently controlled registers for both inputs and the product, which along with three-state Both the LMU08 and the LMU8U produce the 16-bit product of two outputs allows easy interfacing with 8-bit numbers. The LMU08 accepts microprocessor busses. Provision is operands in two’s complement format, made in the LMU08 and LMU8U for proper rounding of the product to and produces a two’s complement result. The product is provided in two 8-bit precision. The round input is halves with the sign bit replicated as loaded at the rising edge of the logical the most significant bit of both halves. OR of CLK A and CLK B for the LMU08. The LMU8U latches RND on the rising edge of CLK A only. In either case, a ‘1’ is added in the most significant position of the lower A 7-0 B 7-0 product byte when RND is asserted. 8 8 Subsequent truncation of the least significant product byte results in a B REGISTER A REGISTER correctly rounded 8-bit result. LMU08 Only REGISTER RND 16 8 8 CLK R RESULT REGISTER OEM 8 R 15-8 8 R 7-0 OEL Multipliers 1 08/16/2000–LDS.08/8U-R LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier FIGURE 1A. INPUT FORMATS AIN LMU08 Fractional Two’s Complement 765 –20 2–1 2–2 (Sign) BIN 210 2–5 2–6 2–7 765 –20 2–1 2–2 (Sign) 210 2–5 2–6 2–7 LMU08 Integer Two’s Complement 765 –27 26 25 (Sign) 210 22 21 20 765 –27 26 25 (Sign) 210 22 21 20 LMU8U Unsigned Fractional 765 2–1 2–2 2–3 210 2–6 2–7 2–8 765 2–1 2–2 2–3 210 2–6 2–7 2–8 LMU8U Unsigned Integer 765 27 26 25 210 22 21 20 765 27 26 25 210 22 21 20 FIGURE 1B. OUTPUT FORMATS MSP LMU08 Fractional Two’s Complement 15 14 13 –20 2–1 2–2 (Sign) LSP 10 9 8 2–5 2–6 2–7 765 –20 2–8 2–9 (Sign) 210 2–12 2–13 2–14 LMU08 Integer Two’s Complement 15 14 13 –214 213 212 (Sign) 10 9 8 29 28 27 765 –214 26 25 (Sign) 210 22 21 20 LMU8U Unsigned Fractional 15 14 13 2–1 2–2 2–3 10 9 8 2–6 2–7 2–8 765 2–9 2–10 2–11 210 2–14 2–15 2–16 LMU8U Unsigned Integer 15 14 13 215 214 213 10 9 8 210 29 28 765 27 26 25 210 22 21 20 Multipliers 2 08/16/2000–LDS.08/8U-R LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8) Storage temperature ........................................................................................................... –65°C to +150°C Operating ambient temperature ........................................................................................... –55°C to +125°C VCC supply voltage with respect to ground ............................................................................ –0.5 V to +7.0 V Input signal with respect to ground ........................................................................................ –3.0 V to +7.0 V Signal applied to high impedance output ............................................................................... –3.0 V to +7.0 V Output current into low outputs ............................................................................................................. 25 mA Latchup current ............................................................................................................................... > 400 mA OPERATING CONDITIONS To meet specified electrical and switching characteristics Mode Active Operation, Commercial Active Operation, Military Temperature Range (Ambient) 0°C to +70°C –55°C to +125°C Supply Voltage 4.75 V ≤ VCC ≤ 5.25 V 4.50 V ≤ VCC ≤ 5.50 V ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4) Symbol VOH VOL VIH VIL IIX IOZ ICC1 ICC2 Parameter Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Current Output Leakage Current VCC Current, Dynamic VCC Current, Quiescent (Note 3) Test Condition VCC = Min., IOH = –2.0 mA VCC = Min., IOL = 8.0 mA Min 2.4 Typ Max Unit V 0.5 2.0 0.0 VCC 0.8 ±20 ±20 8 24 1.0 V V V µA µA mA mA Ground ≤ VIN ≤ VCC (Note 12) Ground ≤ VOUT ≤ VCC (Note 12) (Notes 5, 6) (Note 7) Multipliers 3 08/16/2000–LDS.08/8U-R 432109876543210987654321 432109876543210987654321 432109876543210987654321 432109876543210987654321 *DISCONTINUED SPEED GRADE Symbol Symbol 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 321098765432121098765432109876543210987654321 Min DEVICES INCORPORATED COMMERCIAL OPERATING RANGE (0°C to +70°C) Notes 9, 10 (ns) SWITCHING CHARACTERISTICS 8 x 8-bit Parallel Multiplier LMU08/8U– 50 35 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 10987654321 210987654321 210987654321 2 Min 21098765432 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 210987654321 1 210987654321 Min SWITCHING WAVEFORMS MILITARY OPERATING RANGE (–55°C to +125°C) Notes 9, 10 (ns) tDIS tENA tD tH tS tPW tMC tDIS tENA tD tH tS tPW tMC INPUT CLK R CLK A CLK B OEL OEM R15-0 Parameter Three-State Output Disable Delay (Note 11) Three-State Output Enable Delay (Note 11) Output Delay Input Register Hold Time Input Register Setup Time Clock Pulse Width Clocked Multiply Time Parameter Three-State Output Disable Delay (Note 11) Three-State Output Enable Delay (Note 11) Output Delay Input Register Hold Time Input Register Setup Time Clock Pulse Width Clocked Multiply Time tS tH tPW tDIS HIGH IMPEDANCE tMC 4 tPW 14 20 20 25 4 5 70* 90* tENA Max Max 22 24 25 70 35 35 35 90 Min Min 15 20 14 20 2 0 LMU08/8U– 60* 45* Max Max 22 24 22 60 20 20 22 50 tD Min Min 15 15 14 10 2 0 Max Max 20 20 22 35 22 24 22 45 Multipliers LMU08/8U Min 08/16/2000–LDS.08/8U-R 10 15 10 0 8 2 20* 25* Max Max 15 15 18 20 20 20 20 25 LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier NOTES 9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except tDIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max 2. The products described by this spec- respectively. Alternatively, a diode ification include internal circuitry de- bridge with upper and lower current signed to protect the chip from damagsources of I OH and I OL respectively, ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF less, conventional precautions should minimum, and may be distributed. be observed during storage, handling, and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current stress values. pulses and fast turn-on/turn-off times. As a result, care must be exercised in the 3. This device provides hard clamping of testing of this device. The following transient undershoot and overshoot. In- measures are recommended: put levels below ground or above VCC will be clamped beginning at –0.6 V and a. A 0.1 µF ceramic capacitor should be VCC + 0.6 V. The device can withstand installed between VCC and Ground indefinite operation with inputs in the leads as close to the Device Under Test range of –0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors tion will not be adversely affected, how- should be installed between device VCC ever, input current levels will be well in and the tester common, and device ground and tester common. excess of 100 mA. 4. Actual test conditions may vary from b. Ground and VCC supply planes those designated but operation is guar- must be brought directly to the DUT anteed as specified. socket or contactor fingers. 5. Supply current for a given applica- c. Input voltages should be adjusted to tion can be accurately approximated by: compensate for inductive ground and VCC noise to maintain required DUT input NCV2 F levels relative to the DUT ground pin. 4 where 10. Each parameter is shown as a minimum or maximum value. Input requirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that ery cycle and no load, at a 5 MHz clock much time to meet the worst-case requirements of all parts. Responses from rate. the internal circuitry are specified from 7. Tested with all inputs within 0.1 V of the point of view of the device. Output VCC or Ground, no load. delay, for example, is specified as a 8. These parameters are guaranteed maximum since worst-case operation of any device always provides data within but not 100% tested. that time. N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 11. For the tENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the ±200mV level from the measured steady-state output voltage with ±10mA loads. The balancing voltage, V TH , is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. FIGURE A. OUTPUT LOADING CIRCUIT DUT S1 IOL CL IOH VTH FIGURE B. THRESHOLD LEVELS tENA OE Z 0 1.5 V 1.5 V 1.5 V tDIS 3.5V Vth VOL* 0.2 V 0 1 Z Z 1.5 V VOH* 0.2 V Z 1 0V Vth VOL* Measured VOL with IOH = –10mA and IOL = 10mA VOH* Measured VOH with IOH = –10mA and IOL = 10mA Multipliers 5 08/16/2000–LDS.08/8U-R LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier LMU08 — ORDERING INFORMATION 40-pin — 0.6" wide 44-pin R10 R9 R8 CLK R OEM OEL (R7) RSL R6 R5 R4 R3 R2 R1 R0 A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 R11 R12 R13 R14 RSM (R15) BS (B7) B6 B5 GND B4 VCC B3 B2 B1 B0 RND CLK B CLK A AS (A7) A6 OEL (R7) RSL R6 R5 R4 R3 R2 R1 R0 A0 NC NC OEM CLK R R8 R9 R10 R11 R12 R13 R14 RSM (R15) 7 8 9 10 11 12 13 14 15 16 17 6 5 4 3 2 1 44 43 42 41 40 39 38 37 36 Top View 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 NC BS (B7) B6 B5 GND B4 VCC B3 B2 B1 B0 Speed Plastic DIP (P3) 0°C to +70°C — COMMERCIAL SCREENING 50 ns 35 ns LMU08PC35 LMU08JC50 LMU08JC35 –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT A1 A2 A3 A4 A5 A6 (A7) AS CLK A CLK B RND NC Plastic J-Lead Chip Carrier (J1) Multipliers 6 08/16/2000–LDS.08/8U-R LMU08/8U DEVICES INCORPORATED 8 x 8-bit Parallel Multiplier LMU8U — ORDERING INFORMATION 40-pin — 0.6" wide 44-pin R10 R9 R8 CLK R OEM OEL R7 R6 R5 R4 R3 R2 R1 R0 A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 R11 R12 R13 R14 R15 B7 B6 B5 GND B4 VCC B3 B2 B1 B0 RND CLK B CLK A A7 A6 OEL R7 R6 R5 R4 R3 R2 R1 R0 A0 NC NC OEM CLK R R8 R9 R10 R11 R12 R13 R14 R15 7 8 9 10 11 12 13 14 15 16 17 6 5 4 3 2 1 44 43 42 41 40 39 38 37 36 Top View 35 34 33 32 31 30 29 18 19 20 21 22 23 24 25 26 27 28 NC B7 B6 B5 GND B4 VCC B3 B2 B1 B0 Speed Plastic DIP (P3) 0°C to +70°C — COMMERCIAL SCREENING 50 ns 35 ns LMU8UPC50 LMU8UPC35 LMU8UJC50 LMU8UJC35 –55°C to +125°C — COMMERCIAL SCREENING –55°C to +125°C — MIL-STD-883 COMPLIANT A1 A2 A3 A4 A5 A6 A7 CLK A CLK B RND NC Plastic J-Lead Chip Carrier (J1) Multipliers 7 08/16/2000–LDS.08/8U-R