MAX15108EWP

19-5917; Rev 0; 6/11 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator General Description The MAX15108 high-efficiency, current-mode, synchronous step-down switching regulator with integrated power switches delivers up to 8A of output current. The regulator operates from 2.7V to 5.5V and provides an output voltage from 0.6V up to 95% of the input voltage, making the device ideal for distributed power systems, portable devices, and preregulation applications. The IC utilizes a current-mode control architecture with a high gain transconductance error amplifier. The current-mode control architecture facilitates easy compensation design and ensures cycle-by-cycle current limit with fast response to line and load transients. The regulator offers a selectable skip-mode functionality to reduce current consumption and achieve a higher efficiency at light output load. The low RDS(ON) integrated switches ensure high efficiency at heavy loads while minimizing critical inductance, making the layout design a much simpler task with respect to discrete solutions. The IC’s simple layout and footprint assures first-pass success in new designs. The regulator features a 1MHz, factory-trimmed fixedfrequency PWM mode operation. The high switching frequency, along with the PWM current-mode architecture allows for a compact, all ceramic capacitor design. The IC features a capacitor-programmable soft-start to reduce input inrush current. Internal control circuitry ensures safe-startup into a prebiased output. Power sequencing is controlled with the enable input and power-good output. The IC is available in a 20-bump (4 x 5 array), 2.5mm x 2mm, WLP package and is fully specified over the -40NC to +85NC temperature range. S Continuous 8A Output Current S Efficiency Up to 96% S ±1% Accuracy Over Load, Line, and Temperature S Operates from a 2.7V to 5.5V Supply S Adjustable Output from 0.6V to 0.95 x VIN S Programmable Soft-Start S Safe Startup into Prebiased Output S External Reference Input S 1MHz Switching Frequency S Stable with Low-ESR Ceramic Output Capacitors S Skip Mode or Forced PWM Mode S Enable Input and Power-Good Output for Power- TION KIT EVALUA BLE ILA AVA Features MAX15108 Supply Sequencing S Cycle-by-Cycle Overcurrent Protection S Fully Protected Features Against Overcurrent and Overtemperature S Input Undervoltage Lockout S 20-Bump (4 x 5 Array), 2.5mm x 2mm, WLP Package Ordering Information PART MAX15108EWP+ TEMP RANGE PIN-PACKAGE 20 WLP -40NC to +85NC +Denotes a lead(Pb)-free/RoHS-compliant package. Typical Operating Circuit SKIP 2.7V TO 5.5V EN IN LX PGND OUTPUT Applications Distributed Power Systems DDR Memory Base Stations Portable Devices Notebook Power Server Power INX COMP PGOOD MAX15108 FB SS _______________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 ABSOLUTE MAXIMUM RATINGS IN, PGOOD to PGND .............................................. -0.3V to +6V LX to PGND ................................................ -0.3V to (VIN + 0.3V) LX to PGND ..................................... -1V to (VIN + 0.3V) for 50ns EN, COMP, FB, SS, SKIP to PGND ............ -0.3V to (VIN + 0.3V) LX Current (Note 1) ............................................... -12A to +12A Output Short-Circuit Duration .................................... Continuous Continuous Power Dissipation (TA = +70NC) WLP (derate 21.3mW/NC above TA = +70NC) .......... 745.5mW Operating Temperature Range .......................... -40NC to +85NC Operating Junction Temperature (Note 2) ......................+105NC Storage Temperature Range............................ -65NC to +150NC Soldering Temperature (reflow) (Note 3) ........................+260NC Note 1: LX has internal clamp diodes to PGND and IN. Do not exceed the power dissipation limits of the device when forward biasing these diodes. Note 2: Limit the junction temperature to +105NC for continuous operation at full current. Note 3: The WLP package is constructed using a unique set of package techniques that impose a limit on the thermal profile the device can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry-standard specification JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = 5V, CSS = 4.7nF, TA = TJ = -40NC to +85NC. Typical values are at TA = +25NC, unless otherwise noted.) (Note 4) PARAMETER IN Voltage Range IN Shutdown Supply Current IN Supply Current VIN Undervoltage Lockout Threshold VIN Undervoltage Lockout Hysteresis ERROR AMPLIFIER Transconductance Voltage Gain FB Set-Point Accuracy FB Input Bias Current COMP to Current-Sense Transconductance COMP Clamp Low Compensation RAMP Valley POWER SWITCHES High-Side Switch Current-Limit Threshold Low-Side Switch Sink Current-Limit Threshold Low-Side Switch Source Current-Limit Threshold IHSCL 14 14 14 A A A gMV AVEA VFB IFB GMOD VFB = 0.68V Over line, load, and temperature 594 -100 25 0.93 1 1.4 90 600 606 +100 mS dB mV nA A/V V V IIN SYMBOL VIN VEN = 0V VEN = 5V, VFB = 0.75V, not switching LX starts switching, VIN rising LX stops switching, VIN falling CONDITIONS MIN 2.7 0.3 3.4 2.6 200 TYP MAX 5.5 3 6 2.7 UNITS V FA mA V mV 2 ______________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator ELECTRICAL CHARACTERISTICS (continued) (VIN = 5V, CSS = 4.7nF, TA = TJ = -40NC to +85NC. Typical values are at TA = +25NC, unless otherwise noted.) (Note 4) PARAMETER LX Leakage Current RMS LX Output Current OSCILLATOR Switching Frequency Maximum Duty Cycle Minimum Controllable On-Time ENABLE EN Input High Threshold Voltage EN Input Low Threshold Voltage EN Input Leakage Current SKIP Skip Input High Threshold Voltage Skip Input Low Threshold Voltage Skip Input Leakage Current Zero-Crossing Current Threshold On-Time in Skip Mode SOFT-START, PREBIAS Soft-Start Current SS Discharge Resistance SS Prebias Mode Stop Voltage HICCUP Number of Consecutive Current-Limit Events to Hiccup Timeout POWER-GOOD OUTPUT PGOOD Threshold PGOOD Threshold Hysteresis PGOOD VOL PGOOD Leakage THERMAL SHUTDOWN Thermal Shutdown Threshold Thermal Shutdown Hysteresis Temperature falling +160 25 NC NC FB rising FB falling IPGOOD = 5mA, VFB = 0.5V VPGOOD = 5V, VFB = 0.68V 0.54 0.56 25 22 100 1 0.58 V mV mV FA 8 1024 Events Clock Cycles ISS RSS VSS = 0.45V, sourcing ISS = 10mA, sinking SS rising 10 8.5 0.58 FA I V VSKIP rising VSKIP falling VSKIP = 5V ILX falling 0.7 335 1.3 0.4 30 V V FA A ns VEN rising VEN falling VEN = 5V 1.3 0.4 1 V V FA fSW DMAX 850 1000 94 100 1150 kHz % ns SYMBOL VEN = 0V 8 CONDITIONS MIN TYP MAX 10 UNITS FA A MAX15108 3 Note 4: Specifications are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by design and characterization. _______________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 Typical Operating Characteristics (Circuit of Typical Application Circuit, TA = +25NC, unless otherwise noted.) EFFICIENCY vs. OUTPUT CURRENT (VIN = 5V, PWM MODE) MAX15108 toc01a EFFICIENCY vs. OUTPUT CURRENT (VIN = 3.3V, PWM MODE) MAX15108 toc01b EFFICIENCY vs. OUTPUT CURRENT (VIN = 5V, SKIP MODE) 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 VOUT = 1.5V VOUT = 0.9V VOUT = 1.2V VOUT = 2.5V VOUT = 3.3V MAX15108 toc02a 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 VOUT = 1.5V VOUT = 0.9V VOUT = 1.2V VOUT = 2.5V VOUT = 3.3V 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 VOUT = 1.8V VOUT = 2.5V 100 VOUT = 1.8V VOUT = 1.5V VOUT = 0.9V VOUT = 1.2V VOUT = 1.8V 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 OUTPUT CURRENT (A) OUTPUT CURRENT (A) OUTPUT CURRENT (A) EFFICIENCY vs. OUTPUT CURRENT (VIN = 3.3V, SKIP MODE) MAX15108 toc02b SWITCHING FREQUENCY vs. INPUT VOLTAGE 1070 SWITCHING FREQUENCY (kHz) 1060 1050 1040 1030 1020 1010 1000 990 980 MAX15108 toc03 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 VOUT = 1.8V VOUT = 2.5V 1080 VOUT = 1.5V VOUT = 0.9V VOUT = 1.2V 8 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 OUTPUT CURRENT (A) INPUT VOLTAGE (V) OUTPUT VOLTAGE vs. SUPPLY VOLTAGE (PWM MODE, VOUT = 1.5V) MAX15108 toc04a OUTPUT VOLTAGE vs. SUPPLY VOLTAGE (SKIP MODE, VOUT = 1.5V) 1.54 1.53 OUTPUT VOLTAGE (V) 1.52 1.51 1.50 1.49 1.48 1.47 1.46 1.45 ILOAD = 2A ILOAD = 8A MAX15108 toc04b 1.520 1.515 OUTPUT VOLTAGE (V) 1.510 1.505 1.500 1.495 1.490 1.485 1.480 2.7 3.1 3.5 3.9 4.3 4.7 5.1 1.55 ILOAD = 2A ILOAD = 8A 5.5 2.7 3.1 3.5 SUPPLY VOLTAGE (V) 3.9 4.3 4.7 SUPPLY VOLTAGE (V) 5.1 5.5 4 ______________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Typical Operating Characteristics (continued) (Circuit of Typical Application Circuit, TA = +25NC, unless otherwise noted.) OUTPUT VOLTAGE vs. OUTPUT CURRENT (PWM MODE, VOUT = 1.5V) MAX15108 toc05a MAX15108 OUTPUT VOLTAGE vs. OUTPUT CURRENT (SKIP MODE, VOUT = 1.5V) MAX15108 toc05b 1.53 1.52 OUTPUT VOLTAGE (V) 1.51 1.50 1.49 1.48 1.47 0 1 2 3 4 5 6 7 VIN = 3.3V 1.53 1.52 OUTPUT VOLTAGE (V) 1.51 1.50 VIN = 3.3V 1.49 1.48 1.47 VIN = 5V VIN = 5V 8 0 1 2 3 4 5 6 7 8 OUTPUT CURRENT (A) OUTPUT CURRENT (A) OUTPUT VOLTAGE ERROR % vs. SUPPLY VOLTAGE 0.4 OUTPUT VOLTAGE ERROR (%) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 2.7 3.1 3.5 3.9 4.3 4.7 SUPPLY VOLTAGE (V) VOUT = 0.9V VOUT = 1.5V VOUT = 1.8V ILOAD = 8A 5.1 5.5 NORMALIZED AT VIN = 3.3V VOUT = 2.5V VOUT = 1.2V MAX15108 toc06 0.5 LOAD-TRANSIENT RESPONSE (VIN = 5V, VOUT = 1.5V) MAX15108 toc07 VOUT 50mV/div AC-COUPLED 8A ILOAD 2A/div 4A 40µs/div SWITCHING WAVEFORMS (IOUT = 8A, VIN = 5V) MAX15108 toc08 SOFT-START WAVEFORMS (ILOAD = 8A) MAX15108 toc11 SWITCHING WAVEFORM IN SKIP MODE (IOUT = 10mA) MAX15108 toc09 VEN 2V/div VOUT 10mV/div AC-COUPLED ILX 5A/div VLX 2V/div VOUT 10mV/div AC-COUPLED VLX 2V/div ILX 5A/div VOUT 1V/div VPGOOD 2V/div 400ns/div 1ms/div ILX 2A/div VLX 2V/div 20µs/div _______________________________________________________________________________________ 5 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 Typical Operating Characteristics (continued) (Circuit of Typical Application Circuit, TA = +25NC, unless otherwise noted.) SHUTDOWN WAVEFORM (ILOAD = 8A) MAX15108 toc10 SOFT-START WAVEFORMS (ILOAD = 8A) MAX15108 toc11 VEN 2V/div VEN 2V/div VLX 5V/div ILX 5A/div VLX 2V/div ILX 5A/div VOUT 1V/div VPGOOD 2V/div 1ms/div VOUT VPGOOD 1V/div 10µs/div INPUT SHUTDOWN CURRENT vs. SUPPLY VOLTAGE MAX15108 toc12 INPUT CURRENT vs. INPUT VOLTAGE NO-LOAD, SKIP MODE 4 INPUT CURRENT (mA) 3 2 1 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 INPUT VOLTAGE (V) MAX15108 toc13 2.0 INPUT SHUTDOWN CURRENT (µA) 1.6 1.2 0.8 0.4 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5 5.5 SUPPLY VOLTAGE (V) OVERLOAD HICCUP MODE MAX15108 toc14 RMS INPUT CURRENT vs. SUPPLY VOLTAGE 0.9 RMS INPUT CURRENT (A) IIN 2A/div VOUT 1V/div 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 SUPPLY VOLTAGE (V) SHORT-CIRCUIT ON OUTPUT MAX15108 toc15 1.0 VOUT = 0V ONLY IN A SHORT IOUT 10A/div 400µs/div 6 ______________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Typical Operating Characteristics (continued) (Circuit of Typical Application Circuit, TA = +25NC, unless otherwise noted.) FB VOLTAGE vs. TEMPERATURE (VOUT = 1.5V) MAX15108 toc16 MAX15108 SOFT-START (PWM MODE) MAX15108 toc17a 0.615 0.610 FB VOLTAGE (V) 0.605 0.600 0.595 0.590 0.585 -40 -15 10 35 VIN = 3.3V, PWM MODE VIN = 5V, PWM MODE VIN = 5V, SKIP MODE VIN = 3.3V, SKIP MODE NO LOAD VSS 500mV/div VOUT 1V/div ILX 2A/div VPGOOD 2V/div 60 65 400µs/div TEMPERATURE (°C) SOFT-START (SKIP MODE) MAX15108 toc17b ENABLE INTO PREBIASED 0.5V OUTPUT (8A LOAD, PWM MODE) MAX15108 toc18 VSS 500mV/div VOUT 1V/div ILX 2A/div VEN 2V/div VOUT 1V/div ILX 5A/div VPGOOD 2V/div VPGOOD 2V/div 400µs/div 400µs/div ENABLE INTO PREBIASED 0.5V OUTPUT (NO LOAD, PWM MODE) MAX15108 toc19a ENABLE INTO PREBIASED 0.5V OUTPUT (NO LOAD, SKIP MODE) MAX15108 toc19b VEN 2V/div VOUT 1V/div ILX 2A/div VEN 2V/div VOUT 1V/div ILX 2A/div VPGOOD 2V/div VPGOOD 2V/div 400µs/div 400µs/div _______________________________________________________________________________________ 7 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 Pin Configuration BUMP VIEW 5 4 MAX15108 3 2 1 PGND PGOOD LX LX PGND A FB I.C. IN LX PGND B SS SKIP IN LX PGND C COMP EN IN INX PGND D WLP Pin Description BUMP A1, A5, B1, C1, D1 A2, A3, B2, C2 A4 B3, C3, D3 B4 B5 C4 NAME PGND LX PGOOD IN I.C. FB SKIP FUNCTION Power Ground. Low-side switch source terminal. Connect PGND and the return terminals of input and output capacitors to the power ground plane. Inductor Connection. Connect LX to the switching side of the inductor. LX is high impedance when the device is in shutdown mode. Open-Drain Power-Good Output. PGOOD goes low when VFB is below 530mV. Input Power Supply. Input supply range is 2.7V to 5.5V. Bypass IN with a minimum 10FF ceramic capacitor to PGND. See the Typical Application Circuit. Internally Connected. Leave unconnected. Feedback Input. Connect FB to the center tap of an external resistive voltage-divider from the output to PGND to set the output voltage from 0.6V to 95% of VIN. Skip Mode Input. Connect SKIP to EN to select skip mode or leave unconnected for fixedfrequency PWM operation. Soft-Start. Connect a capacitor from SS to PGND to set the startup time. See the Soft-Start section for details on setting the soft-start time. SS is also an external reference input. Apply an external voltage reference from 0V to VIN - 1.5V to drive soft-start externally. Internally Unconnected. INX is not internally connected to IN. However, do externally connect INX to IN to increase the area of the power plane for optimal heat dissipation. Enable Input. EN is a digital input that turns the regulator on and off. Drive EN high to turn on the regulator. Connect to IN for always-on operation. Error Amplifier Output. Connect compensation network from COMP to signal ground (SGND). See the Compensation Design Guidelines section. C5 SS D2 D4 D5 INX EN COMP 8 ______________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Functional Diagram MAX15108 SKIP EN MAX15108 IN INX BIAS GENERATOR EN LOGIC, IN UVLO THERMAL SHDN SHDN SKIP-MODE LOGIC SKPM HIGH-SIDE CURRENT LIMIT VOLTAGE REFERENCE LX CURRENT-SENSE AMPLIFIER LX IN IN STRONG PREBIAS FORCED_START 0.58V SS SS BUFFER 0.6V 10µA IN SKPM CK CONTROL LOGIC LX PGND ERROR AMPLIFIER FB GROUND SENSE BUFFER RAMP OSCILLATOR RAMP GEN CK C LOW-SIDE SOURCE-SINK CURRENT LIMIT AND ZERO-CROSSING COMPARATOR SINK SOURCE ZX COMP POWER-GOOD COMPARATOR 0.555V RISING, 0.53V FALLING PGOOD SKPM _______________________________________________________________________________________ 9 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 Detailed Description The MAX15108 high-efficiency, current-mode switching regulator delivers up to 8A of output current. The regulator provides output voltages from 0.6V to (0.95 x VIN) with 2.7V to 5.5V input supplies, making the device ideal for on-board point-of-load applications. The IC delivers current-mode control architecture using a high gain transconductance error amplifier. The currentmode control architecture facilitates easy compensation design and ensures cycle-by-cycle current limit with fast response to line and load transients. The regulator features a 1MHz fixed switching frequency, allowing for all-ceramic capacitor designs with fast transient responses. The high operating frequency minimizes the size of external components. The IC is available in a 2.5mm x 2mm (4 x 5 array), 0.5mm pitch WLP package. The regulator offers a selectable skip-mode function to reduce current consumption and achieve a high efficiency at light output loads. The low RDS(ON) integrated switches ensure high efficiency at heavy loads while minimizing critical inductance, making the layout design a much simpler task than that of discrete solutions. The IC’s simple layout and footprint assure first-pass success in new designs. The IC features PWM current-mode control, allowing for an all-ceramic capacitor solution. The regulator offers capacitor-programmable soft-start to reduce input inrush current. The device safely starts up into a prebiased output. The IC includes an enable input and open-drain PGOOD output for sequencing with other devices. The controller logic block determines the duty cycle of the high-side MOSFET under different line, load, and temperature conditions. Under normal operation, where the current-limit and temperature protection are not triggered, the controller logic block takes the output from the PWM comparator to generate the driver signals for both high-side and low-side MOSFETs. The control logic block controls the break-before-make logic and all the necessary timing. The high-side MOSFET turns on at the beginning of the oscillator cycle and turns off when the COMP voltage crosses the internal current-mode ramp waveform. The internal ramp is the sum of the compensation ramp and the current-mode ramp derived from the inductor current (current sense block). The high-side MOSFET also turns off if the maximum duty cycle exceeds 95%, or when the current limit is reached. The low-side MOSFET turns on for the remainder of the switching cycle. The IC can soft-start into a prebiased output without discharging the output capacitor. In safe prebiased startup, both low-side and high-side MOSFETs remain off to avoid discharging the prebiased output. PWM operation starts when the voltage on SS crosses the voltage on FB. The IC can start into a prebiased voltage higher than the nominal set point without abruptly discharging the output. Forced PWM operation starts when the SS voltage reaches 0.58V, forcing the converter to start. When the low-side sink current-limit threshold of 1A is reached, the low-side switch turns off before the end of the clock period. The low-side sink current limit is 1A. The highside switch turns on until one of the following conditions is satisfied: • High-side source current hits the reduced high-side current limit (14A). The high-side switch turns off for the remaining time of clock period. • The clock period ends. Reduced high-side current limit is activated in order to recirculate the current into the high-side power switch rather than into the internal high-side body diode, which can cause damage to the device. The high-side current limit is set to 14A. Low-side sink current limit protects the low-side switch from excessive reverse current during prebiased operation. The IC features independent device enable control and power-good signal that allow for flexible power sequencing. Drive the enable input (EN) high to enable the regulator, or connect EN to IN for always-on operation. Power-good (PGOOD) is an open-drain output that deasserts when VFB is above 555mV, and asserts low if VFB is below 530mV. Starting into a Prebiased Output Controller Function—PWM Logic Enable Input 10 _____________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator The IC utilizes a soft-start feature to slowly ramp up the regulated output voltage to reduce input inrush current during startup. Connect a capacitor from SS to SGND to set the startup time. See the Setting the Soft-Start Startup Time section for capacitor selection details. A high-gain error amplifier provides accuracy for the voltage feedback loop regulation. Connect a compensation network between COMP and SGND. See the Compensation Design Guidelines section. The error amplifier transconductance is 1.4mS. COMP clamp low is set to 0.93V, just below the PWM ramp compensation valley, helping COMP to rapidly return to the correct set point during load and line transients. Programmable Soft-Start (SS) events. The control logic then discharges SS, stops both high-side and low-side MOSFETs and waits for a hiccup period (1024 clock cycles) before attempting a new softstart sequence. The hiccup-mode also operates during soft-start. The IC contains an internal thermal sensor that limits the total power dissipation to protect it in the event of an extended thermal fault condition. When the die temperature exceeds +160NC, the thermal sensor shuts down the device, turning off the DC-DC converter to allow the die to cool. After the die temperature falls by 25NC, the device restarts, following the soft-start sequence. The IC operates in skip mode when SKIP is connected to EN. When in skip mode, LX output becomes high impedance when the inductor current falls below 0.7A. The inductor current does not become negative. During a clock cycle, if the inductor current falls below the 0.7A threshold (during off-time), the low side turns off. At the next clock cycle, if the output voltage is above the set point the PWM logic keeps both high-side and low-side MOSFETs off. If instead the output voltage is below the set point, the PWM logic drives the high-side on for a minimum fixed on-time (330ns). In this way, the system skips cycles, reducing the frequency of operations, and switches only as needed to service load at the cost of an increase in output voltage ripple. See the Skip Mode Frequency and Output Ripple section for details. In skip mode, power dissipation is reduced and efficiency improved at light loads because the internal power MOSFETs do not switch at every clock cycle. Skip mode must be decided before or at the same time that the part is enabled. Changing of skip mode operation with the part operating is not allowed. MAX15108 Error Amplifier Thermal Shutdown Protection Skip Mode Operation The PWM comparator compares COMP voltage to the current-derived ramp waveform (LX current to COMP voltage transconductance value is 25A/V). To avoid instability due to subharmonic oscillations when the duty cycle is around 50% or higher, a compensation ramp is added to the current-derived ramp waveform. The compensation ramp slope (0.3V x 1MHz = 0.3V/Fs) is equivalent to half of the inductor current down-slope in the worst case (load 2A, current ripple 30% and maximum duty-cycle operation of 95%). The compensation ramp valley is set to 1V. When the converter output is connected to ground or the device is overloaded, each high-side MOSFET currentlimit event (14A) turns off the high-side MOSFET and turns on the low-side MOSFET. A 3-bit counter increments on each current-limit event. The counter is reset after three consecutive events of high-side MOSFET turn-on without reaching the current limit. If the currentlimit condition persists, the counter fills up reaching eight PWM Comparator Overcurrent Protection and Hiccup ______________________________________________________________________________________ 11 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 Applications Information Setting the Output Voltage Connect a voltage-divider (R1 and R2, see Figure 1) from OUT to FB to PGND to set the DC-DC converter output voltage. Choose R1 and R2 so that the DC errors due to the FB input bias current do not affect the outputvoltage precision. With lower value resistors, the DC error is reduced, but the amount of power consumed in the resistive divider increases. A typical tradeoff value for R2 is 5kI, but values between 1kI and 20kI are acceptable. Once R2 is chosen, calculate R1 using: V  R1 = R 2 ×  OUT - 1 VFB   where the feedback threshold voltage VFB = 0.6V. A large inductor value results in reduced inductor ripple current, leading to a reduced output ripple voltage. A high-value inductor is of a larger physical size with a higher series resistance (DCR) and a lower saturation current rating. Choose inductor values to produce a ripple current equal to 30% of the load current. Choose the inductor with the following formula: L= V  VOUT × 1- OUT  fSW × ∆IL  VIN  where fSW is the internally fixed 1MHz switching frequency, and DIL is the estimated inductor ripple current (typically set to 0.3 x ILOAD). In addition, the peak inductor current, IL_PK, must always be below the high-side current-limit value, IHSCL, and the inductor saturation current rating, IL_SAT. Ensure that the following relationship is satisfied: IL_PK = ILOAD + 1 × ∆IL < MIN(IHSCL ,IL_SAT ) 2 Inductor Selection For a step-down converter, the input capacitor CIN helps to keep the DC input voltage steady, in spite of discontinuous input AC current. Use low-ESR capacitors to minimize the voltage ripple due to ESR. Size CIN using the following formula: CIN = ILOAD V × OUT fSW × ∆VIN_RIPPLE VIN Input Capacitor Selection FEEDBACK DIVIDER VOUT ERROR AMPLIFIER POWER MODULATOR OUTPUT FILTER AND LOAD COMPENSATION RAMP VIN R1 FB COMP C gMC QHS CONTROL LOGIC PWM COMPARATOR QLS LO DCR IL VOUT R2 gMV ROUT RC *CCC ESR COUT RLOAD CC VCOMP ROUT = AVEA/gMV REF *CCC IS OPTIONAL. GMOD VOUT IL NOTE: THE GMOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF THE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS A SIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE. Figure 1. Peak Current-Mode Regulator Transfer Model 12 _____________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Make sure that the selected capacitance can accommodate the input ripple current given by: IRMS = I O × VOUT × (VIN - VOUT ) VIN ISS, the soft-start current, is 10FA, and VFB, the output feedback voltage threshold, is 0.6V. When using large COUT capacitance values, the high-side current limit can trigger during the soft-start period. To ensure the correct soft-start time, tSS, choose CSS large enough to satisfy: C SS >> C OUT × VOUT × I SS (IHSCL_MIN - IOUT ) × VFB MAX15108 If necessary, use multiple capacitors in parallel to meet the RMS current rating requirement. Use low-ESR ceramic capacitors to minimize the voltage ripple due to ESR. Use the following formula to estimate the total output voltage peak-to-peak ripple: ∆VOUT =  VOUT  VOUT   1 × 1  × R ESR_COUT + fSW × L  VIN   8 × fSW × C OUT  Output Capacitor Selection IHSCL_MIN is the minimum high-side switch current-limit value. An external tracking reference with steady-state value between 0V and VIN - 1.5V can be applied to SS. In this case, connect an RC network from external tracking reference and SS as in Figure 2. Set RSS to approximately 1kI. In this application, RSS is needed to ensure that, during hiccup period, SS can be internally pulled down. When an external reference is connected to SS, the softstart must be provided externally. In skip mode, the switching frequency (fSKIP) and output ripple voltage (VOUT-RIPPLE) shown in Figure 3 are calculated as follows: tON is a fixed time by design (330ns, typ); the peak inductor current reached is: V − VOUT I SKIP −LIMIT = IN × t ON 2×L Select the output capacitors to produce an output ripple voltage that is less than 2% of the set output voltage. The soft-start feature ramps up the output voltage slowly, reducing input inrush current during startup. Size the CSS capacitor to achieve the desired soft-start time, tSS, using: I x t SS C SS = SS VFB Setting the Soft-Start Startup Time Skip Mode Frequency and Output Ripple RSS VREF_EXT CSS SS tOFF1 is the time needed for the inductor current to reach the zero-crossing (~0A): MAX15108 t OFF1 = Figure 2. Setting Soft-Start Time IL ISKIP-LIMIT L × I SKIP-LIMIT VOUT ILOAD tON VOUT VOUT-RIPPLE tOFF1 tOFF2 = n x tCK Figure 3. Skip-Mode Waveforms ______________________________________________________________________________________ 13 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 During tON and tOFF1, the output capacitor stores a charge equal to: 1 1 2 L × (I SKIP-LIMIT - ILOAD ) ×  +   VIN - VOUT VOUT  ∆Q OUT = 2 During tOFF2 (= n x tCK, number of clock cycles skipped), the output capacitor loses this charge: t OFF2 = ∆Q OUT → ILOAD closed-loop system. The basic regulator loop consists of a power modulator (comprising the regulator’s pulsewidth modulator, compensation ramp, control circuitry, MOSFETs, and inductor), the capacitive output filter and load, an output feedback divider, and a voltageloop error amplifier with its associated compensation circuitry. See Figure 1. The average current through the inductor is expressed as: IL = G MOD × VCOMP where IL is the average inductor current and GMOD is the power modulator’s transconductance. For a buck converter: VOUT = R LOAD × IL where RLOAD is the equivalent load resistor value. Combining the above two relationships, the power modulator’s transfer function in terms of VOUT with respect to VCOMP is: 1 1 2 L × (I SKIP-LIMIT - ILOAD ) ×  +   VIN - VOUT VOUT  t OFF2 = 2 × ILOAD Finally, frequency in skip mode is: fSKIP = 1 t ON + t OFF1 + t OFF2 Output ripple in skip mode is: VOUT-RIPPLE = VCOUT-RIPPLE + VESR-RIPPLE = (ISKIP-LIMIT - ILOAD ) × t ON + R ESR,COUT × (I SKIP-LIMIT - ILOAD ) C OUT R ×I = LOAD L = RLOAD × G MOD VCOMP IL G MOD VOUT Having defined the power modulator’s transfer function gain, the total system loop gain can be written as follows (see Figure 1): α= s(C C + C CC )(R C + R OUT ) + 1 ×   s(C C || C CC )(R C || R OUT ) + 1   R OUT × (sC CR C + 1) VOUT-RIPPLE =  L × ISKIP-LIMIT  + R ESR,COUT  × (ISKIP-LIMIT - ILOAD )  C OUT × (VIN - VOUT )    Size COUT based on the above formula to limit output ripple in skip mode. The IC uses a fixed-frequency, peak-current-mode control scheme to provide easy compensation and fast transient response. The inductor peak current is monitored on a cycle-by-cycle basis and compared to the COMP voltage (output of the voltage error amplifier). The regulator’s duty cycle is modulated based on the inductor’s peak current value. This cycle-by-cycle control of the inductor current emulates a controlled current source. As a result, the inductor’s pole frequency is shifted beyond the gain bandwidth of the regulator. System stability is provided with the addition of a simple series capacitor-resistor from COMP to PGND. This pole-zero combination serves to tailor the desired response of the Compensation Design Guidelines β = G MOD × R LOAD × sC OUT (ESR + R LOAD ) + 1   (sC OUTESR + 1) Gain = R2 A × VEA × α × β R1 + R 2 R OUT where ROUT is the quotient of the error amplifier’s DC gain, AVEA, divided by the error amplifier’s transconductance, gMV; ROUT is much larger than RC. R2 V = FB R1 + R 2 VOUT 14 _____________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Also, CC is much larger than CCC, therefore: C C + C CC ≈ C C and C C || C CC ≈ C CC Rewriting: Gain = MAX15108 fP2 = 1 2π × C OUT (ESR + R LOAD ) fP3 = fZ1 = fZ2 = 1 2π × C CCR C 1 2π × C CR C (sC CR C + 1) VFB A VEA × × VOUT  A  sC C  VEA  + 1 × (sC CCR C + 1)    gMV     (sC OUTESR + 1) sC OUT (ESR + R LOAD ) + 1   1 2π × C OUTESR The order of pole-zero occurrence is: fP1 < fP2 < fZ1 < fZ2 ≤ fP3 Under heavy load, fP2, approaches fZ1. A graphical representation of the asymptotic system closed-loop response, including dominant pole and zero locations is shown in Figure 3. G MOD R LOAD × The dominant poles and zeros of the transfer loop gain are shown below: fP1 = gMV AVEA_dB/20 × C 2π × 10 C GAIN 1ST ASYMPTOTE VFB x VOUT -1 x 10AVEA[dB]/20 x GMOD x RLOAD 2ND ASYMPTOTE VFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD 3RD ASYMPTOTE VFB x VOUT -1 x gMV x (CC)-1 x GMOD x RLOAD x (COUT(ESR + RLOAD))-1 4TH ASYMPTOTE VFB x VOUT -1 x gMV x RC x GMOD x RLOAD x (COUT(ESR + RLOAD))-1 3RD POLE (CCCRC)-1 2ND ZERO (COUTESR)-1 UNITY 1ST POLE gMV x (10AVEA[dB]/20 CC)-1 1ST ZERO (CCRC)-1 2ND POLE (COUT(ESR + RLOAD))-1 CO RAD/S 5TH ASYMPTOTE VFB x VOUT -1 x gMV x RC x GMOD x (ESR || RLOAD) 6TH ASYMPTOTE VFB x VOUT -1 x gMV x (CCC)-1 x GMOD x (ESR || RLOAD) Figure 4. Asymptotic Loop Response of Peak Current-Mode Regulator ______________________________________________________________________________________ 15 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator If COUT is large, or exhibits a lossy equivalent series resistance (large ESR), the circuit’s second zero might come into play around the crossover frequency (fCO = ω/2G). In this case, a third pole can be induced by a second (optional) small compensation capacitor (CCC), connected from COMP to PGND. The loop response’s fourth asymptote (in bold, Figure 4) is the one of interest in establishing the desired crossover frequency (and determining the compensation component values). A lower crossover frequency provides for stable closed-loop operation at the expense of a slower load and line transient response. Increasing the crossover frequency improves the transient response at the (potential) cost of system instability. A standard rule of thumb sets the crossover frequency P 1/10th of the switching frequency. First, select the passive and active power components that meet the application’s requirements. Then, choose the small-signal compensation components to achieve the desired closed-loop frequency response and phase margin as outlined in the Closing the Loop: Designing the Compensation Circuitry section. MAX15108 Determine CC by selecting the desired first system zero, fZ1, based on the desired phase margin. Typically, setting fZ1 below 1/5th of fCO provides sufficient phase margin. f 1 fZ1 = ≤ CO 2π × C CR C 5 Therefore: CC ≥ 5 2π × fCO × R C If the ESR output zero is located at less than one-half the switching frequency, use the (optional) secondary compensation capacitor, CCC, to cancel it, as follows: 1 1 = fP3 = fZ2 = 2π × C CCR C 2π × C OUTESR therefore: C CC = C OUT × ESR RC Select the desired crossover frequency. Choose fCO approximately 1/10th of the switching frequency fSW, or fCO ≈ 100kHz. Select RC using the transfer-loop’s fourth asymptote gain (assuming fCO > fP1, fP2, and fZ1 and setting the overall loop gain to unity) as follows: V 1 = FB × gMV × R C × G MOD × R LOAD × VOUT 1 2π × fCO × C OUT × (ESR + R LOAD ) Therefore: 2π × fCO × C OUT × (ESR + R LOAD ) V R C = OUT × VFB gMV × G MOD × R LOAD For RLOAD much greater than ESR, the equation can be further simplified as follows: V 2π × fCO × C OUT R C = OUT × VFB gMV × G MOD where VFB is equal to 0.6V. Closing the Loop: Designing the Compensation Circuitry If the ESR zero exceeds 1/2 the switching frequency, use the following equation: fP3 = Therefore: C CC = 2 2π × fSW × R C f 1 = SW 2π × C CCR C 2 Overall CCC detracts from the overall system phase margin. Place this third pole well beyond the desired crossover frequency to minimize the interaction with the system loop response at crossover. Ignore CCC in these calculations if CCC is smaller than 10pF. The IC is available in a 20-bump WLP package and can dissipate up to 745.5mW at TA = +70NC. When the die temperature exceeds +160NC, the thermal-shutdown protection is activated. See the Thermal Shutdown Protection section. Power Dissipation 16 _____________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Careful PCB layout is critical to achieve clean and stable operation. It is highly recommended to duplicate the MAX15108 evaluation kit layout for optimum performance. If deviation is necessary, follow these guidelines for good PCB layout: 1) Connect input and output capacitors to the power ground plane. 2) Place bypass capacitors as close to IN and the softstart capacitor as close to SS as possible. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current short and minimize the loop area formed by LX, the output capacitors, and the input capacitors. Layout Procedure 4) Connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency. 5) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close as possible to the IC. 6) Route high-speed switching nodes (such as LX) away from sensitive analog areas (such as FB, COMP, SGND, and SS). See the MAX15108 EV Kit layout for a tested layout example. MAX15108 Typical Application Circuit SKIP 2.7V TO 5.5V CIN2 22µF CIN2 22µF SKIP EN LX OUTPUT LOUT 33µH COUT1 47µF COUT2 47µF COUT1 0.1µF PGND IN RPULL 100kI INX PGOOD MAX15018 FB R1 8.06kI COMP SS CEA2 100pF REA 2.43kI CEA 4700pF R2 5.36kI REXT_REF 1kI CSS 33nF ______________________________________________________________________________________ 17 High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator MAX15108 Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns (footprint), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. 21-0505 LAND PATTERN NO. 20 WLP W202D2Z+1 Refer to Application Note 1891 18 _____________________________________________________________________________________ High-Efficiency, 8A, Current-Mode Synchronous Step-Down Switching Regulator Revision History REVISION NUMBER 0 REVISION DATE 6/11 Initial release DESCRIPTION PAGES CHANGED — MAX15108 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 19 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.