5675RPQE

5675 14-BIT, 400MSPS DIGITAL-TO-ANOALOG CONVERTER Functional Block Diagram FEATURES: • • • • • • 400-MSPS Update Rate LVDS-Compatable Input Interface Differential Scalable Current Outputs: 2mA to 20mA On-Chip 1.2-V Reference Single 3.3-V Supply Operation Power Dissipation: 820 mW at fCLK = 400MHz, fO = 70MHz DESCRIPTION: Maxwell Technologies 5675 is a 14-bit resolution highspeed digital to analog converter. The 5675 is designed for high-speed digital data transmission in wired and wireless communication systems. The 5675 has excelent spurios free dynamic range (SFDR) at high intermediate frequencies. The 5675 operates from a single-supply voltage of 3.3V. Power dissipation is 820 mW at fclk = 400 MSPS, fout = 70MHz. The 5675 provides a nominal full-scale differential current output of 20mA, supporting both singleended and differential applications. Theoutput can be directly fed to the load with no additional external output buffered required. Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK® provides greater than 100 krad(Si) radiation dose tolerance. This product is available with screening up to Class S. All data sheets are subject to change without notice 07.13.04 Rev 1X 1 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 TABLE 1. PINOUT DESCRIPTION PIN 19, 41, 46, 47 20, 42, 45, 48 39 22 21 1, 3, 5, 7, 9, 13, 23 25, 27, 29, 31, 33, 35 2, 4, 6, 8, 10, 14, 24 26, 28, 30, 32, 34, 36 16, 18 38 15, 17 40 43 44 37 SYMBOL AGND AVDD BIASJ CLK CLKC D9(13:0)A DESCRIPTION Analog Negative Supply Voltage (Ground) Analog Positive Supply Voltage Full-scale Output Current Bias External Clock Input Complementory External Clock Input LVDS Positive Input, data bits 13 through 0 D13A is most significant data bit (MSB) D0A is the least significant bit (LSB) LVDS Positive Input, data bits 13 through 0 D13B is most significant data bit (MSB) D0B is the least significant bit (LSB) Digital Negative Supply Voltage (Ground) D(13:0)B DGND DLLOFF DVDD EXTIO IOUT1 IOUT2 SLEEP Memory High = DLL Off / Low = DLL On Digital Positive Supply Voltage Internal reference out put or external reference input. Requires a 0.1uf decoupling capacitor to groind when used as reference output. DAC current output. Full scale when all inputs are set to 1. Connect reference side DAC load resistors to AVDD DAC complimentory current output. Full scale when all inputs are set to 0. Connect reference side DAC load resistors to AVDD Asynchronous hardware power down input. Active high. Internally pulldown. TABLE 2. 5675 ABSOLUTE MAXIMUM RATINGS 1 PARAMETER Supply Voltage Range SYMBOL AVDD DVDD AVDD to DVDD Voltage between AGND and DGND CLK, CLKC, SLEEP Digital input D[13:0]A, D[13:0]B IOUT1, IOUT2 EXTIO, BIASJ Peak Input Current (any input) Peak Total Input Current (any input) Storage temperature range 07.13.04 Rev 1 MIN -0.3 -0.3 -3.6 -0.3 -0.3 to DVDD -0.3 to DVDD -1.0 to DVDD -0.3 to DVDD MAX 3.6 3.6 3.6 0.5 DVDD to 0.3 DVDD to 0.3 AVDD to 0.3 AVDD to 0.3 20 -30 UNIT V V V V V V V V mA mA °C ------ -65 150 All data sheets are subject to change without notice 2 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 2. 5675 ABSOLUTE MAXIMUM RATINGS 1 PARAMETER Operating Temperature range SYMBOL MIN -55 MAX 125 5675 UNIT °C 1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. TABLE 3. DELTA LIMITS PARAMETER IAVDD IDVDD VARIATION ±10% of specified value in Table 5 ±10% of specified value in Table 5 TABLE 4. 5675 RECOMMENDED OPERATING CONDITIONS 1 PARAMETER Output Update Rate Analog Supply Voltage, AVDD Digital Supply Voltage, DVDD Input Reference Voltage, EXTIO Full-scale output currentm IO(FS) Output compliance range Clock Pulse Width High, tWH Clock Pulse Width Low, tLH Clock Duty Cycle 40 AVDD=3.15 to 3.45V, IO(FS)=20mA Clock Differential Input Votage, CLK-CLKC DLL disable, DLLOFF=1 DLL enable, DLLOFF=0 100 3.15 3.15 0.6 2 AVDD-1 0.4 1.25 1.25 60 3.3 3.3 1.2 MIN TYP MAX 100 400 3.6 3.6 1.25 20 AVDD+0.3 0.8 V V V mA V V nS nS % UNIT MSPS Memory 1. All unused control inputs of the device must be held at high or low ensure proper device operation. TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER Resolution DC Accuracy1 Integral Nonlinearity DIFFERENTIAL NONLINEARITY MONOTICITY 07.13.04 Rev 1 TEST CONDITIONS SYMBLE SUBGROUPS MIN 14 TYP MAX UNIT Bits TMIN TO TMAX TMIN TO TMAX INL DNL -4 -2 +2 +1.5 4 2 LSB LSB Monotonic 12-bit Level All data sheets are subject to change without notice 3 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER ANALOG OUTPUT OFFSET ERROR GAIN ERROR OUTPUT RESISTANCE OUTPUT CAPACITANCE REFERENCE OUTPUT REFERENCE VOLTAGE REFERENCE OUTPUT CURRENT2 REFERENCE INPUT INPUT RESISTANCE SMALL SIGNAL BANDWIDTH INPUT CAPACITANCE TEMPERATURE COEFFICIENTS OFFSET DRIFT GAIN DRIFT REFERENCE VOLTAGE DRIFT POWER SUPPLY ANALOG SUPPLY CURRENT3 DIGITAL SUPPLY CURREN3T ANALOG SUPPLY CURRENT4 POWER DISSIPATION ANALOG AND DIGITAL POWER SUPPLY REJECTION RATIO 5675 MIN TYP MAX UNIT TEST CONDITIONS SYMBLE SUBGROUPS 0.02 Without Internal Reference With Internal Reference -10 -10 300 5 EXTIO 1.17 1.23 100 1 1.4 100 0 Without Internal Reference VEXTIO +50 +50 1.29 10 10 %FSR %FSR %FSR K pf V nA M MHz pf Memory ppm of FSR/° C ppm of FSR/° C ppm of FSR/° C IAVDD IDVDD Sleep Mode AVdd = 3.3V, DVdd = 3.3V AVdd = 3.15 to 3.45V IAVDD PD APSRR DPSRR See LVDS min/max threshold voltage table VITH+ VITHZT CI 90 -0.5 -0.5 175 100 45 0.5 0.5 100 -100 132 2 mA mA mA %FSm WR/V LVDS INTERFACE: NODE D[13:0]A; D[13:0]B POSITIVE-GOING DIFFERENTIAL INPUT VOLTAGE THRESHOLD mV NEGATIVE-GOING DIFFERENTIAL INPUT VOLTAGE THRESHOLD INTERNAL TERMINATION IMPEDANCE INPUT CAPACITANCE CMOS INTERFACE: NODE SLEEP Ohms pF 07.13.04 Rev 1 All data sheets are subject to change without notice 4 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER HIGH-LEVEL INPUT VOLTAGE LOW-LEVEL INPUT VOLTAGE HIGH-LEVEL INPUT CURRENT LOW-LEVEL INPUT CURRENT INPUT CAPACITANCE CLOCK INTERFACE: NODE CLK, CLCKC INPUT RESISTANCE INPUT CAPACITANCE INPUT RESISTANCE INPUT CAPACITANCE TIMING INPUT SETUP TIME INPUT HOLD TIME INPUT LATCH PULSE HIGH TIME tSU th TLPH 5675 MIN 2 -10 -10 2 TYP 3.3 0 0.8 10 10 MAX UNIT V V uA uA pF Ohms pF Kohms pF nS nS nS clk TEST CONDITIONS SYMBLE VIH VIL IIH IIL SUBGROUPS node CLK, CLKC node CLK, CLKC Differential Differential 670 2 1.3 1 1.5 0.25 2 1 Memory TDD DIGITAL DELAY TIME 1. Measured Differential at IOUT1 and IOUT2. 2.5Ohms to AVDD 2. Use an external buffer amplifier with high impedance input drive to drive any external load. 3. Measured at fCLK = 400 MSPS and FOUT = 70 MHz 4. Measured for 50 Ohms Rl at IOUT1 and IOUT2, fCLK = 400 MSPS and fOUT = 70MHz 07.13.04 Rev 1 All data sheets are subject to change without notice 5 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 6. 5675 AC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER ANALOG OUTPUT OUTPUT SETTLING TIME OUTPUT PROPAGATION DELAY OUTPUT RISE TIME 10% TO 90% OUTPUT FALL TIME 90% TO 10% OUTPUT NOISE IOUTFS = 20MA IOUTFS = 2MA AC LINEARITY TOTAL HARMONIC DISTORTION tCLK = 100 MSPS, fOUT=20MHz, TA = 25C tCLK = 160 MSPS, fOUT=41MHz, TA = 25C tCLK = 200 MSPS, fOUT=70MHz, TA = 25C tCLK = 400 MSPS, fOUT=20 MHz, TMIN to TMAX tCLK = 400 MSPS, fOUT=70MHz, TA = 25C tCLK = 400 MSPS, fOUT=140MHz, TA = 25C SPURIOUS FREE DYNAMIC RANGE TO NYQUIST tCLK = 100 MSPS, fOUT=20MHz, TA = 25C tCLK = 160 MSPS, fOUT=41MHz, TA = 25C tCLK = 200 MSPS, fOUT=701MHz, TA = 25C tCLK = 400 MSPS, fOUT=20 MHz, TMIN to TMAX tCLK = 400 MSPS, fOUT=70MHz, TA = 25C tCLK = 400 MSPS, fOUT=140MHz, TA = 25C 07.13.04 Rev 1 5675 TEST CONDITIONS SYMBOL SUBGROUPS MIN VCC = 3.3V ± 0.3 TYP MAX UNIT MID-SCALE TRANSITION (CODE 8191-8192) TS (DAC) TPD TR(IOUT) 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 5 1 2 2 55 30 nS nS nS nS pA/ 2^Hz pA/ 2^Hz Memory THD 72 67 63 72 dBc 64 58 SFDR 77 70 70 73 dBc 69 58 All data sheets are subject to change without notice 6 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 6. 5675 AC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER SPURIOUS FREE DYNAMIC RANGE WITHIN A WINDOW, 5-MHZ SPAN TEST CONDITIONS tCLK = 100 MSPS, fOUT=20MHz, TA = 25C tCLK = 160 MSPS, fOUT=41MHz, TA = 25C tCLK = 200 MSPS, fOUT=701MHz, TA = 25C tCLK = 400 MSPS, fOUT=20 MHz, TMIN to TMAX tCLK = 400 MSPS, fOUT=70MHz, TA = 25C tCLK = 400 MSPS, fOUT=140MHz, TA = 25C ADJACENT CHANNEL POWER RATIO WCDMA WITH 3.84 MHZ BW, 5MHZ CHANNEL SPACING fCLK=122.8 MSPS, IF=30.72 MHz, TA=25C fCLK=245.76 MSPS, IF=61.44 MHz, TA=25C fCLK=399.32 MSPS, IF=153.36 MHz, TA=25C TWO-TONE INTERMODULATION TO NYQUIST (EACH TONE AT -6 DBFS) fCLK=400MHx, fOUT1=70MHz, fOUT2=141MHz, Ta=25C fCLK=400MHx, fOUT1=140MHz, fOUT2=141MHz, Ta=25C FOUR-TONE INTERMODULATION, 15MHZ fCLK=400MHx, fOUT1=70MHz, SPAN, MISSING CENTER TONE fOUT2=141MHz, Ta=25C (EACH TONE AT -6 DBFS) fCLK=400MHx, fOUT1=140MHz, fOUT2=141MHz, Ta=25C IMD ACPR SYMBOL SFDR SUBGROUPS MIN VCC = 3.3V ± 0.3 TYP 88 83 80 88 MAX 5675 UNIT dBc 80 73 73 71 68 67 dBc dB Memory 63 72 74 07.13.04 Rev 1 All data sheets are subject to change without notice 7 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 7. LVDS INPUT THRESHOLDS AND LOGICAL BIT EQUIVALENT APPIED VOLTAGE VA [V] 1.25 1.15 2.4 2.3 0.1 0 1.5 0.9 2.4 1.8 0.6 0 VB [V] 1.15 1.25 2.3 2.4 0 0.1 0.9 1.5 1.8 2.4 0 0.6 RESULTING RESULTING DIFFERENTIAL COMMON-MODE INPUT VOLTAGE INPUT VOLTAGE VA,B [MV] 200 -200 200 -200 200 -200 600 -600 600 -600 600 -600 VCOM [V] 1.2 1.2 1.35 2.35 0.05 0.05 1.2 1.2 2.1 2.1 0.3 0.3 1 0 1 0 1 0 1 0 1 0 1 0 LOGICAL BIT BINARY EQUIVALENT COMMENT 5675 Operation with minimum differential voltage(+/-200mV) applied to the complimentory inputs versus common mode range Operation with minimum differential voltage(+/-600mV) applied to the complimentory inputs versus common mode range Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 8 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 9 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 10 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 11 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 12 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory Applications Schematic 07.13.04 Rev 1 All data sheets are subject to change without notice 13 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 48 PIN RAD-PAK® QUAD FLAT PACKAGE DIMENSION SYMBOL CENTER LINE A b c D D1 e L L1 L2 A1 z N ---PKG/leads PKG/leads -Frame Frame Frame ---1.585 .945 --MIN .121 .008 .006 .645 .270 -NOM .135 .010 .008 .650 .275 .025 1.645 1.605 .956 .108 .0125 48 1.625 .965 --MAX .149 .012 .010 .655 .280 -- Note: All dimensions in inches 07.13.04 Rev 1 All data sheets are subject to change without notice 14 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter Important Notice: 5675 These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts. Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 15 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter Product Ordering Options Model Number 5675 RP Q X Feature Option Details 5675 Screening Flow Monolithic S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55°C, +25°C, +125°C) E = Engineering (testing @ +25°C) Memory Package Q = Quad Flat Pack Radiation Feature RP = RAD-PAK® package Base Product Nomenclature Digital-Analog Converter 14-Bit, 400 MSPS 07.13.04 Rev 1 All data sheets are subject to change without notice 16 ©2004 Maxwell Technologies All rights reserved.