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LMC7101BIM5

LMC7101BIM5

  • 厂商:

    MICREL

  • 封装:

  • 描述:

    LMC7101BIM5 - Low-Power Operational Amplifier - Micrel Semiconductor

  • 数据手册
  • 价格&库存
LMC7101BIM5 数据手册
LMC7101 Micrel LMC7101 Low-Power Operational Amplifier General Description The LMC7101 is a high-performance, low-power, operational amplifier which is pin-for-pin compatible with the National Semiconductor LMC7101. It features rail-to-rail input and output performance in Micrel’s IttyBitty™ SOT-23-5 package. The LMC7101 is a 500kHz gain bandwidth amplifier designed to operate from 2.7V to 12V single-ended power supplies with guaranteed performance at supply voltages of 2.7V, 3V, 5V, and 12V. This op amp’s input common-mode range includes ground and extends 300mV beyond the supply rails. For example, the common-mode range is –0.3V to +5.3V with a 5V supply. Features • • • • • Small footprint SOT-23-5 package Guaranteed 2.7V, 3V, 5V, and 12V performance 500kHz gain-bandwidth 0.01% total harmonic distortion at 10kHz (5V, 2kΩ) 0.5mA typical supply current at 5V Applications • • • • Mobile communications, cellular phones, pagers Battery-powered instrumentation PCMCIA, USB Portable computers and PDAs Ordering Information Part Number LMC7101AIM5 LMC7101BIM5 Marking A12A A12 Grade Prime Standard Temperature Range –40°C to +85°C –40°C to +85°C Package SOT-23-5 SOT-23-5 Pin Configuration IN+ 3 Functional Configuration IN+ V+ OUT 2 1 1 V+ OUT 2 Part Identification 3 A12A 4 5 4 5 IN– V– IN– V– SOT-23-5 (M5) Pin Description Pin Number 1 2 3 4 5 Pin Name OUT V+ IN+ IN– V– Pin Function Amplifier Output Positive Supply Noninverting Input Inverting Input Negative Supply: Negative supply for split supply application or ground for single supply application. Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com September 1999 1 LMC7101 LMC7101 Micrel Absolute Maximum Ratings (Note 1) Supply Voltage (VV+ – VV–) ........................................... 15V Differential Input Voltage (VIN+ – VIN–) ........... ±(VV+ – VV–) I/O Pin Voltage (VIN, VOUT), Note 2 ............................................. VV+ + 0.3V to VV– – 0.3V Junction Temperature (TJ) ...................................... +150°C Storage Temperature ............................... –65°C to +150°C Lead Temperature (soldering, 10 sec.) ..................... 260°C ESD, Note 5 .................................................................. 2kV Operating Ratings (Note 1) Supply Voltage (VV+ – VV–) .............................. 2.7V to 12V Ambient Temperature (TA) ......................... –40°C to +85°C Junction Temperature (TJ) ....................... –40°C to +125°C Max. Junction Temperature (TJ(max)), Note 3 ......... +125°C Package Thermal Resistance (θJA), Note 4 .......... 325°C/W Max. Power Dissipation ............................................ Note 3 Electrical Characteristics (2.7V) V+ = +2.7V, V– = 0V, VCM = VOUT = V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted LMC7101A Symbol VOS TCVOS IB IOS RIN CMRR VCM PSRR CIN VO Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Resistance Common-Mode Rejection Ratio Input Common-Mode Voltage 0V ≤ VCM ≤ 2.7V, Note 6 input low, CMRR ≥ 50dB input high, CMRR ≥ 50dB Power Supply Rejection Ratio Common-Mode Input Capacitance Output Swing output high, RL = 10k output low, RL = 10k output high, RL = 2k output low, RL = 2k IS SR GBW Supply Current Slew Rate Gain-Bandwidth Product VOUT = V+/2 V+ = 1.35V to 1.65V, V– = –1.35V to –1.65V, VCM = 0 Condition Typ 0.11 1.0 1.0 0.5 >1 70 –0.3 3.0 60 3 2.699 0.001 2.692 0.008 0.5 0.4 0.5 2.6 0.1 0.81 0.95 2.64 0.06 2.6 0.1 0.81 0.95 2.64 0.06 2.7 50 50 0.0 2.7 45 50 0.0 64 32 64 32 Min Max 6 LMC7101B Min Max 9 Units mV µV/°C pA pA TΩ dB V V dB pF V V V V mA mA V/µs MHz Electrical Characteristics (3.0V) V+ = +3.0V, V– = 0V, VCM = VOUT = V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted LMC7101A Symbol VOS TCVOS IB IOS RIN Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Resistance Condition Typ 0.11 1.0 1.0 0.5 >1 64 32 64 32 Min Max 4 6 LMC7101B Min Max 7 9 Units mV mV µV/°C pA pA TΩ LMC7101 2 September 1999 LMC7101 LMC7101A Symbol CMRR VCM PSRR CIN VOUT Parameter Common-Mode Rejection Ratio Input Common-Mode Voltage Condition 0V ≤ VCM ≤ 3.0V, Note 6 input low, CMRR ≥ 50dB input high, CMRR ≥ 50dB Power Supply Rejection Ratio Common-Mode Input Capacitance Output Swing output high, RL = 2k output low, RL = 2k output high, RL = 600Ω output low, RL = 600Ω IS Supply Current V+ = 1.5V to 6.0V, V– = –1.5V to –6.0V, VCM = 0 Typ 74 –0.3 3.3 80 3 2.992 0.008 2.973 0.027 0.5 2.85 0.15 0.81 0.95 2.9 0.1 2.85 0.15 0.81 0.95 2.9 0.1 3.0 68 Min 60 0 3.0 60 Max LMC7101B Min 60 0 Max Micrel Units dB V V dB pF V V V V mA mA Electrical Characteristics—DC (5V) V+ = +5.0V, V– = 0V, VCM = 1.5V, VOUT = V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted LMC7101A Symbol VOS TCVOS IB IOS RIN CMRR VCM Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Resistance Common-Mode Rejection Ratio Input Common-Mode Voltage 0V ≤ VCM ≤ 5V, Note 6 input low, CMRR ≥ 50dB input high, CMRR ≥ 50dB +PSRR –PSRR CIN VOUT Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Common-Mode Input Capacitance Output Swing output high, RL = 2k output low, RL = 2k output high, RL = 600Ω output low, RL = 600Ω ISC IS Output Short Circuit Current Note 7 Supply Current sourcing (VOUT = 0V) or sinking (VOUT = 5V) VOUT = V+/2 V+ = 5V to 12V, V– = 0V, VOUT = 1.5V V+ = 0V, V– = –5V to –12V, VOUT = –1.5V Condition Typ 0.11 1.0 1.0 0.5 >1 82 –0.3 5.3 82 82 3 4.989 0.011 4.963 0.037 200 0.5 120 80 0.85 1.0 4.9 4.8 0.1 0.2 120 80 0.85 1.0 4.9 4.85 0.1 0.15 4.9 4.8 0.1 0.2 4.9 4.85 0.1 0.15 5.20 5.00 70 65 70 65 60 55 –0.20 0.00 5.20 5.00 65 62 65 62 60 55 –0.20 0.00 64 32 64 32 Min Max 3 5 LMC7101B Min Max 7 9 Units mV mV µV/°C pA pA TΩ dB dB V V V V dB dB dB dB pF V V V V V V V V mA mA mA mA September 1999 3 LMC7101 LMC7101 Micrel Electrical Characteristics—DC (12V) V+ = +12V, V– = 0V, VCM = 1.5V, VOUT = V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted LMC7101A Symbol VOS TCVOS IB IOS RIN CMRR VCM Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Input Resistance Common-Mode Rejection Ratio Input Common-Mode Voltage 0V ≤ VCM ≤ 12V, Note 6 input low, V+ = 12V, CMRR ≥ 50dB input high, V+ = 12V, CMRR ≥ 50dB +PSRR –PSRR AV Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Large Signal Voltage Gain V+ = 5V to 12V, V– = 0V, VOUT = 1.5V V+ = 0V, V– = –5V to –12V, VOUT = –1.5V sourcing or sinking, RL = 2k, Note 9 sourcing or sinking, RL = 600Ω, Note 9 CIN VOUT Common-Mode Input Capacitance Output Swing output high, V+ = 12V, RL = 2k output low, V+ = 12V, RL = 2k, output high, V+ = 12V, RL = 600Ω output low, V+ = 12V, RL = 600Ω ISC Output Short Circuit Current sourcing (VOUT = 0V) or sinking (VOUT = 12V), Notes 7, 8 VOUT = V+/2 Condition Typ 0.11 1.0 1.0 0.5 >1 82 –0.3 12.3 82 82 340 300 3 11.98 0.02 11.93 0.07 300 200 120 1.5 1.71 11.73 11.65 0.27 0.35 200 120 1.5 1.71 11.9 11.87 0.10 0.13 11.73 11.65 0.27 0.35 11.9 11.87 0.10 0.13 12.2 12.0 70 65 70 65 80 40 15 10 65 60 –0.20 0.00 12.2 12.0 65 62 65 62 80 40 15 10 65 60 –0.20 0.00 64 32 64 32 Min Max 6 LMC7101B Min Max 9 Units mV µV/°C pA pA TΩ dB dB V V V V dB dB dB dB V/mV V/mV V/mV V/mV pF V V V V V V V V mA mA mA mA IS Supply Current 0.8 LMC7101 4 September 1999 LMC7101 Micrel Electrical Characteristics—AC (5V) V+ = 5V, V– = 0V, VCM = 1.5V, VOUT = V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted LMC7101A Symbol THD SR GBW Parameter Total Harmonic Distortion Slew Rate Gain-Bandwidth Product Condition f = 10kHz, AV = –2, RL = 2kΩ, VOUT = 4.0 VPP Typ 0.01 0.3 0.5 Min Max LMC7101B Min Max Units % V/µs MHz Electrical Characteristics—AC (12V) V+ = 12V, V– = 0V, VCM = 1.5V, VOUT = V+/2; RL = 1MΩ; TJ = 25°C, bold values indicate –40°C ≤ TJ ≤ +85°C; unless noted LMC7101A Symbol THD SR GBW φm Gm en in Parameter Total Harmonic Distortion Slew Rate Gain-Bandwidth Product Phase Margin Gain Margin Input-Referred Voltage Noise Input-Referred Current Noise f = 1kHz, VCM = 1V f = 1kHz Condition f = 10kHz, AV = –2, RL = 2k, VOUT = 8.5 VPP V+ = 12V, Note 10 Typ 0.01 0.3 0.5 45 10 37 1.5 0.19 0.15 0.19 0.15 Min Max LMC7101B Min Max Units % V/µs V/µs MHz ° dB nV/ Hz fA/ Hz General Notes: Devices are ESD protected; however, handling precautions are recommended. All limits guaranteed by testing on statistical analysis. Note 1. Note 2. Note 3. Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside its recommended operating ratings. I/O Pin Voltage is any external voltage to which an input or output is referenced. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(max); the junction-to-ambient thermal resistance, θJA; and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD = (TJ(max) – TA) ÷ θJA. Exceeding the maximum allowable power dissipation will result in excessive die temperature. Thermal resistance, θJA, applies to a part soldered on a printed-circuit board. Human body model, 1.5k in series with 100pF. Common-mode performance tends to follow the typical value. Minimum value limits reflect performance only near the supply rails. Continuous short circuit may exceed absolute maximum TJ under some conditions. Shorting OUT to V+ when V+ > 12V may damage the device. RL connected to 5.0V. Sourcing: 5V ≤ VOUT ≤ 12V. Sinking: 2.5V ≤ VOUT ≤ 5V. Note 4. Note 5. Note 6. Note 7. Note 8. Note 9. Note 10. Device connected as a voltage follower with a 12V step input. The value is the positive or negative slew rate, whichever is slower. September 1999 5 LMC7101 LMC7101 Micrel Typical Characteristics Supply Current vs. Supply Voltage INPUT CURRENT (pA) –40°C 800 600 85°C 400 200 0 25°C 1000 SUPPLY CURRENT (µA) 10000 Input Current vs. Junction Temperature 100 80 −PSRR vs. Frequency 12V 2.7V 5V 1000 -PSRR (dB) 60 40 20 0 100 10 TA = 25°C 0 2 4 6 8 10 SUPPLY VOLTAGE (V) 12 1 -40 0 40 80 120 160 JUNCTION TEMPERATURE (°C) -20 1x101 1x102 1x103 1x104 FREQUENCY (Hz) 1x105 CURRENT SINK / SOURCE (mA) 120 100 +PSRR (dB) 80 60 40 20 0 1x101 12V +PSRR vs. Frequency 5V CMRR (dB) 140 120 100 80 60 40 20 CMRR vs. Frequency 1000 100 10 1 0.1 12V 2.7V 5V Sink / Source Currents vs. Output Voltage TA = 25°C 2.7V TA = 25°C TA = 25°C 1x102 1x103 1x104 FREQUENCY (Hz) 1x105 0 1x101 1x102 1x103 1x104 FREQUENCY (Hz) 1x105 0.01 0.001 0.01 0.1 1 OUTPUT VOLTAGE (V) 10 0.8 0.7 SLEW RATE (V/µs) Falling Slew Rate vs. vs. Supply Voltage 0.8 0.7 SLEW RATE (V/µs) 0.6 0.5 0.4 0.3 0.2 0.1 12 0 0 Rising Slew Rate vs. vs. Supply Voltage 800 ∆ OFFSET VOLTAGE (µV) Offset Voltage vs. Supply Voltage 0.6 0.5 0.4 0.3 0.2 0.1 0 0 -40°C +25°C +85°C 600 -40°C +25°C 85°C 25°C -40°C 400 +85°C 200 2 4 6 8 10 SUPPLY VOLTAGE (V) 2 4 6 8 10 SUPPLY VOLTAGE (V) 12 0 0 2 4 6 8 10 SUPPLY VOLTAGE (V) 12 100 80 Phase Margin vs. Capacitive Load 12V 5V PHASE MARGIN (°) 60 40 20 0 100 3V 2.7V TA = 25°C AV = 1 1000 200 300 500 LOAD CAPACITANCE (pF) LMC7101 6 September 1999 LMC7101 Micrel 100 80 GAIN (dB) 2.7V Open-Loop Frequency Response 80 5V Open-Loop Frequency Response 80 12V Open-Loop Frequency Response GAIN (dB) RL = 1M 60 40 20 0 1x102 RL = 2k TA = 25°C 60 GAIN (dB) 60 1M 2k 40 1MΩ 2k 40 20 TA = 25°C 1x105 0 1x102 600Ω 1x105 20 TA = 25°C 600Ω 1x103 1x104 FREQUENCY (Hz) 1x103 1x104 FREQUENCY (Hz) 0 1x102 1x103 1x104 FREQUENCY (Hz) 1x105 100 75 2.7V Open-Loop Gain and Phase 100pF (°) 500pF (°) TA = 25°C RL = 1MΩ 135 100 5V Open-Loop Gain and Phase 100pF (°) 120 90 120 100 80 12V Open-Loop Gain and Phase TA = 25°C RL = 1MΩ 100pF (°) 500pF (°) 150 120 90 60 OFFSET VOLTAGE (µV) 90 80 60 40 20 0 -20 1x102 TA = 25°C RL = 1MΩ 100pF (dB) 500pF (dB) 1000pF (dB) 1x103 1x104 1x105 500pF (°) 1000pF (°) PHASE (°) PHASE (°) 50 25 0 45 500pF (dB) 0 60 40 20 0 -20 1x102 100pF (dB) 500pF (dB) 1000pF (dB) 1x103 1x104 1x105 FREQUENCY (Hz) 1000pF (°) 30 0 -30 30 0 -30 100pF (dB) -45 -90 1x106 -25 1x102 1x103 1x104 1x105 -60 1x106 -60 1x106 FREQUENCY (Hz) COMMON-MODE VOLTAGE (V) September 1999 7 LMC7101 PHASE (°) GAIN (dB) GAIN (dB) 60 LMC7101 Micrel Functional Characteristics Inverting Small-Signal Pulse Response Inverting Large-Signal Pulse Response INPUT OUTPUT OUTPUT INPUT Noninverting Small-Signal Pulse Response Noninverting Large-Signal Pulse Response INPUT OUTPUT Input Voltage Noise vs. Frequency LMC7101 8 OUTPUT INPUT September 1999 LMC7101 Micrel 0.011V = 8.8 ≈ 9Ω 0.001245A Driving Capacitive Loads ROUT = Driving a capacitive load introduces phase-lag into the output signal, and this in turn reduces op-amp system phase margin. The application that is least forgiving of reduced phase margin is a unity gain amplifier. The LMC7101 can typically drive a 100pF capacitive load connected directly to the output when configured as a unity-gain amplifier. Using Large-Value Feedback Resistors A large-value feedback resistor (> 500kΩ) can reduce the phase margin of a system. This occurs when the feedback resistor acts in conjunction with input capacitance to create phase lag in the fedback signal. Input capacitance is usually a combination of input circuit components and other parasitic capacitance, such as amplifier input capacitance and stray printed circuit board capacitance. Figure 2 illustrates a method of compensating phase lag caused by using a large-value feedback resistor. Feedback capacitor CFB introduces sufficient phase lead to overcome the phase lag caused by feedback resistor RFB and input capacitance CIN. The value of CFB is determined by first estimating CIN and then applying the following formula: Application Information Input Common-Mode Voltage Some amplifiers exhibit undesirable or unpredictable performance when the inputs are driven beyond the common-mode voltage range, for example, phase inversion of the output signal. The LMC7101 tolerates input overdrive by at least 200mV beyond either rail without producing phase inversion. If the absolute maximum input voltage (700mV beyond either rail) is exceeded, the input current should be limited to ± 5mA maximum to prevent reducing reliability. A 10kΩ series input resistor, used as a current limiter, will protect the input structure from voltages as large as 50V above the supply or below ground. See Figure 1. RIN VIN 10kΩ VOUT Figure 1. Input Current-Limit Protection Output Voltage Swing Sink and source output resistances of the LMC7101 are equal. Maximum output voltage swing is determined by the load and the approximate output resistance. The output resistance is: RIN × CIN ≤ RFB × CFB CFB RFB RIN VOUT CIN ROUT = VDROP ILOAD VIN VDROP is the voltage dropped within the amplifier output stage. VDROP and ILOAD can be determined from the VO (output swing) portion of the appropriate Electrical Characteristics table. ILOAD is equal to the typical output high voltage minus V+/2 and divided by RLOAD. For example, using the Electrical Characteristics DC (5V) table, the typical output high voltage using a 2kΩ load (connected to V+/2) is 4.989V, which produces an ILOAD of Figure 2. Cancelling Feedback Phase Lag Since a significant percentage of CIN may be caused by board layout, it is important to note that the correct value of CFB may change when changing from a breadboard to the final circuit layout.  4.989V – 2.5V  1.245mA   = 1.245mA .   2kΩ Voltage drop in the amplifier output stage is: VDROP = 5.0V – 4.989V VDROP = 0.011V Because of output stage symmetry, the corresponding typical output low voltage (0.011V) also equals VDROP. Then: September 1999 9 LMC7101 LMC7101 Typical Circuits Some single-supply, rail-to-rail applications for which the LMC7101 is well suited are shown in the circuit diagrams of Figures 3 through 7. V+ VIN 3 2 Micrel VS 0.5V to Q1 VCEO(sus) Load V+ LMC7101 1 VOUT 0V to V+ V+ 0V to AV 4 5 VOUT 0V to V+ VIN 0V to 2V 3 2 LMC7101 1 IOUT Q1 VCEO = 40V 2N3904 IC(max) = 200mA 4 5 { R2 900k R1 100k Change Q1 and RS for higher current and/or different gain. RS 10Ω 1⁄2W IOUT = Figure 3a. Noninverting Amplifier VIN = 100mA/V as shown RS Figure 5. Voltage-Controlled Current Sink 100 V+ R4 C1 0.001µF AV = 1 + R2 ≈ 10 R1 4 VOUT (V) 100k V+ 2 LMC7101 1 VOUT V+ 0V 3 0 0 VIN (V) 100 5 Figure 3b. Noninverting Amplifier Behavior V+ 3 2 V+ R2 100k R3 100k R4 100k VIN 0V to V+ LMC7101 1 4 5 VOUT 0V to V+ VOUT = VIN Figure 6. Square Wave Oscillator CIN R1 33k R2 330k V+ 4 2 Figure 4. Voltage Follower LMC7101 1 COUT RL VOUT 0V 3 5 V+ R3 330k C1 1µF R4 330k AV = − R2 330k = = −10 R1 33k Figure 7. AC-Coupled Inverting Amplifier LMC7101 10 September 1999 LMC7101 Micrel Package Information 1.90 (0.075) REF 0.95 (0.037) REF 1.75 (0.069) 1.50 (0.059) 3.00 (0.118) 2.60 (0.102) DIMENSIONS: MM (INCH) 3.02 (0.119) 2.80 (0.110) 1.30 (0.051) 0.90 (0.035) 10° 0° 0.15 (0.006) 0.00 (0.000) 0.60 (0.024) 0.10 (0.004) 0.20 (0.008) 0.09 (0.004) 0.50 (0.020) 0.35 (0.014) SOT-23-5 (M5) September 1999 11 LMC7101 LMC7101 Micrel MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 TEL USA + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 1999 Micrel Incorporated LMC7101 12 September 1999
LMC7101BIM5 价格&库存

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LMC7101BIM5X/NOPB
  •  国内价格
  • 1+3.68
  • 10+3.52

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