ML4832

July 2000 PRELIMINARY ML4832* Electronic Dimming Ballast Controller GENERAL DESCRIPTION The ML4832 is a complete solution for a dimmable/nondimmable, high power factor, high efficiency electronic ballast. The BiCMOS ML4832 contains controllers for “boost” type power factor correction as well as for a dimming ballast. The power factor circuit uses the average current sensing method with a gain modulator and overvoltage protection. This system produces a power factor of better than 0.99 with low input current THD at > 95% efficiency. Special care has been taken in the design of the ML4832 to increase system noise immunity by using a high amplitude oscillator, and a current-fed multiplier. An overvoltage protection comparator inhibits the PFC section in the event of a lamp out or lamp failure condition. The ballast section provides for programmable starting scenarios with programmable preheat and lamp out-ofsocket interrupt times. The IC controls lamp output through frequency modulation using lamp current feedback. FEATURES s s s s s s s s s s Complete power factor correction and dimming ballast control in one IC Low distortion, high efficiency continuous boost, average current sensing PFC section Programmable start scenario for rapid or instant start lamps Lamp current feedback for dimming control Variable frequency dimming and starting Programmable restart for lamp out condition to reduce ballast heating Over-temperature shutdown replaces external heat sensor for safety PFC overvoltage comparator eliminates output “runaway” due to load removal Large oscillator amplitude and gain modulator improves noise immunity Low start-up current tDIS. When LFB OUT is high, ICH = 0 and the minimum frequency occurs. The charging current varies according to two control inputs to the oscillator: 1. The output of the preheat timer 2. The voltage at LFB OUT In preheat condition, charging current is fixed at ICHG (PREHEAT) = 25 . RSET (6) 17 VREF VREF RT ICHG CONTROL CLOCK RT/CT 8 1.25/3.75 CT 5.5mA + – tDIS VTH = 3.75V tCHG CT VTL = 1.25V Figure 5. Oscillator Block Diagram and Timing 8 ML4832 FUNCTIONAL DESCRIPTION (Continued) In running mode, charging current decreases as the VPIN6 rises from 0V to VOH of the LAMP FB amplifier. The highest frequency will be attained when ICHG is highest, which is attained when LFB OUT is at 0V: To help reduce ballast cost, the ML4832 includes a temperature sensor which will inhibit ballast operation if the IC’s junction temperature exceeds 120°C. In order to use this sensor in lieu of an external sensor, care should be taken when placing the IC to ensure that it is sensing temperature at the physically appropriate point in the ballast. The ML4832’s die temperature can be estimated with the following equation: ICHG(0) = 5 R SET (7) Highest lamp power, and lowest output frequency are attained when LFB OUT is at its maximum output voltage (VOH). In this condition, the minimum operating frequency of the ballast is set per (5) above. For the IC to be used effectively in dimming ballasts with higher Q output networks a larger CT value and lower RT value can be used, to yield a smaller frequency excursion over the control range (VLFB OUT). The discharge current is set to 5.5mA. Assuming that IDIS >> IRT: T J ≅ TA × PD × 65° C / W STARTING, RE-START, PREHEAT AND INTERRUPT (9) The lamp starting scenario implemented in the ML4832 is designed to maximize lamp life and minimize ballast heating during lamp out conditions. The circuit in Figure 7 controls the lamp starting scenarios: Filament preheat and lamp out interrupt. CX is charged with a current of IRSET/4 and discharged through RX. The voltage at CX is initialized to 0.7V (VBE) at power up. The time for CX to rise to 4.8V is the filament preheat time. During that time, the oscillator charging current (ICHG) is 2.5/RSET. This will produce a high frequency for filament preheat, but will not produce sufficient voltage to ignite the lamp. After cathode heating, the inverter frequency drops to FMIN causing a high voltage to appear to ignite the lamp. If the voltage does not drop when the lamp is supposed to have ignited, the lamp voltage feedback coming into pin 9 rises to above VREF, the CX charging current is shut off and the inverter is inhibited until CX is discharged by RX to the 1.2V threshold. Shutting off the inverter in this manner prevents the inverter from generating excessive heat when t DIS(VCO) ≅ 600 × CT (8) IC BIAS, UNDER-VOLTAGE LOCKOUT AND THERMAL SHUTDOWN The IC includes a shunt regulator which will limit the voltage at VCC to 15V (VCCZ). The IC should be fed with a current limited source, typically derived from the ballast transformer auxiliary winding. When VCC is below VCCZ – 1.1V, the IC draws less than 0.48mA of quiescent current and the outputs are off. This allows the IC to start using a “bleed resistor” from the rectified AC line. VCC VCCZ VON VOFF 10 CX 1.2/4.8 6.8 + 1.2/6.8 – R DIMMING LOCKOUT INHIBIT Q S RX/CX + HEAT – 0.625 RSET ICC 5.5mA t RX 0.34mA t 9 INT VREF – + Figure 6. Typical VCC and ICC Waveforms when the ML4832 is Started with a Bleed Resistor from the Rectified AC Line and Bootstrapped from an Auxiliary Winding. Figure 7. Lamp Preheat and Interrupt Timers 9 ML4832 FUNCTIONAL DESCRIPTION (Continued) the lamp fails to strike or is out of socket. Typically this time is set to be fairly long by choosing a large value of RX. LFB OUT is ignored by the oscillator until CX reaches 6.8V threshold. The lamps are therefore driven to full power and then dimmed. The CX pin is clamped to about 7.5V. A summary of the operating frequencies in the various operating modes is shown below. OPERATING MODE Preheat Dimming Lock-out DIMMING CONTROL OPERATING FREQUENCY [F(MAX) to F(MIN)] 2 F(MIN) F(MIN) TO F(MAX) 6.8 4.8 RX/CX 1.2 .65 0 HEAT DIMMING LOCKOUT 7.5 INT INHIBIT Figure 8. Lamp Starting and Restart Timing 10 ML4832 TYPICAL APPLICATIONS Figures 9 and 10 show ballast schematics, both nondimming and dimming. These are power-factor corrected 60W ballasts designed to operate two series connected F32T8 fluorescent lamps. Both Schematics, Figures 9 and 10, are of previously published ML4831 circuits that have been modified for ML4832 compatibility. The value changes and component additions made for ML4832 compatibility were for different amplifier compensation, bootstrap/bias and protection and do not effect the validity of the circuit description, operational information or equations. TO CONVERT FROM AN EXISTING NON-DIMMING ML4831 TO THE ML4832: Resistors Change: R4 R7 R18 R13 R14 Add: R24 R22 R23 Delete: Capacitors Change: C5 C7 C11 C12 C18 C20 Add: Magnetics Change: T1 to TSD-882 C23 to to to to to to 10nF, 63V, 10% ceramic 180pF, 100V, 5% ceramic 1nF, 100V, 10% ceramic 100nF, 100V, 10% ceramic 100µF, 16V, 20% electrolytic 100µF, 25V, 20% electrolytic 33nF, 50V, 20% ceramic R9 to to to to to 51kW, 1/4 W, 5% carbon film 866kW, 1/4 W, 1%, metal film 75kW, 1/4 W, 5%, carbon film 470W, 1/4 W, 5%, carbon film 5.76kW, 1/4 W, 1%, metal film 499kW, 1/4 W, 5%, carbon film 75kW, 1/4 W, 5%, carbon film 51W, 1/4 W, 5%, carbon film 100W, 1/4 W, 5%, carbon film R6, R7 to TO CONVERT FROM AN EXISTING DIMMING ML4831 TO THE ML4832: Resistors Change: R4 R7 R18 R13 R14 R26 Add: R32 R30 R31 Delete: Capacitors Change: C5 C7 C25 C12 C24 C20 Add: Diodes Delete: Magnetics Change: T1 to TSD-882 D10, D13 C27 C26 to to to to to to 10nF, 63V, 10% ceramic 180pF, 100V, 5% ceramic 1nF, 100V, 10% ceramic 100nF, 100V, 10% ceramic 100µF, 16V, 20% electrolytic 100µF, 25V, 20% electrolytic 33nF, 50V, 20% ceramic 100nF, 100V, 10% ceramic R9 to to to to to to 51kW, 1/4 W, 5% carbon film 866kW, 1/4 W, 1%, metal film 75kW, 1/4 W, 5%, carbon film 470W, 1/4 W, 5%, carbon film 5.76kW, 1/4 W, 1%, metal film 499kW, 1/4 W, 5%, carbon film 200kW, 1/4 W, 5%, carbon film 75kW, 1/4 W, 5%, carbon film 51W, 1/4 W, 5%, carbon film 100W, 1/4 W, 5%, carbon film R6, R11 to 11 C23 33nF 6 13 12 11 10 7 8 9 C6 2.2nF R5 15.4kΩ C4 R15 0.1µF 324k ML4832 12 TP4 D1 1A 7 T1 8 D2 1A D9 1A 7 Q3 IRF820 T3 R24 75kΩ 1 8 TP1 C22 33nF C17 1µF R22 51Ω TP2 R6 866kΩ C18 100µF R18 470Ω R23 100Ω D13 0.1A R19 51Ω 6 7 4 3 2 1 9 8 C9 33nF C8 4700pF B B R R Y Y 2 C10 47µF R13 5.76kΩ D7 1A Q1 2.5A R12 442kΩ R7 75kΩ 6 3 R17 51Ω 9 T2 Q2 IRF820 10 D12 1A R20 442kΩ D4 1A D5 1A R1 1.0Ω D6 1A R8 22Ω C20 R11 100µF 866kΩ TP5 R10 11.5kΩ 1 18 17 16 15 14 D11 IN4148 TP3 R2 1kΩ C21 0.001µF 2 3 4 R14 499kΩ 5 R21 5kΩ C19 C13 10µF C14 C15 C16 0.22µF 0.22µF 100pF R3 9.1kΩ R16 1kΩ D8 IN4148 R4 51kΩ ML4832 HOT F1 L1 220 VAC D3 C1* C3 1A 2.2nF 0.15µF C2 2.2nF NEUTRAL *Note: Only One Chassis Ground Figure 9. 220V Non-Dimming Ballast C7 C5 C12 C11 10nF 100nF 1nF 180pF TP4 D15 1A D3 1A 7 T1 8 D4 1A D2 1A D9 1A Q1 2.5A Q3 2.5A R32 75kΩ R19 51Ω 1 8 TP1 C22 0.33µF R6 866kΩ C17 1µF R31 100Ω R18 470Ω R30 51 C24 100µF C27 33nF R16 10kΩ R10 11.5kΩ 1 18 17 16 15 14 13 12 11 10 D16 5.1V R29 1.3kΩ D11 0.1A R26 200kΩ R20 10kΩ 9 5 C21 1µF TP3 R15 324kΩ C13 10µF C14 0.22µF C15 0.22µF C16 100pF R22 11kΩ 6 C6 2.2nF R5 15.4kΩ C26 100nF R24 64.9kΩ 3 2 + – IC1 + – 4 7 8 1 R28 20kΩ 2 3 4 5 6 7 R2 4.3kΩ R3 220kΩ 8 R25 5kΩ 6 7 T4 7 2 R12 442kΩ R7 75kΩ 6 3 9 D7 1A Q2 2.5A T2 R23 442kΩ 10 R17 51Ω D1 1A HOT F1 L1 220 VAC C1* 2.2nF C3 0.15nF C2 2.2nF NEUTRAL D5 1A R11 866kΩ R8 22Ω R1 1.0Ω D6 1A C20 100µF C10 47µF R13 5.76kΩ L2 2 1 4 3 9 8 C9 15nF C8 4700pF T5 TP5 5 1 6 10 R R Y Y B B *Note: Only One Chassis Ground ML4832 Figure 10. 220V Dimming Ballast TP2 R27 200kΩ R4 R14 499kΩ 51kΩ D8 0.1A C4 C12 C25 C7 C5 10nF 100nF 1nF 180pF 3.3µF ML4832 13 ML4832 PHYSICAL DIMENSIONS inches (millimeters) Package: P18 18-Pin PDIP 0.890 - 0.910 (22.60 - 23.12) 18 PIN 1 ID 0.240 - 0.260 0.295 - 0.325 (6.09 - 6.61) (7.49 - 8.26) 0.045 MIN (1.14 MIN) (4 PLACES) 1 0.050 - 0.065 (1.27 - 1.65) 0.100 BSC (2.54 BSC) 0.015 MIN (0.38 MIN) 0.170 MAX (4.32 MAX) 0.125 MIN (3.18 MIN) 0.016 - 0.022 (0.40 - 0.56) SEATING PLANE 0º - 15º 0.008 - 0.012 (0.20 - 0.31) Package: S18 18-Pin SOIC 0.449 - 0.463 (11.40 - 11.76) 18 0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47) PIN 1 ID 1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES) 0.050 BSC (1.27 BSC) 0.095 - 0.107 (2.41 - 2.72) 0º - 8º 0.090 - 0.094 (2.28 - 2.39) 0.012 - 0.020 (0.30 - 0.51) SEATING PLANE 0.005 - 0.013 (0.13 - 0.33) 0.022 - 0.042 (0.56 - 1.07) 0.009 - 0.013 (0.22 - 0.33) 14 ML4832 ORDERING INFORMATION PART NUMBER ML4832CP (End of Life) ML4832CS (Obsolete) TEMPERATURE RANGE 0°C to 85°C 0°C to 85°C PACKAGE Molded PDIP (P18) SOIC (S18) © Micro Linear 1999. is a registered trademark of Micro Linear Corporation. All other trademarks are the property of their respective owners. DS4832-01 2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295 Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending. Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. 02/19/99 Printed in U.S.A. 15