APT34M120J
1200V, 34A, 0.30Ω Max
N-Channel MOSFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
S G D
S
SO
2 T-
27
ISOTOP ®
"UL Recognized"
file # E145592
APT34M120J
G
D
Single die MOSFET
S
FEATURES
• Fast switching with low EMI/RFI • Low RDS(on) • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant
TYPICAL APPLICATIONS
• PFC and other boost converter • Buck converter • Two switch forward (asymmetrical bridge) • Single switch forward • Flyback • Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 34 22 195 ±30 2700 25
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RθJC RθCS TJ,TSTG VIsolation WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) Package Weight -55 2500 1.03 29.2 10 1.1 0.11 150 Min Typ Max 960 0.13 Unit W °C/W °C V
2-2007 050-8088 Rev A
oz g in·lbf N·m
Torque
Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS
TJ = 25°C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 25A
APT34M120J
Typ 1.41 Max Unit V V/°C Ω V mV/°C µA nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1200
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
VGS = VDS, ID = 2.5mA VDS = 1200V VGS = 0V TJ = 25°C TJ = 125°C
3
0.25 4 -10
0.30 5 100 500 ±100
VGS = ±30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25°C unless otherwise specified
Test Conditions VDS = 50V, ID = 25A
VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 58 18200 215 1340 520
Max
Unit S
pF
5
VGS = 0V, VDS = 0V to 800V
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 25A, VDS = 600V Resistive Switching VDD = 800V, ID = 25A RG = 2.2Ω 6 , VGG = 15V
265 560 90 265 100 60 315 90
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 34
Unit A
G S
195 1 1430 46 10 V ns µC V/ns
ISD = 25A, TJ = 25°C, VGS = 0V ISD = 25A 3 diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 25A, di/dt ≤1000A/µs, VDD = 100V, TJ = 125°C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 8.64mH, RG = 2.2Ω, IAS = 25A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.27E-7/VDS^2 + 1.01E-7/VDS + 1.43E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8088
Rev A
2-2007
160 140 ID, DRAIN CURRENT (A)
V
GS
= 10V
50
APT34M120J
T = 125°C
J
V
GS
= 6, 7, 8 & 9V
TJ = -55°C
100 80 60 40 20 0
TJ = 125°C TJ = 25°C
ID, DRIAN CURRENT (A)
120
40
30
5V
20
10
4.5V
TJ = 150°C
30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 25A
0
0
30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0 2.5 2.0 1.5 1.0 0.5
160 140 ID, DRAIN CURRENT (A) 120 100 80 60 40 20 0 0
VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @