APT84F50B2 APT84F50L
500V, 84A, 0.065Ω Max, trr ≤320ns
N-Channel FREDFET
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
T-MaxTM
TO-264
APT84F50B2
APT84F50L
D
Single die FREDFET
G S
FEATURES
• Fast switching with low EMI • Low trr for high reliability • Ultra low Crss for improved noise immunity • Low gate charge • Avalanche energy rated • RoHS compliant
TYPICAL APPLICATIONS
• ZVS phase shifted and other full bridge • Half bridge • PFC and other boost converter • Buck converter • Single and two switch forward • Flyback
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 84 53 270 ±30 1845 42
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RθJC RθCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 10 1.1 -55 0.11 150 300 Min Typ Max 1135 0.11 Unit W °C/W
°C oz g in·lbf N·m
05-2009 050-8176 Rev B
Torque
Mounting Torque ( TO-264 Package), 4-40 or M3 screw
MicrosemiWebsite-http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS
TJ = 25°C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 42A
APT84F50B2_L
Typ 0.60 0.055 4 -10 Max Unit V V/°C Ω V mV/°C 250 1000 ±100 µA nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 500
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
VGS = VDS, ID = 2.5mA VDS = 500V VGS = 0V TJ = 25°C TJ = 125°C
2.5
0.065 5
VGS = ±30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25°C unless otherwise specified
Test Conditions VDS = 50V, ID = 42A
VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 65 13500 185 1455 845
Max
Unit S
pF
VGS = 0V, VDS = 0V to 333V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 42A, VDS = 250V Resistive Switching VDD = 333V, ID = 42A RG = 2.2Ω 6 , VGG = 15V
425 340 75 155 60 70 155 50 nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr Irrm dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 84
Unit
G S
TJ = 25°C TJ = 125°C
A 270 1.0 320 600 V ns µC A 20 V/ns
ISD = 42A, TJ = 25°C, VGS = 0V
ISD = 42A 3 diSD/dt = 100A/µs VDD = 100V
TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C
282 499 1.67 4.36 12 17.8
ISD ≤ 42A, di/dt ≤1000A/µs, VDD = 333V, TJ = 125°C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 2.08mH, RG = 25Ω, IAS = 42A.
05-2009 Rev B 050-8176
3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.14E-7/VDS^2 + 7.31E-8/VDS + 2.09E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
350 300 ID, DRAIN CURRENT (A) 250 200
V
GS
= 10V
160
T = 125°C
J
APT84F50B2_L
V
GS
= 7,8 & 10V
140 ID, DRIAN CURRENT (A)
TJ = -55°C
120 100 80 60 40
5V 6V
TJ = 25°C
150 100 50 0
TJ = 125°C TJ = 150°C
20 0 5 10 15 20 25 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 42A
4.5V
0
0
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
2.5
280 240 ID, DRAIN CURRENT (A) 200 160 120 80 40
VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @