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3N190_TO-78

3N190_TO-78

  • 厂商:

    MICROSS

  • 封装:

  • 描述:

    3N190_TO-78 - a monolithic dual enhancement mode P-Channel Mosfet - Micross Components

  • 数据手册
  • 价格&库存
3N190_TO-78 数据手册
3N190 P-CHANNEL MOSFET The 3N190 is a monolithic dual enhancement mode P-Channel Mosfet FEATURES  DIRECT REPLACEMENT FOR INTERSIL 3N190  LOW GATE LEAKAGE CURRENT  IGSS ≤ ± 10pA  LOW TRANSFER CAPACITANCE  Crss ≤ 1.0pF  The hermetically sealed TO-78 package is well suited ABSOLUTE MAXIMUM RATINGS1@ 25°C (unless otherwise noted)  for high reliability and harsh environment applications. Maximum Temperatures  Storage Temperature  ‐65°C to +150°C  (See Packaging Information). Operating Junction Temperature  ‐55°C to +135°C  Maximum Power Dissipation  Continuous Power Dissipation (one side)  300mW  3N190 Features: Continuous Power Dissipation (one side) 525mW  MAXIMUM CURRENT Very high Input Impedance Drain to Source2  50mA  High Gate Breakdown Voltage MAXIMUM VOLTAGES  Low Capacitance Drain to Gate or Drain to Source2  ‐30V  Transient Gate to Source2,3 ±125V  Gate‐Gate Voltage  ±80V  3N190 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL  CHARACTERISTIC  MIN  TYP.  MAX  UNITS  CONDITIONS  BVDSS  Drain to Source Breakdown Voltage  ‐40  ‐‐  ‐‐    ID = ‐10µA    BVSDS  Source to Drain Breakdown Voltage  ‐40  ‐‐  ‐‐  IS = ‐10µA,   VBD = 0V  V  VGS  Gate to Source Voltage  ‐3.0  ‐‐  ‐6.5  VDS = ‐15V,   ID = ‐500µA  VGS(th)  Gate to Source Threshold Voltage  ‐2.0  ‐‐  ‐5.0  VDS = ‐15V,   ID = ‐500µA  ‐2.0  ‐‐  ‐5.0  VDS =  VGS ,   ID = ‐10µA  IGSSR  Gate Reverse Leakage Current  ‐‐  ‐‐  10    VGS = 40V    IGSSF  Forward Gate Leakage Current  ‐‐  ‐‐  ‐10  VGS = ‐40V  pA  IDSS  Drain to Source Leakage Current  ‐‐  ‐‐  ‐200  VDS = ‐15V  ISDS  Source to Drain Leakage Current  ‐‐  ‐‐  ‐400  VSD = ‐15V  VDB = 0  ID(on)  Drain Current “On”  ‐5.0  ‐‐  ‐30  mA  VDS = ‐15V,  VGS = ‐10V  rDS(on)  Drain to Source “On” Resistance  ‐‐  ‐‐  300  Ω  VDS = ‐20V,   ID = ‐100µA  gfs  Forward Transconductance4  1500  ‐‐  4000  µS  VDS = ‐15V,    ID = ‐5mA ,   f = 1kHz  The 3N190 is a dual enhancement mode P-Channel Mosfet and is ideal for space constrained applications and those requiring tight electrical matching. Yos  Ciss   Input Capacitance  ‐‐  ‐‐  4.5      pF  VDS = ‐15V,    ID = ‐5mA ,   f = 1MHz  Crss  Reverse Transfer Capacitance  ‐‐  ‐‐  1.0  Coss  Output Capacitance  ‐‐  ‐‐  3.0  MATCHING CHARACTERISTICS 3N190                                                                                                                                       SYMBOL  LIMITS      CHARACTERISTIC  UNITS  CONDITIONS  MIN  MAX  gfs1/gfs2   Forward Transconductance Ratio  0.85  1.0  ns  VDS = ‐15V,    ID = ‐500µA ,   f = kHz  VGS1‐2  Gate Source Threshold Voltage  ‐‐  100  mV  VDS = ‐15V,    ID = ‐500µA  Differential5        VDS = ‐15V,    ID = ‐500µA, TS = ‐55°C to +25°C  ∆VGS1‐2/∆T  Gate Source Threshold Voltage  5 ‐‐  100  µV/°C  Differential Change with Temperature   VDS = ‐15V,    ID = ‐500µA, TS = +25°C to +125°C  SWITCHING CHARACTERISTICS    SYMBOL  CHARACTERISTIC  td(on)  Turn On Delay Time  tr  Turn On Rise Time  toff  Turn Off Time  MIN  ‐‐  ‐‐  ‐‐  TYP  ‐‐  ‐‐  ‐‐  MAX  15  30  50  UNITS    ns  CONDITIONS    VDD = ‐15V, ID(on) = ‐5mA, RG = RL = 1.4KΩ  Click To Buy Output Admittance  ‐‐  ‐‐  300  Note 1 ‐ Absolute maximum ratings are limiting values above which 3N190 serviceability may be impaired.  Note 2 – Per Transistor  Note 3 – Approximately doubles for every 10°C in TA  Device Schematic Note 4 – Measured at end points, TA and TB  Note 5 – Pulse: t= 300µS, Duty Cycle ≤ 3%  TO-78 (Bottom View) Available Packages: 3N190 in TO-72 3N190 in bare die. Tel: +44 1603 788967 Email: chipcomponents@micross.com Web: http://www.micross.com/distribution Please contact Micross for full package and die dimensions Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
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