LS5912C MONOLITHIC DUAL N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix & National 2N5912C
The LS5912C are monolithic dual JFETs. The monolithic dual chip design reduces parasitics and gives better performance at very high frequencies while ensuring extremely tight matching. These devices are an excellent choice for use as wideband differential amplifiers in demanding test and measurement applications. The LS5912C is a direct replacement for discontinued Siliconix and National LS5912C. The 8 Pin P-DIP provides ease of manufacturing, and the symmetrical pinout prevents improper orientation.
(See Packaging Information).
FEATURES Improved Direct Replacement for SILICONIX & NATIONAL 2N5912C LOW NOISE (10KHz) en~ 4nV/√Hz HIGH TRANSCONDUCTANCE (100MHz) gfs ≥ 4000µS ABSOLUTE MAXIMUM RATINGS 1 @ 25°C (unless otherwise noted) Maximum Temperatures Storage Temperature Operating Junction Temperature Maximum Power Dissipation Continuous Power Dissipation (Total) Maximum Currents Gate Current Maximum Voltages Gate to Drain Gate to Source MIN ‐‐ ‐‐ 0.95 ‐‐ TYP ‐‐ ‐‐ ‐‐ MAX 40 40 1 UNITS mV µV/°C % ‐65°C to +150°C ‐55°C to +135°C 500mW 50mA ‐25V ‐25V CONDITIONS VDG = 10V, ID = 5mA VDG = 10V, ID = 5mA TA = ‐55°C to +125°C VDS = 10V, VGS = 0V
LS5912C Applications: Wideband Differential Amps High-Speed,Temp-Compensated SingleEnded Input Amps High-Speed Comparators Impedance Converters and vibrations detectors. MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated) SYMBOL CHARACTERISTIC |VGS1 – VGS2 | Differential Gate to Source Cutoff Voltage ∆|VGS1 – VGS2 | / ∆T Differential Gate to Source Cutoff Voltage Change with Temperature IDSS1 / IDSS2 Gate to Source Saturation Current Ratio |IG1 – IG2 | Differential Gate Current gfs1 / gfs2
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‐‐ 20 1 nA % Forward Transconductance Ratio2 0.95 ‐‐ ‐‐ Common Mode Rejection Ratio 85 ‐‐ dB TYP. ‐‐ ‐‐ 0.7 ‐‐ ‐‐ ‐1 ‐1 ‐‐ ‐‐ ‐‐ ‐‐ ‐‐ ‐‐ ‐‐ 7 4 MAX. ‐5 ‐‐ ‐4 40 ‐50 ‐50 10000 10000 100 150 5 1.2 1 20 10 UNITS V mA pA µS pF dB nV/√Hz CONDITIONS IG = ‐1µA, VDS = 0V VDS = 10V, ID = 1nA IG = 1mA, VDS = 0V VDG = 10V, IG = 5mA VDS = 10V, VGS = 0V VGS = ‐15V, VDS = 0V VDG = 10V, ID = 5mA VDG = 10V, ID= 5mA Forward Transconductance Output Conductance Input Capacitance Reverse Transfer Capacitance Noise Figure Equivalent Input Noise Voltage 4000 4000 ‐‐ ‐‐ ‐‐ ‐‐ ‐‐ ‐‐ ‐‐
VDG = 10V, ID = 5mA TA = +125°C VDS = 10V, ID = 5mA, f = 1kHz VDG = 5V to 10V, ID = 5mA
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS MIN. BVGSS Gate to Source Breakdown Voltage ‐25 VGS(off) Gate to Source Cutoff Voltage ‐1 VGS(F) Gate to Source Forward Voltage ‐‐ VGS Gate to Source Voltage ‐0.3 IDSS Gate to Source Saturation Current3 7 IGSS Gate Leakage Current3 ‐‐ IG Gate Operating Current ‐‐ gfs gos CISS CRSS NF en
VDG = 10V, ID = 5mA, f = 1MHz VDG = 10V, ID = 5mA, f = 10kHz, RG = 100KΩ VDG = 10V, ID = 5mA, f = 100Hz VDG = 10V, ID = 5mA, f = 10kHz
Notes: 1. Absolute Maximum ratings are limiting values above which serviceability may be impaired 2. Pulse Test: PW ≤ 300µs Duty Cycle ≤ 3% 3. Assumes smaller value in numerator Available Packages:
Please contact Micross for full package and die dimensions: Email: chipcomponents@micross.com Web: www.micross.com/distribution.aspx
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
LS5912C in PDIP LS5912C available as bare die
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