SN54LS299J

SN54/74LS299 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The SN54 / 74LS299 is an 8-Bit Universal Shift / Storage Register with 3-state outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. Separate outputs are provided for flip-flops Q0 and Q7 to allow easy cascading. A separate active LOW Master Reset is used to reset the register. 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS LOW POWER SCHOTTKY • Common I/O for Reduced Pin Count • Four Operation Modes: Shift Left, Shift Right, Load and Store • Separate Shift Right Serial Input and Shift Left Serial Input for Easy Cascading • 3-State Outputs for Bus Oriented Applications • Input Clamp Diodes Limit High-Speed Termination Effects • ESD > 3500 Volts 20 1 J SUFFIX CERAMIC CASE 732-03 20 N SUFFIX PLASTIC CASE 738-03 1 CONNECTION DIAGRAM DIP (TOP VIEW) V CC 20 S 1 19 D s7 18 Q 7 17 I/O 7 16 I/O 5 15 I/O 3 14 I/O 1 13 CP 12 DS 0 11 20 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 DW SUFFIX SOIC CASE 751D-03 ORDERING INFORMATION SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXDW SOIC 1 S 0 2 OE 1 3 OE 2 4 I/O 6 5 I/O 4 6 I/O 2 7 I/O 0 8 Q 0 9 MR 10 GND PIN NAMES HIGH CP DS0 DS7 I/On OE1, OE2 Q0, Q7 MR S0, S1 Clock Pulse (active positive-going edge) Input Serial Data Input for Right Shift Serial Data Input for Left Shift Parallel Data Input or Parallel Output (3-State) (Note c) 3-State Output Enable (active LOW) Inputs Serial Outputs (Note b) Asynchronous Master Reset (active LOW) Input Mode Select Inputs LOADING (Note a) LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 15 (7.5) U.L. 0.25 U.L. 5 (2.5) U.L. 0.25 U.L. 0.5 U.L. 0.5 U.L. 0.5 U.L. 0.5 U.L. 0.5 U.L. 65 (25) U.L. 0.5 U.L. 10 U.L. 0.5 U.L. 1 U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. c) The Output LOW drive factor is 7.5 U.L for Military (54) and 15 U.L. for Commercial (74). The Output HIGH drive factor is 25 U.L. for Military (54) and 65 U.L. for Commercial (74) Temperature Ranges. FAST AND LS TTL DATA 5-479 SN54/74LS299 LOGIC DIAGRAM S 1 19 S 0 1 18 D S7 DS 0 11 12 CLOCK D CK CLR 8 Q D CK CLR Q D CK CLR Q D CK CLR Q D CK CLR Q D CK CLR Q D CK CLR Q D CK CLR Q 17 Q 0 MR Q 7 9 2 OE 1 OE 2 3 7 13 6 14 5 15 4 16 V = PIN 20 CC GND = PIN 10 = PIN NUMBERS I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 FUNCTION TABLE INPUTS MR L L L L L H H H H H H H H S1 X X H L X L L H H H L L L S0 X X H X L H H L L H L L L OE1 H X X L L X L X L X H X L OE2 X H X L L X L X L X X H L X X X CP X X X X X DS0 X X X X X D D X X X X X X DS7 X X X X X X X D D X X X X Asynchronous Reset; Q0 = Q7 = LOW I/O Voltage Undetermined Asynchronous Reset; Q0 = Q7 = LOW I/O Voltage LOW Shift Right; D Q0; Q0 Q1; etc. Shift Right; D Q0 & I/O0; Q0 O1 & I/O1; etc. Shift Left; D Q7; Q7 Q6; etc. Shift Left; D Q7 & I/O7; Q7 Q6 & I/O6; etc. Parallel Load; I/On Qn Hold: I/O Voltage undetermined Hold: I/On = Qn RESPONSE H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — Low Output Current — High Output Current — Low Q0, Q7 Q0, Q7 Q0, Q7 I/O0 – I/O7 I/O0 – I/O7 I/O0 – I/O7 I/O0 – I/O7 Parameter 54 74 54 74 54, 74 54 74 54 74 54 74 Min 4.5 4.75 – 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 – 0.4 4.0 8.0 – 1.0 – 2.6 12 24 Unit V °C mA mA mA mA FAST AND LS TTL DATA 5-480 SN54/74LS299 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage Output HIGH Voltage I/O0 – I/O7 Output HIGH Voltage Q0, Q7 Output LOW Voltage I/O0 – I/O7 Output LOW Voltage I/O0 – I/O7 Output Off Current HIGH I/O0 – I/O7 Output Off Current LOW I/O0 – I/O7 Others S0, S1, I/O0 – I/O7 IIH Input HIGH Current Others S0, S1 I/O0 – I/O7 Others IIL IOS Input LOW Current S0, S1 Short Circuit Current (Note 1) Power Supply Current Q0, Q7 I/O0 – I/O7 – 20 – 30 – 0.8 –100 –130 53 mA mA mA mA 54 74 54 74 54, 74 74 54, 74 74 2.4 2.4 2.5 2.7 – 0.65 3.2 3.1 3.4 3.4 0.25 0.35 0.4 0.5 0.4 0.5 40 – 400 20 40 0.1 0.2 0.1 – 0.4 0.8 – 1.5 V V V V V V V V V µA µA µA µA mA mA mA mA VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX VCC = MAX VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 5.5 V VCC = MAX, VIN = 2.7 V VCC = MIN, IOH = MAX IOL = 12 mA IOL = 24 mA IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MIN, IOH = MAX Min 2.0 0.7 V Typ Max Unit V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = – 18 mA VOH VOL VOL IOZH IOZL VCC = MAX, VOUT = 2.7 V VCC = MAX, VOUT = 0.4 V ICC Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. FAST AND LS TTL DATA 5-481 SN54/74LS299 AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Limits Symbol fMAX tPHL tPLH tPHL tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Parameter Maximum Clock Frequency Propagation Delay, Clock to Q0 or Q7 Propagation Delay, Clear to Q0 or Q7 Propagation Delay, Clock to I/O0 – I/O7 Propagation Delay, Clear to I/O0 – I/O7 Output Enable Time Output Disable Time Min 25 Typ 35 26 22 27 26 17 26 13 19 10 10 39 33 40 39 25 40 21 30 15 15 Max Unit MHz ns ns ns ns ns ns CL = 5.0 pF CL = 45 pF, RL = 667 Ω CL = 15 pF Test Conditions AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V) Limits Symbol tW tW tW ts ts th th trec Parameter Clock Pulse Width HIGH Clock Pulse Width LOW Clear Pulse Width LOW Data Setup Time Select Setup Time Data Hold Time Select Hold Time Recovery Time Min 25 13 20 20 35 0 10 20 Typ Max Unit ns ns ns ns ns ns ns ns VCC = 5.0 V Test Conditions FAST AND LS TTL DATA 5-482 SN54/74LS299 3-STATE WAVEFORMS VIN 1.3 V tPLH 1.3 V tPHL 1.3 V VIN 1.3 V tPLH 1.3 V tPHL 1.3 V VOUT 1.3 V VOUT 1.3 V Figure 1 Figure 2 VE 1.5 V VE VOUT tPZL 1.5 V 0.5 V 1.5 V tPLZ VE 1.5 V VE tPZH tPHZ 1.5 V VOUT 1.5 V ≈ 1.5 V VOL ≥ VOH ≈ 1.5 V 0.5 V Figure 3 Figure 4 AC LOAD CIRCUIT VCC RL SWITCH POSITIONS SYMBOL SW1 Open Closed Closed Closed SW2 Closed Open Closed Closed SW1 tPZH tPZL TO OUTPUT UNDER TEST tPLZ tPHZ 5 kΩ CL* SW2 * Includes Jig and Probe Capacitance. Figure 5 FAST AND LS TTL DATA 5-483 Case 751D-03 DW Suffix 20-Pin Plastic SO-20 (WIDE) -A20 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: MILLIMETER. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. -B1 10 P 0.25 (0.010) M B M 5. 751D 01, AND 02 OBSOLETE, NEW STANDARD 751D 03. 10 PL G R X 45° C K M -T- SEATING PLANE M D 20 PL 0.25 (0.010) T B S F J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 7.40 2.35 0.35 0.50 12.95 7.60 2.65 0.49 0.90 INCHES MIN MAX 0.499 0.292 0.093 0.014 0.020 0.510 0.299 0.104 0.019 0.035 1.27 BSC 0.25 0.10 0 0.32 0.25 7 0.050 BSC 0.010 0.004 0 0.012 0.009 7 ° ° ° ° 10.05 0.25 10.55 0.75 0.395 0.010 0.415 0.029 A S Case 732-03 J Suffix 20-Pin Ceramic Dual In-Line NOTES: 1. LEADS WITHIN 0.25 mm (0.010) DIA., TRUE POSITION AT SEATING PLANE, AT MAXIMUM 20 1 11 2. MATERIAL CONDITION. DIM L TO CENTER OF LEADS WHEN FORMED PARALLEL. 10 3. DIM A AND B INCLUDES MENISCUS. B A F C L N H D SEATING PLANE J M G K DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 23.88 6.60 3.81 0.38 1.40 25.15 7.49 5.08 0.56 1.65 INCHES MIN MAX 0.940 0.260 0.150 0.015 0.055 0.990 0.295 0.200 0.022 0.065 2.54 BSC 0.51 0.20 3.18 1.27 0.30 4.06 0.100 BSC 0.020 0.008 0.125 0.050 0.012 0.160 7.62 BSC 0 ° 15 ° 0.300 BSC 0 ° 15 ° 0.25 1.02 0.010 0.040 Case 738-03 N Suffix 20-Pin Plastic -A20 1 11 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: INCH. DIMENSION L" TO CENTER OF LEAD WHEN FORMED PARALLEL. B C L 4. DIMENSION B" DOES NOT INCLUDE MOLD FLASH. 5. 738 02 OBSOLETE, NEW STANDARD 738 03. -TSEATING PLANE K E G F D 20 PL 0.25 (0.010) M N M J 20 PL 0.25 (0.010) T A M M T B M DIM A B C D E F G J K L M N MILLIMETERS MIN MAX 25.66 6.10 3.81 0.39 27.17 6.60 4.57 0.55 INCHES MIN MAX 1.010 0.240 0.150 0.015 1.070 0.260 0.180 0.022 1.27 BSC 1.27 1.77 0.050 BSC 0.050 0.070 2.54 BSC 0.21 2.80 0.38 3.55 0.100 BSC 0.008 0.110 0.015 0.140 7.62 BSC 0 ° 15 ° 0.300 BSC 0 ° 15 ° 0.51 1.01 0.020 0.040 FAST AND LS TTL DATA 5-484 Motorola reserves the right to make changes without further notice to any products herein. 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JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. tPZL Closed Open ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. SYMBOL SW1 SW2 tPLZ Closed Closed Closed Closed tPHZ ◊ FAST AND LS TTL DATA 5-485