SN54LS490J

SN54/74LS490 DUAL DECADE COUNTER The SN54 / 74LS490 contains a pair of high-speed 4-stage ripple counters. Each half of the SN54 / 74LS490 has individual Clock, Master Reset and Master Set (Preset 9) inputs. Each section counts in the 8, 4, 2, 1 BCD code. • • • • Dual Version of SN54 / 74LS490 Individual Asynchronous Clear and Preset to 9 for Each Counter Count Frequency — Typically 65 MHz Input Clamp Diodes Limit High-Speed Termination Effects DUAL DECADE COUNTER LOW POWER SCHOTTKY CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 CPb 15 MRb 14 Q0b 13 MSb 12 Q1b 11 Q2b 10 Q3b 9 16 1 J SUFFIX CERAMIC CASE 620-09 1 CPa 2 MRa 3 Q0a 4 MSa 5 Q1a 6 Q2a 7 Q3a 8 GND 16 1 N SUFFIX PLASTIC CASE 648-08 PIN NAMES LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 1.5 U.L. 5 (2.5) U.L. 16 1 MS MR CP Q0 – Q3 Master Set (Set to 9) Input Master Reset Clock Input (Active LOW Going Edge) Counter Outputs (Note b) 0.5 U.L. 0.5 U.L. 1.5 U.L. 10 U.L. D SUFFIX SOIC CASE 751B-03 NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC LOGIC DIAGRAM (ONE HALF SHOWN) MS 4 12 TRUTH TABLE OUTPUTS COUNT 0 1 2 Q3 L L L L L L L L H H Q2 L L L L H H H H L L Q1 L L H H L L H H L L Q0 L H L H L H L H L H CP 1 15 K CD 2 14 3 Q0 13 5 Q1 11 6 Q2 10 7 Q3 9 J SD Q K CD J Q K CD J Q K CP J CD SD Q 3 4 5 6 7 8 9 MR FAST AND LS TTL DATA 5-563 SN54 / 74LS490 GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 – 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 – 0.4 4.0 8.0 Unit V °C mA mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage 54 Output HIGH Voltage 74 54, 74 VOL Output LOW Voltage 74 Input HIGH Current 0.1 MS, MR IIL IOS ICC Input LOW Current Clock Short Circuit Current (Note 1) Power Supply Current – 20 –1.6 – 100 26 mA mA – 0.4 mA VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX 0.35 0.5 20 IIH V µA mA 2.7 3.5 0.25 0.4 V V 2.5 – 0.65 3.5 0.8 – 1.5 V V Min 2.0 0.7 V Typ Max Unit V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = – 18 mA VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC SET-UP REQUIREMENTS (TA = 25°C, VCC = 5.0 V) Limits Symbol tW ts Parameter Any Pulse Width MR or MS to Setup Time Min 20 25 Typ Max Unit ns ns VCC = 5.0 V Test Conditions FAST AND LS TTL DATA 5-564 SN54/74LS490 AC CHARACTERISTICS (TA = 25°C) Limits Symbol fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPHL tPLH tPHL Parameter Maximum Clock Frequency Propagation Delay, CP to Q0 Propagation Delay, CP to Q1 or Q3 Propagation Delay, CP to Q2 Propagation Delay, MR to Output Propagation Delay, MS to Output Min 25 Typ 35 12 13 24 26 32 36 24 24 20 20 20 39 39 54 54 39 39 36 Max Unit MHz ns ns ns ns ns Figure 1 Figure 1 Figure 3 Figure 2 Figure 2 Figure 2 VCC = 5.0 V, CL = 15 pF Test Conditions AC WAVEFORMS *CP 1.3 V tPHL Q 1.3 V 1.3 V tPLH 1.3 V tW Figure 1 MR & MS CP 1.3 V tW tPHL 1.3 V trec 1.3 V 1.3 V Q Figure 2 MS CP QO, Q3 1.3 V tW tPLH 1.3 V 1.3 V trec 1.3 V Figure 3 *The number of Clock Pulses required between the tPHL and tPLH measurements can be determined from the Truth Table. FAST AND LS TTL DATA 5-565 -A- Case 751B-03 D Suffix 16-Pin Plastic SO-16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: MILLIMETER. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. 751B 01 IS OBSOLETE, NEW STANDARD 751B 03. 16 9 -B1 8 P 8 PL 0.25 (0.010) M B M R X 45° G -TD 16 PL 0.25 (0.010) M C SEATING PLANE K T B S M F J A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 3.80 1.35 0.35 0.40 10.00 4.00 1.75 0.49 1.25 INCHES MIN MAX 0.386 0.150 0.054 0.014 0.016 0.393 0.157 0.068 0.019 0.049 1.27 BSC 0.19 0.10 0 0.25 0.25 7 0.050 BSC 0.008 0.004 0 0.009 0.009 7 ° ° ° ° 5.80 0.25 6.20 0.50 0.229 0.010 0.244 0.019 Case 648-08 N Suffix 16-Pin Plastic -A16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: INCH. DIMENSION L" TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B" DOES NOT INCLUDE MOLD FLASH. 5. 6. ROUNDED CORNERS OPTIONAL. 648 01 THRU 07 OBSOLETE, NEW STANDARD 648 08. B 1 8 F S C -TK SEATING PLANE L H G D 16 PL 0.25 (0.010) M J M T A M DIM A B C D F G H J K L M S MILLIMETERS MIN MAX 18.80 6.35 3.69 0.39 1.02 19.55 6.85 4.44 0.53 1.77 INCHES MIN MAX 0.740 0.250 0.145 0.015 0.040 0.770 0.270 0.175 0.021 0.070 2.54 BSC 1.27 BSC 0.21 2.80 7.50 0 0.38 3.30 7.74 10 0.100 BSC 0.050 BSC 0.008 0.110 0.295 0 0.015 0.130 0.305 10 ° ° ° ° 0.51 1.01 0.020 0.040 -A16 9 Case 620-09 J Suffix 16-Pin Ceramic Dual In-Line NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. -B1 8 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. C L 5. 620 01 THRU 08 OBSOLETE, NEW STANDARD 620 09. -TSEATING PLANE K E F D 16 PL 0.25 (0.010) M N G T A S M J 16 PL 0.25 (0.010) M T B S DIM A B C D E F G J K L M N MILLIMETERS MIN MAX 19.05 6.10 19.55 7.36 4.19 0.39 0.53 INCHES MIN MAX 0.750 0.240 0.770 0.290 0.165 0.015 0.021 1.27 BSC 1.40 1.77 0.050 BSC 0.055 0.070 2.54 BSC 0.23 0.27 5.08 7.62 BSC 0 0.100 BSC 0.009 0.011 0.200 0.300 BSC 0 ° 15 ° ° 15 ° 0.39 0.88 0.015 0.035 FAST AND LS TTL DATA 5-566 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. 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ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. ◊ FAST AND LS TTL DATA 5-567