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MP2388GQEU-P

MP2388GQEU-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    UDFN8

  • 描述:

    IC REG BUCK ADJUSTABLE 1A

  • 数据手册
  • 价格&库存
MP2388GQEU-P 数据手册
MP2388 1A, 21V, 2MHz, High-Efficiency, Synchronous, Step-Down Converter in Ultra-Thin QFN Package DESCRIPTION FEATURES The MP2388 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in, internal power MOSFETs. It offers a very compact solution that achieves 1A of continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. • • • • • • • • • • • • Full protection features include over-current protection (OCP) and thermal shutdown. The MP2388 requires a minimum number of readily available, standard, external components and is available in a space-saving QFN-8 (1.5mmx2.5mm) package. Wide 4.5V to 21V Operating Input Range 1A Load Current 110mΩ/50mΩ Low RDS(ON) Internal Power MOSFETs Low Quiescent Current High-Efficiency Synchronous Mode Operation Fixed 2MHz Switching Frequency AAM Power Save Mode Internal Soft Start Over-Current Protection (OCP) and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in a QFN-8 (1.5mmx2.5mm) Package APPLICATIONS • • • Notebook Systems and I/O Power Digital Set-Top Boxes Flat-Panel Televisions and Monitors All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION R5 20 19V IN VIN BST MP2388 C1 22μF VOUT 3.3V/1A 1μH SW EN EN C5 0.1μF R1 75k VCC C2 22μF FB C4 0.1μF AAM R3 40.2k MP2388 Rev. 1.0 4/15/2016 GND R2 24k www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER ORDERING INFORMATION Part Number* Package Top Marking MP2388GQEU QFN-8 (1.5mmx2.5mm) See Below For Tape & Reel, add suffix –Z (e.g. MP2388GQEU-Z) TOP MARKING EL: Product code of MP2388GQEU Y: Year code W: Week code LL: Lot number PACKAGE REFERENCE TOP VIEW FB 1 8 AAM VCC 2 7 IN EN 3 6 SW BST 4 5 GND QFN-8 (1.5mmx2.5mm) MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER ABSOLUTE MAXIMUM RATINGS(1) Thermal Resistance VIN ................................................ -0.3V to +28V VSW .... -0.3V (-5V < 10ns) to +28V (30V < 10ns) VBST .....................................................VSW + 6V (2) All other pins .............................. -0.3V to +6V (3) Continuous power dissipation (TA = +25°C) ................................................................1.25W Junction temperature ............................... 150°C Lead temperature .................................... 260°C Storage temperature .................. -65°C to 150°C QFN-8 (1.5mmx2.5mm)….....100…..20......°C/W Recommended Operating Conditions (4) Supply voltage (VIN) ........................... 4.5 to 21V Output voltage (VOUT) ............... 0.8V to VIN*DMAX Operating junction temp (TJ). ... -40°C to +125°C MP2388 Rev. 1.0 4/15/2016 (5) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) For details of EN’s ABS MAX rating, please refer to the EN control section on page 11. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Supply current (shutdown) Supply current (quiescent) HS switch on resistance LS switch on resistance Switch leakage Current limit Oscillator frequency Foldback frequency Maximum duty cycle (6) Minimum on time IIN Iq HSRDS-ON LSRDS-ON SW LKG ILIMIT fSW Condition VEN = 0V VEN = 2V, VFB = 1V, AAM = 0.5V VEN = 2V, VFB = 1V, AAM = 5V VBST-SW = 5V VCC = 5V VEN = 0V, VSW = 12V Duty cycle = 40% VFB = 750mV fFB DMAX TON MIN VFB < 400mV VFB = 700mV Feedback voltage Feedback current VFB IFB TA = 25°C VFB = 820mV EN rising threshold EN hysteresis VEN RISING VEN HYS EN input current VIN under-voltage threshold rising IEN lockout VIN under-voltage lockout threshold hysteresis VCC regulator VCC load regulation Soft-start period (6) Thermal shutdown (6) Thermal hysteresis AAM source current Min Typ Max Units 1 μA 0.2 mA 0.7 110 50 1 2.4 1700 3 2000 78 0.3 83 35 2400 mΩ mΩ μA A kHz fSW % ns 786 798 10 810 50 mV nA 1.2 80 1.4 150 1.6 220 V mV VEN = 2V 2 μA VEN = 0 0 nA INUVVth 3.7 3.9 4.1 V INUVHYS 620 mV VCC 4.9 1.5 1.5 150 20 6.2 V % ms °C °C μA TSS IAAM ICC = 5mA VOUT from 10% to 90% 0.8 5.6 2.2 6.8 NOTE: 6) Guaranteed by design MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 19V, VOUT = 3.3V, L = 1μH, TA = 25°C, unless otherwise noted. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 5 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 1µH, TA = 25°C, unless otherwise noted. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 6 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 1µH, TA = 25°C, unless otherwise noted. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 7 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 1µH, TA = 25°C, unless otherwise noted. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER PIN FUNCTIONS Package Pin # Name 1 FB 2 VCC 3 EN 4 BST 5 GND 6 SW 7 IN 8 AAM MP2388 Rev. 1.0 4/15/2016 Description Feedback. An external resistor divider from the output to GND tapped to FB sets the output voltage. To prevent current limit runaway during a short-circuit fault condition, the frequency foldback comparator lowers the oscillator frequency when the FB voltage is below 400mV. Bias supply. Decouple VCC with a 0.1μF - 0.22μF capacitor. The capacitance should be no more than 0.22μF. Enable. Set EN to 1 to enable the MP2388. Bootstrap. A capacitor and a 20Ω resistor connected between SW and BST are required to form a floating supply across the high-side switch driver. System ground. GND is the reference ground of the regulated output voltage and requires careful consideration during PCB layout. Connect GND with coppers and vias. Switch output. Use wide PCB traces to make the connection. Supply voltage. The MP2388 operates on a 4.5V-to-21V input rail. C1 is needed to decouple the input rail. Use wide PCB traces to make the connection. Advanced asynchronous modulation. A resistor connected from AAM to ground sets an AAM voltage to force the MP2388 into non-synchronous mode when the load is small. Drive AAM high when connected to VCC or float AAM to force the MP2388 into continuous conduction mode (CCM). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER BLOCK DIAGRAM Figure 1: Functional Block Diagram MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 10 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER OPERATION The MP2388 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in, internal power MOSFETs. It offers a very compact solution that achieves 1A of continuous output current over a wide input supply range with excellent load and line regulation. The MP2388 operates with fixed-frequency, peak-current-control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The integrated high-side power MOSFET (HS-FET) is turned on and remains on until its current reaches the value set by the COMP voltage (VCOMP). When the power switch is off, it remains off until the next clock cycle starts. If the current in the power MOSFET does not reach the COMP-set current value within 83% of one PWM period, the power MOSFET is forced off. Internal Regulator Most of the internal circuitries are powered by the 5V internal regulator. After EN pulls high, this regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases. A 0.1µF ceramic capacitor is required for decoupling. Error Amplifier (EA) The error amplifier compares the FB voltage with the internal 0.798V reference (REF) and outputs a COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. AAM Operation The MP2388 uses advanced asynchronous modulation (AAM) power-save mode for lightload conditions (see Figure 2). Connect a resistor from AAM to GND to set the AAM voltage (VAAM). Under heavy-load conditions, VCOMP is higher than VAAM. When the clock goes low, the HS-FET turns on and remains on until VILsense reaches the value set by VCOMP. The internal clock resets whenever VCOMP is higher than VAAM. MP2388 Rev. 1.0 4/15/2016 Under light-load conditions, the value of VCOMP is low. When VCOMP is less than VAAM and VFB is less than VREF, VCOMP ramps up until it exceeds VAAM. During this time, the internal clock is blocked, so the MP2388 skips some pulses for pulse frequency modulation (PFM) mode and achieves light-load power save. . 56 260 Figure 2: Simplified AAM Control Logic Enable (EN) Control Enable (EN) is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator; drive EN low to turn off the regulator. There is an internal 1MΩ resistor from EN to GND, so EN can be floated to shut down the chip. The EN voltage is clamped at around 6.5V by an internal Zener diode. Connect a pull-up resistor between VIN and EN that is large enough to limit the EN input current below 100µA. Typically, a resistor around 100k is sufficient for all applications. For example, with 12V connected to VIN, RPULLUP ≥ (12V - 6.5V) ÷ 100µA = 55kΩ. Connecting EN to a voltage source directly without a pull-up resistor requires limiting the amplitude of the voltage source to ≤6V to prevent damage to the Zener diode (see Figure 3). Figure 3: 6.5V Zener Diode Connection Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating with an insufficient supply voltage. The MP2388 UVLO comparator monitors the output voltage of the internal regulator (VCC). The UVLO rising threshold is about 3.9V, while its falling threshold is a consistent 3.25V. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 11 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER Internal Soft Start (SS) A soft start (SS) is implemented to prevent the converter output voltage from overshooting during start-up. When the chip starts up, the internal circuitry generates a soft-start voltage that ramps up from 0V. The soft-start period lasts until the voltage on the soft-start capacitor exceeds the reference voltage (0.798V). At this point, the reference voltage takes over. The soft-start time is internally set to around 1.5ms. Over-Current Protection (OCP) and Hiccup The MP2388 uses a cycle-by-cycle over-current limit when the inductor current peak value exceeds the set current-limit threshold. Meanwhile, the output voltage drops until FB is below the under-voltage (UV) threshold, typically 50% below the reference. Once UV is triggered, the MP2388 enters hiccup mode to restart the part periodically. This protection mode is especially useful when the output is dead-shorted to ground. The average shortcircuit current is greatly reduced to alleviate thermal issues and protect the regulator. The MP2388 exits hiccup mode once the overcurrent condition is removed. Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, the entire chip shuts down. When the temperature is below its lower threshold (typically 130°C), the chip is enabled again. MP2388 Rev. 1.0 4/15/2016 Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. The UVLO rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, R5, C5, L1, and C2 (see Figure 4). If VIN - VSW is more than 5V, U1 regulates M1 to maintain a 5V BST voltage across C5. R5 5 Figure 4: Internal Bootstrap Charging Circuit Start-Up and Shutdown If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating a stable reference voltage and current, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to prevent any fault triggering. VCOMP and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 12 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE Choose the inductor current to be approximately APPLICATION INFORMATION 30% of the maximum load current. The maximum Setting the Output Voltage inductor peak current can be calculated with The external resistor divider is used to set the Equation (3): output voltage (see Typical Application on page ∆I 1). The feedback resistor R1 also sets the (3) IL(MAX ) = ILOAD + L 2 feedback loop bandwidth with the internal compensation capacitor (see the Typical Under light-load conditions below 100mA, a Application on page 1). R2 can then be larger inductance is recommended for improved calculated with Equation (1): efficiency. R2 = R1 VOUT −1 0.798V (1) The feedback network is shown in Figure 5. Setting the AAM Voltage The AAM voltage is used to set the transition point from AAM to PWM. It should be chosen to provide the best combination of efficiency, stability, ripple, and transient. If the AAM voltage is set lower, then stability and ripple improve, but efficiency during AAM mode and transient degrade. Likewise, if the AAM voltage is set higher, then the efficiency during AAM and transient improve, but stability and ripple degrade. Figure 5: Feedback Network Table 1 lists the recommended feedback resistor values for common output voltages. Table 1: Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) 1.05 191 604 1.2 191 383 1.8 102 82 2.5 102 47.5 3.3 75 24 5 100 19.1 AAM 3 Figure 6: AAM Network Selecting the Inductor A 0.47µH-to-4.7µH inductor with a DC current rating at least 25% percent higher than the maximum load current is recommended for most applications. For the highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from Equation (2): L1 = VOUT × (VIN − VOUT ) VIN × ∆IL × fOSC Adjust the AAM threshold by connecting a resistor from AAM to ground (see Figure 6). An internal 6.2µA current source charges the external resistor. Generally, R3 is can be calculated with Equation (4): μ A (4) VAAM = R3x6.2 The optimized AAM is shown in Figure 7. (2) Where ∆IL is the inductor ripple current. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 13 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER The input capacitor can be electrolytic, tantalum, or ceramic. When using electrolytic or tantalum capacitors, a small, high-quality ceramic capacitor (i.e.: 0.1μF) should be placed as close to the IC as possible. When using ceramic capacitors, ensure that they have enough capacitance to provide a sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated with Equation (7): ∆V = IN   ILOAD V V × OUT ×  1 − OUT  fS × C1 VIN  VIN  (7) Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Use low ESR capacitors to keep the output voltage ripple low. The output voltage ripple can be estimated with Equation (8): Figure 7: AAM Selection for Common Output Voltages Selecting the Input Capacitor The input current to the step-down converter is discontinuous, and therefore requires a capacitor to supply AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Since the input capacitor (C1) absorbs the input switching current, it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated with Equation (5): IC1 = ILOAD × VOUT  VOUT  × 1− VIN  VIN  (5) The worst-case condition occurs at VIN = 2VOUT, shown in Equation (6): IC1 = ILOAD 2 (6) For simplification, choose an input capacitor with an RMS current rating greater than half of the maximum load current. MP2388 Rev. 1.0 4/15/2016 ∆VOUT = VOUT  VOUT × 1− fS × L1  VIN  (8)   1   ×  RESR + 8 × fS × C2    Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated with Equation (9): = ΔVOUT  V  VOUT ×  1 − OUT  VIN  8 × fS × L1 × C2  (9) 2 In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated with Equation (10): ΔVOUT = VOUT  V ×  1 − OUT fS × L1  VIN   × RESR  (10) The characteristics of the output capacitor also affect the stability of the regulation system. The MP2388 can be optimized for a wide range of capacitance and ESR values. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 14 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator. The applicable conditions of the external BST diode are: • VOUT is 5V or 3.3V • Duty cycle is high: D= > 65% In these cases, an external BST diode is recommended from VCC to BST (see Figure 8). RBST MP 2388 Figure 8: Optional External Bootstrap Diode Added to Enhance Efficiency The recommended external BST diode is IN4148, and the recommended BST cap is 0.1 1μF. (7) PCB Layout Guidelines Efficient PCB layout is critical for stable operation. For best results, refer to Figure 9 and follow the guidelines below. 1. Keep the connection of the input ground and GND as short and wide as possible. 2. Keep the connection of the input capacitor and IN as short and wide as possible. 3. Ensure that all feedback connections are short and direct. 4. Place the feedback resistors and compensation components as close to the chip as possible. 5. Route SW away from sensitive analog areas, such as FB. NOTE: 7) The recommended layout is based on the Typical Application Circuit on page 16. MP2388 Rev. 1.0 4/15/2016 Figure 9: Sample Board Layout Design Example Table 2 is a design example following the application guidelines for the specifications below: Table 2: Design Example VIN VOUT IO 19V 3.3V 1A The detailed application schematics are shown in Figure 10 through Figure 15. The typical performance and circuit waveforms are shown in the Typical Performance Characteristics section. For more device applications, please refer to the related evaluation board datasheets. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 15 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER TYPICAL APPLICATION CIRCUITS (8) 4 5 20 5 C4 1.5µH MP2388 4 100 R 54.9k 5 100k 5.6pF 3 6 19.1k Figure 10: VIN = 19V, Vo = 5V, Io = 1A 4 5 20 5 C4 1µH MP2388 4 100 R 40.2k 3.3 75k 5.6pF 3 6 24k Figure 11: VIN = 19V, Vo = 3.3V, Io = 1A 5 20 5 C4 4 100 MP2388 0.82µH R 28.7k 6 2.5 102k 5.6pF 47.5k Figure 12: VIN = 19V, Vo = 2.5V, Io = 1A TYPICAL APPLICATION CIRCUITS (continued) MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 16 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE 5 20 5 C4 0.82µH MP2388 4 100 R 32.4k 1.8 102k 5.6pF 6 82k Figure 13: VIN = 12V, Vo = 1.8V, Io = 1A 5 20 5 C4 0.68µH MP2388 4 100 R 19.1k 1.2 191k 5.6pF 6 383k Figure 14: VIN = 12V, Vo = 1.2V, Io = 1A 5 20 5 C4 MP2388 4 100 0.68µH R 13k 6 1.05 191k NS 604k Figure 15: VIN = 12V, Vo = 1.05V, Io = 1A NOTE: 8) In 12VIN to 1.05VOUT applications, the HS-FET’s on time is close to the minimum on time. Although the SW may have a little jitter, the output voltage ripple is smaller than 15mV in PWM mode. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 17 MP2388 – 1A, 21V, 2MHZ , HIGH-EFFICIENCY, SYNCHRONOUS, STEP-DOWN CONVERTER C G OU PACKAGE INFORMATION CU Q G O 8 e so 0 O (1.5mmx2.5mm) QFN-8 ( 5 PIN 1 ID MARKING 5 ) PIN 1 ID 0.15X45º TYP PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW 0.15 X 45° NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 3) JEDEC REFERENCE IS MO-220. 4) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2388 Rev. 1.0 4/15/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 18
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