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MP2908AGL-Z

MP2908AGL-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    TFQFN20

  • 描述:

    IC REG BUCK ADJUSTABLE

  • 数据手册
  • 价格&库存
MP2908AGL-Z 数据手册
MP2908A 4V-60V Input, Current Mode, Synchronous Step-Down Controller The Future of Analog IC Technology DESCRIPTION FEATURES The MP2908A is a high-voltage, synchronous step-down controller that directly steps down voltages from up to 60V. The MP2908A uses PWM current control architecture with accurate cycle-by-cycle current limiting and is capable of driving dual N-channel MOSFETs. • • • • Advanced asynchronous mode (AAM) enables non-synchronous operation to optimize lightload efficiency. • The operating frequency of the MP2908A can be programmed by an external resistor or synchronized to an external clock for noisesensitive applications. Full protection features include precision output over-voltage protection (OVP), output over-current protection (OCP), and thermal shutdown. • • • • • • • The MP2908A is available in TSSOP20-EP and QFN-20 (3mmx4mm) packages. APPLICATIONS • • Automotive Industrial Control Systems • • • Wide 4V to 60V Operating Input Range Dual N-Channel MOSFET Driver 0.8V Voltage Reference with ±1.5% Accuracy Over Temperature Low Dropout Operation: Maximum Duty Cycle at 99.5% Programmable Frequency Range: 100kHz 1000kHz External Sync Clock Range: 100kHz1000kHz 180º Out-of-Phase SYNCO Programmable Soft Start Power Good Output Voltage Monitor Selectable Cycle-by-Cycle Current Limit Output Over-Voltage Protection (OVP) Over-Current Protection (OCP) Internal LDO with External Power Supply Option Programmable CCM, AAM Mode TSSOP20-EP and QFN-20 (3mmx4mm) Packages All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under quality assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ORDERING INFORMATION Part Number Package Top Marking MP2908AGF* MP2908AGL** TSSOP-20 EP QFN-20 See Below See Below * For Tape & Reel, add suffix –Z (e.g. MP2908AGF–Z) * *For Tape & Reel, add suffix –Z (e.g. MP2908AGL–Z) TOP MARKING (TSSOP-20 EP) MPS: MPS prefix YY: Year code WW: Week code MP2908A: Product code of MP2908AGF LLLLLLLLL: Lot number TOP MARKING (QFN-20(3mm x4 mm)) MP: MPS prefix: YY: year code; W: week code: 2908A: part number; LLL: lot number; MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PACKAGE REFERENCE BST 18 17 TG IN 16 SW VCC1 2 15 SGND 3 BG 14 PGND MP2908A 5 12 SENSE- FB 6 11 SYNCO 10 COMP 9 13 SENSE+ 8 4 7 SS PG ILIM Input supply voltage (VIN)............................. 65V BST supply voltage (VBST).................. VIN + 6.5V SW ..................................................-0.3V to 65V BST - SW .................................................... 6.5V Supply voltage (VCC1) ............................... 6.5V External supply voltage (VCC2)................... 15V SENSE + / - ................................................. 28V Differential sense (SENSE+ to SENSE-) ............ .....................................................-0.7V to +0.7V TG ...............................VSW - 0.3V to VBST + 0.3V BG ................................... -0.3V to VCC1 + 0.3V All other pins ................................-0.3V to +6.5V (2) Continuous power dissipation (TA = +25°C) TSSOP-20 EP............................................ 3.1W QFN-20 (3mmx4mm) ................................. 2.6W Junction temperature ................................150°C Lead temperature .....................................260°C Storage temperature ................ -65°C to +175°C 1 FREQ ABSOLUTE MAXIMUM RATINGS (1) VCC2 CCM/AAM TSSOP-20 EP 19 TOP VIEW 20 EN/SYNC TOP VIEW QFN-20 (3mmx4mm) Recommended Operating Conditions (3) Supply voltage (VIN) ............................ 4V to 60V Output voltage (VOUT)..................................≤24V Supply voltage for (VCC2)............... 4.5V to 12V Operating junction temp. (TJ)....-40°C to +125°C Thermal Resistance (4) θJA θJC TSSOP-20 EP ........................ 40 ....... 8.... °C/W QFN-20 (3mmx4mm).............. 48 ...... 10... °C/W NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ELECTRICAL CHARACTERISTICS VIN = 24V, TJ = +25°C, EN = 2V, VILIMIT = 75mV, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Input Supply VIN UVLO threshold (rising) INUV_RISING 4.5 5 V VIN UVLO threshold (falling) INUV_FALLING 3.7 3.95 V INUV_HYS IQ_VCC2 800 25 40 mV μA 750 1000 μA 250 350 μA 0.5 1.5 μA VIN UVLO hysteresis VIN supply current with VCC2 bias VIN supply current without VCC2 bias VIN AAM current VIN shutdown current IQ IQ_AAM ISHDN VCC2 = 12V, external bias VCC2 = 0, VFB = 0.84V, VAAM = 5V, SENSE+ = SENSE- = 0.3V VAAM=0.6V, VFB=0.84V, SENSE+ = SENSE- = 0.3V VEN = 0V VCC Regulator VCC1 regulator output voltage from VIN VCC1 regulator load regulation from VIN VCC1 regulator output voltage from VCC2 VCC1_VIN VCC1_VCC2 VCC1 regulator load regulation from VCC2 VIN > 6V 5 V Load = 0 to 50mA, VCC2 floating or connects to GND 1 VCC2 > 6V 5 Load = 0 to 50mA, VCC2 = 12V 1 3 % 4.92 V 3 % V VCC2 UVLO threshold (rising) VCC2_RISING 4.7 VCC2 UVLO threshold (falling) VCC2_FALLING 4.45 V VCC2_HYS 250 mV 800 μA 200 μA VCC2 threshold hysteresis VCC2 supply current IVCC2 VAAM = 5V, VFB = 0.84V, VCC2 = 12V VAAM = 0.6V, VFB = 0.84V, VCC2 = 12V Feedback (FB) Feedback voltage VFB 4V ≤ VIN ≤ 60V Feedback current IFB VFB = 0.8V 0.788 0.800 0.812 10 V nA Enable (EN) Enable threshold (rising) VEN_RISING 1.16 1.22 1.28 V Enable threshold (falling) VEN_FALLING 1.03 1.09 1.15 V Enable threshold hysteresis EN input current Enable turn-off delay VEN_TH IEN TOFF VEN = 2V 10 130 mV 2 μA 15 μs MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 24V, TJ = +25°C, EN = 2V, VILIMIT = 75mV, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units R Freq = 65kΩ 240 300 360 kHz Oscillator and Sync Operating frequency FSW Foldback operating frequency Maximum programmable frequency Minimum programmable frequency Sync/EN frequency range FSW_FOLDBACK VFB=0.1V 50% FSYNC 100 Sync/EN voltage rising threshold VSYNC_RISING 2 FSW 1000 FSWH kHz FSWL 100 kHz 1000 kHz V Sync/EN voltage falling threshold VSYNC_FALLING 0.35 V 24 V 35 60 85 mV mV mV Current Sense Current sense common mode voltage range Current limit sense voltage Reverse voltage current limit VILIMIT sense Valley current limit Input current of sensor 0 VSENSE+/- VREV_ILIMIT VVAL_ILIMIT ISENSE ILIM = GND, VSENSE+ = 3.3V ILIM = VCC1, VSENSE+ = 3.3V ILIM = FLOAT, VSENSE+ = 3.3V 15 40 65 25 50 75 ILIM = GND, VSENSE+ = 3.3V 8 ILIM = VCC1, VSENSE+ = 3.3V ILIM = FLOAT, VSENSE+ = 3.3V 17 24 ILIM = GND, VSENSE+ = 3.3V 22.5 ILIM = VCC1, VSENSE+ = 3.3V ILIM = FLOAT, VSENSE+ = 3.3V VSENSE+/-(CM) = 0V VSENSE+/-(CM) = 3.3V VSENSE+/-(CM) > 5V 47.5 72.5 -45 115 150 mV mV μA μA μA Soft Start (SS) Soft-start source current ISS SS = 0.5V Error amp transconductance(5) Gm ΔV = 5mV Error amp open loop DC gain(5) AO Error amp sink/source current IEA 2 4 6 μA Error Amplifier FB = 0.7/0.9V 500 μS 70 dB ±30 μA Protection Over-voltage threshold Over-voltage hysteresis VOV VOV_HYS 110% 115% 10% 120% VFB VFB Thermal shutdown(6) 170 °C Thermal shutdown hysteresis(6) 20 °C MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 5 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 24V, TJ = +25°C, EN = 2V, VILIMIT = 75mV, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Gate Driver TG pull-up resistor RTG_PULLUP 2 Ω TG pull-down resistor RTG_PULLDN 1 Ω BG pull-up resistor RBG_PULLUP 3 Ω BG pull-down resistor RBG_PULLDN 1 Ω 60 ns 99.5 % ns Dead time TDead CLoad = 3.3nF TG maximum duty cycle Dmax VFB = 0.7V 98 TG minimum on time(6) TON_MIN_TG 92 BG minimum on time TON_MIN_BG 175 250 ns 0.1 0.3 V Power Good Power good low VPG_Low PG rising threshold PGVth_RSING PG falling threshold PGVth_FALLING PG threshold hysteresis Power good leakage Power good delay Iload = 4mA VOUT rising VOUT falling VOUT falling VOUT rising 85% 90% 96.5% VFB 101% 107% 112.5% 81% 87% 92.5% VFB 105% 110% 116.5% PGVth_HYS IPG_LK 3% PG = 5V VFB 2 TPG_delay μA 25 μs 9.2 μA AAM/CCM AAM output current CCM required AAM threshold voltage IAAM RFreq = 65 kΩ VCCM_TH 2.3 V NOTES: 5) Guaranteed by design, not tested. 6) Derived from bench characterization, not tested in production. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 6 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 24V, VOUT = 5V, L = 4.7µH, TA = +25°C IC Thermal Rise Efficiency vs. Load Current 100 VOUT=5V 40 0.05 35 VIN=12V 90 Load Regulation 30 80 70 VIN=48V 20 -0.05 15 60 VIN=24V 10 50 40 0.00 25 -0.10 5 1 10 100 1000 IOUT (mA) 10000 0 0 1 2 3 4 5 6 7 OUTPUT CURRENT (A) 8 -0.15 1 10 100 1000 10000 LOAD CURRENT (MA) Line Regulation 0.20 0.15 0.10 0.05 IOUT=0A 0.00 -0.05 -0.10 -0.15 -0.20 -0.25 -0.30 10 IOUT=4A IOUT=8A 20 30 40 50 INPUT VOLTAGE (V) 60 MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 7 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, TA = +25°C Steady State Steady State IOUT=0, AAM Mode VOUT/AC 20mV/div. IL 500mA/div. VSW 10V/div. Steady State IOUT=0, Forced CCM Mode IOUT=7A VOUT/AC 20mV/div. VOUT/AC 20mV/div. IL 2A/div. IL 2A/div. VSW 10V/div. VSW 10V/div. Start-Up Through VIN Start-Up Through VIN Shutdown Through VIN IOUT=0 IOUT=7A IOUT=0 VIN 10V/div. VIN 10V/div. VIN 10V/div. VOUT 2V/div. VOUT 2V/div. IL 1A/div. IL 5A/div. IL 500mA/div. VSW 20V/div. VSW 20V/div. VSW 10V/div. VIN 10V/div. VOUT 2V/div. IL 5A/div. VSW 20V/div. VOUT 2V/div. Shutdown Through VIN Start-Up Through EN Start-Up Through EN IOUT=7A IOUT=0 IOUT=7A VEN 2V/div. VEN 2V/div. VOUT 2V/div. VOUT 2V/div. IL 2A/div. IL 5A/div. VSW 20V/div. VSW 20V/div. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, TA = +25°C Shutdown Through EN Shutdown Through EN IOUT=0 VEN 2V/div. SCP Entry IOUT=7A IOUT=0 to short circuit VEN 2V/div. VPOK 2V/div. IL 2A/div. VOUT 2V/div. VOUT 2V/div. IL 5A/div. IL 10A/div. VSW 5V/div. VSW 20V/div. VSW 20V/div. VOUT 2V/div. SCP Entry SCP Steady State SCP Recovery IOUT=7A to short circuit short circuit to IOUT=0 VOUT 1V/div. VPOK 2V/div. VSS 1V/div. VPOK 2V/div. VOUT 2V/div. VOUT 2V/div. IL 10A/div. IL 5A/div. IL 10A/div. VSW 20V/div. VSW 20V/div. VSW 20V/div. SCP Recovery short circuit to IOUT=7A VPOK 2V/div. VOUT 2V/div. IL 10A/div. VSW 20V/div. VOUT/AC 100mV/div. IL 5A/div. VSW 20V/div. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PIN FUNCTIONS TSSOP Pin # QFN20 Pin # 1 19 2 20 3 1 4 2 5 3 6 4 7 5 8 6 9 7 10 8 11 9 12 10 13 11 14 12 15 13 16 14 Name Description Input supply. The MP2908A operates on a 4V to 60V input range. A ceramic capacitor is needed to prevent large voltage spikes at the input. Enable input. The threshold is 1.22V with 140mV of hysteresis and is used to implement an input under-voltage lockout (UVLO) function EN/SYNC externally. If an external sync clock is applied to EN/SYNC, the internal clock follows the sync frequency. External power supply for the internal VCC1 regulator. VCC2 disables the power from VIN as long as VCC2 is higher than 4.5V. Do not connect a VCC2 power supply greater than 12V to VCC2. Connecting VCC2 to an external power supply reduces power dissipation and increases efficiency. Internal bias supply. Decouple VCC1 with a ceramic capacitor 1µF or VCC1 greater. The capacitance should be no more than 4.7µF. Low-noise ground reference. SGND should be connected to the VOUT SGND side of the output capacitors. Soft-start control input. SS is used to program the soft-start period with SS an external capacitor between SS and SGND. COMP is used to compensate the regulation control loop. Connect an COMP RC network from COMP to GND to compensate for the regulation control loop. Feedback. FB is the input to the error amplifier. An external resistive FB divider connected between the output and GND is compared to the internal +0.8V reference to set the regulation voltage. Continuous conduction mode/advanced asynchronous mode. Floating CCM/AAM or connecting CCM/AAM to VCC1 sets the part to operate in CCM/AAM CCM. Connecting an appropriate external resistor from CCM/AAM to GND (so AAM is at a low level) sets the part to operate in AAM. The AAM voltage should be no less than 480mV. Connect a resistor between FREQ and GND to set the switching FREQ frequency. PG Power good output. The output of PG is an open drain. Sense voltage limit set. The voltage at ILIM sets the nominal sense ILIM voltage at the maximum output current. There are three fixed options: float, VCC1, and GND. SYNCO outputs an out-of-phase 180ºclock when the part works in SYNCO CCM for dual-channel operation. Negative input for the current sense. The sensed inductor current limit SENSEthreshold is determined by the status of ILIM. Positive input for the current sense. The sensed inductor current limit SENSE+ threshold is determined by the status of ILIM. High-current ground reference for the internal low-side switch driver PGND and the VCC1 regulator circuit. Connect PGND directly to the negative terminal of the VCC1 decoupling capacitor. IN MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 10 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PIN FUNCTIONS (continued) TSSOP Pin # QFN20 Pin # Name 17 15 BG 18 16 SW 19 17 TG 20 18 BST Description Bottom gate driver output. Connect BG to the gate of the synchronous N-channel MOSFET. Switch node. SW is the reference for the VBST supply and high-current returns for the bootstrapped switch. Top gate drive. TG drives the gate of the top N-channel synchronous MOSFET. The TG driver draws power from the BST capacitor and returns to SW, providing a true floating drive to the top N-channel MOSFET. Bootstrap. BST is the positive power supply for the internal, floating, highside MOSFET driver. Connect a bypass capacitor between BST and SW. A diode from VCC1 to BST charges the BST capacitor when the low-side switch is off. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 11 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TIME SEQUENCE VIN 0 SW 0 EN Threshold EN 0 VCC1 Threshold VCC1 15us 0 110% REF 90%REF 62.5% REF VO 0 90% REF SS IL=ILimit IL 0 25us PG 25us 25us 25us 0 Start up N or m al O CP N or m al OV N or m a l Shutdown OC Release Figure 1: Time Sequence MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 12 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER OPERATION The MP2908A is a high-performance, stepdown, synchronous DC/DC controller IC with a wide input voltage range. It implements current mode and switching frequency programmable control architecture to regulate the output voltage with external N-channel MOSFETs. The MP2908A senses the voltage at FB; the difference between the FB voltage and an internal 0.8V reference is amplified to generate an error voltage on COMP. This is used as a threshold for the current sense comparator with a slope compensation ramp. than VAAM, the operation mode is DCM or CCM, which has a constant switching frequency. Inductor Current AAM Mode (AAM=Low) Inductor Current PWM Mode (AAM=High) t Load Decreased t Load t Decreased t t t Figure 2: AAM and PWM Under normal load conditions, the controller operates in full PWM mode (see Figure 2). At the beginning of each oscillator cycle, the top gate driver is enabled. The top gate turns on for a period determined by the duty cycle. When the top gate turns off, the bottom gate turns on after a dead time and remains on until the next clock cycle begins. Floating Driver and Bootstrap Charging The floating top gate driver is powered by an external bootstrap capacitor (CBST), which is normally refreshed when the high-side MOSFET (HS-FET) turns off. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 3.05V with a hysteresis of 170mV. There is an optional power-save mode for lightload or no-load conditions. If the BST voltage is lower than the bootstrap UVLO, the MP2908A enters constant-off-time mode to ensure that the BST cap is high enough to drive the HS-FET. Advanced Asynchronous Mode (AAM) The MP2908A employs AAM functionality to optimize efficiency during light-load or no-load conditions (see Figure 2). It is enabled when CCM/AAM is at a low level by connecting an appropriate resistor to GND to ensure that VAAM is no less than 480mV. See Equation (1): (1) VCC1 Regulator and VCC2 Power Supply Both the top and bottom MOSFET drivers and most of the internal circuitries are powered by the VCC1 regulator. An internal, low, dropout linear regulator supplies VCC1 power from VIN. Connect a ceramic capacitor 4.7μF or smaller from VCC1 to GND. The CCM/AAM output current (IAAM) is shown in Equation (2). AAM is disabled when CCM/AAM is floating or connected to VCC1. IAAM (μA) = 600 (mV) / RFREQ (kΩ) (2) If VCC2 is left open or connected to a voltage less than 4.5V, an internal 5V regulator supplies power to VCC1 from VIN. If VCC2 is greater than 4.5V, the internal regulator that supplies power to VCC1 from VCC2 is triggered. VAAM (mV) = IAAM (μA) x RAAM (kΩ) Where IAAM is the CCM/AAM output current. If AAM is enabled, the MP2908A first enters non-synchronous operation as long as the inductor current approaches zero at light-load. If the load decreases further to make the COMP voltage drop below the CCM/AAM voltage (VAAM), the MP2908A enters AAM. In AAM, the internal clock resets whenever VCOMP crosses over VAAM; the crossover time is the benchmark for the next clock cycle. When the load increases and the DC value of VCOMP is higher If VCC2 is greater than 4.5V but less than 5V, the 5V regulator is in dropout, and VCC1 is approximately equal to VCC2. Using the VCC2 power supply allows the VCC1 power to be derived from a high-efficiency external source, such as one of the MP2908A’s switching regulator outputs. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 13 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER Error Amplifier The error amplifier compares the FB voltage with the internal 0.8V reference (REF) and outputs a current proportional to the difference between the two input voltages. This output current is then used to charge or discharge the external compensation network to form the COMP voltage, which is used to control the power MOSFET current. Adjusting the compensation network from COMP to GND optimizes the control loop for good stability or fast transient response. Current Limit Function There are three fixed current limit options: 25mV, when ILIM is connected to GND; 50mV, when ILIM is connected to VCC1; and 75mV, when ILIM is floating. When the peak value of the inductor current exceeds the set current limit threshold, the output voltage begins dropping until FB is 37.5% below the reference. The MP2908A enters hiccup mode to restart the part periodically. The frequency is lowered when FB is below 0.4V. This protection mode is especially useful when the output is deadshorted to ground. The average short-circuit current is reduced greatly to alleviate thermal issues. The MP2908A exits hiccup mode once the over-current condition is removed. Low Dropout Operation In low dropout mode, the MP2908A is designed to operate in a HS fully on mode as long as the voltage difference across BST - SW is greater than 3.05V, improving dropout. When the voltage from BST to SW drops below 3.05V, an under-voltage lockout (UVLO) circuit turns off the high-side MOSFET (HS-FET). At the same time, the low-side MOSFET (LS-FET) turns on to refresh the charge on the BST capacitor. After the BST capacitor voltage is re-charged, the HS-FET turns on again to regulate the output. Since the supply current sourced from the BST capacitor is low, the HS-FET can remain on for more switching cycles than are required to refresh the BST capacitor, increasing the effective duty cycle of the switching regulator. The low dropout operation makes the MP2908A suitable for automotive cold-crank. Power Good (PG) Function The MP2908A includes an open-drain power good output that indicates whether the regulator’s output is within ±10% of its nominal value. When the output voltage falls outside of this range, the PG output is pulled low. It should be connected to a voltage source no more than 5V through a resistor (e.g., 100kΩ). The PG delay time is 25µs. Soft Start (SS) The soft start (SS) is implemented to prevent the converter output voltage from overshooting during start-up. When the chip starts, the internal circuitry generates a soft-start voltage that ramps up from 0V to 1.2V. When it is lower than the internal reference (REF), SS overrides REF, so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. An external capacitor connected from SS to SGND is charged from an internal 4μA current source, producing a ramped voltage. The softstart time (tSS) is set by the external SS capacitor and can be calculated by Equation (3): t SS (ms ) = C SS (nF ) × VREF (V ) ISS (μA ) (3) Where CSS is the external SS capacitor, VREF is the internal reference voltage (0.8V), and ISS is the 4μA SS charge current. There is no internal SS capacitor. SS is reset when a fault protection other than OVP occurs. Output Over-Voltage Protection (OVP) The output over-voltage is monitored by the FB voltage. If the FB voltage is typically 10% higher than the reference, the MP2908A enters discharge mode: the HS-FET turns off, and the LS-FET turns on. The LS-FET remains on until the reverse current limit is triggered. The LSFET then turns off, and the inductor current increases to 0. The LS-FET is turned on again after ZCD is triggered. The MP2908A works in discharge mode until the over-voltage condition is cleared. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 14 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER EN/SYNC Control The MP2908A has a dedicated enable (EN/SYNC) control. It uses a bandgapgenerated precision threshold of 1.22V. By pulling it high or low, the IC can be enabled or disabled. To disable the part, EN/SYNC must be pulled low for at least 15µs. Tie EN/SYNC to VIN through a resistor divider R5 and R6 to program the VIN start-up threshold (see Figure 3). The EN/SYNC threshold is 1.09V (falling edge), so the VIN UVLO threshold is 1.09V x (1+ R5/R6). Start-Up and Shutdown If both VIN and EN/SYNC are higher than their respective thresholds, the chip starts up. The reference block starts first, generating stable reference voltages and currents. The internal regulator is then enabled. The regulator provides a stable supply for the remaining circuitry. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. During the shutdown procedure, the signal path is blocked first to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subjected to this shutdown command. Pre-Bias Start-Up If SS is less than FB at start-up, the output has a pre-bias voltage and neither TG nor BG is turned on until SS is greater than FB. Figure 3: EN Resistor Divider Synchronize The MP2908A can be synchronized to an external clock ranging from 100kHz up to 1000kHz through EN/SYNC. The internal clock rising edge is synchronized to the external clock rising edge. The pulse width (both on and off) of the external clock signal should be no less than 100ns. Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient input supply voltages. The MP2908A UVLO rising threshold is about 4.5V while its falling threshold is a consistent 3.7V. Thermal Protection Thermal protection prevents damage to the IC from excessive temperatures. The die temperature is monitored internally until the thermal limit is reached. When the silicon die temperature is higher than 170°C, the entire chip shuts down. When the temperature is below its lower threshold (typically 20°C), the chip is enabled again. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 15 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER SYNCO ILIM IN 4.5V VCC Regulator VCC2 VCC1 VCC1 BOOST Regulator FREQ Oscillator BST HS Driver VCC1 EN/SYNC Current Limit Comparator Reference Control Vref Error Amplifier LS Driver TG SW BG SS SS PGND FB 12X PG V PG Current Sense Amplifer SENSE+ SENSE- SGND COMP CCM/AAM Figure 4: Block Diagram MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 16 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER APPLICATION INFORMATION Setting the Output Voltage The external resistor divider is used to set the output voltage (see Figure 5). VOUT R17 FB R18 Figure 5: External Resistor Divider If R17 is known, then R18 can be calculated with Equation (4): R18 = R17 (4) VOUT −1 0.8V Table 1 lists the recommended feedback resistor values for common output voltages. Table 1: Resistor Selection for Common Output Voltages (needs callout) VOUT (V) R17 (kΩ) R18 (kΩ) 3.3 5 12 37.4 (1%) 63.4 (1%) 169 (1%) 12 (1%) 12 (1%) 12 (1%) low frequency requires more inductance and capacitance, resulting in larger real estate and higher cost. It is a trade off between power loss and passive component size. In noise-sensitive applications, the switching frequency should be out of a sensitive frequency band. The MP2908A’s frequency can be programmed from 100kHz to 1000kHz with a resistor from FREQ to SGND (see Table 2). The value of RFREQ for a given operating frequency can be calculated with Equation (6): 20000 (6) −1 RFREQ (kΩ ) = fs (kHz) To get fS = 500kHz, set RFREQ to 39kΩ. Table 2: Frequency vs. Resistor Resistor (kΩ) Frequency (kHz) 65 300 39 500 19 1000 VCC Regulator Connection VCC1 can be powered from both VIN and VCC2. If connecting VCC2 to an external power supply to improve the overall efficiency, VCC2 should be larger than 4.5V but smaller than 12V (see Figure 6). Setting Current Sensing The MP2908A has three fixed current limit options: 25mV, when ILIM is connected to GND; 50mV, when ILIM is connected to VCC1; and 75mV, when ILIM is floating. The current sense resistor (RSENSE) monitors the inductor current. Its value is chosen based on the current limit threshold. The relationship between the peak inductor current (Ipk) and RSENSE can be calculated with Equation (5): R SENSE = V ILIMIT Ipk (5) The typical values for RSENSE are in the range of 10mΩ to 50mΩ. Programmable Switching Frequency Consider different variables when choosing the switching frequency. A high frequency increases switching losses and gate charge losses while a Figure 6: Internal Circuitry of VCC2 MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 17 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER If VOUT is higher than 4.5V but less than 12V, VCC2 can be connected to VOUT directly (see Figure 7). current capability. The RMS value of the ripple current flowing through the input capacitor can be calculated with Equation (9): IRMS =ILOAD VOUT V (1- OUT ) VIN VIN (9) The worst-case condition occurs at VIN = 2VOUT, shown in Equation (10): IRMS = ILOAD/2 (10) The input capacitor must be capable of handling this ripple current. Figure 7: Configuration of VCC2 Connecting to VOUT Selecting the Inductor An inductor with a DC current rating at least 25% higher than the maximum load current is recommended for most applications. A larger value inductor results in less ripple current and a lower output ripple voltage. However, the larger value inductor also has a larger physical size, higher series resistance, and lower saturation current. Choose the inductor ripple current approximately 30% of the maximum load current. The inductance value can be then be calculated with Equation (7): L= VOUT × (VIN - VOUT ) VIN × ΔIL × fS (7) Where VOUT is the output voltage, VIN is the input voltage, fS is the 300kHz switching frequency, and ΔIL is the peak-to-peak inductor ripple current. The maximum inductor peak current can be calculated with Equation (8): IL(MAX) =ILOAD + ΔIL 2 (8) Where ILOAD is the load current. Input Capacitor Selection Since the input capacitor absorbs the input switching current, it requires an adequate ripple current rating. The selection of the input capacitor is based mainly on its maximum ripple Output Capacitor Selection The output capacitor keeps the output voltage The output capacitor impedance should be low at the switching frequency. The output voltage ripple can be estimated with Equation (11): ΔVOUT = ⎞ (11) VOUT ⎛ VOUT ⎞ ⎛ 1 × ⎜1 − ⎟ ⎟ × ⎜ RESR + fS × L ⎝ VIN ⎠ ⎝ 8 × fS × CO ⎠ Where CO is the output capacitance value and RESR is the equivalent series resistance (ESR) value of the output capacitor. For tantalum or electrolytic capacitor application, the ESR dominates the impedance at the switching frequency. Formula 11 can then be approximated with Equation (12): ΔVOUT = VOUT ⎛ VOUT × ⎜1 − fS × L ⎝ VIN ⎞ ⎟ × RESR ⎠ (12) Compensation Components The MP2908A employs current-mode control for easy compensation and fast transient response. COMP is the output of the internal error amplifier and controls system stability and transient response. A series capacitor-resistor combination sets a pole-zero combination to control the control system’s characteristics. The DC gain of the voltage feedback loop can be calculated with Equation (13): A VDC = R LOAD × G CS × A O × VFB VOUT (13) Where AO is the error-amplifier voltage gain 3000V/V, GCS is the current-sense transconductance 1/(12xRSENSE) (A/V), and RLOAD is the load resistor value. MP2908A Rev. 1.01 www.MonolithicPower.com 1/27/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 18 MP2908A—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER The goal of the compensation design is to shape the converter transfer function for a desired loop gain. The system crossover frequency where the feedback loop has unity gain is important, since lower crossover frequencies result in slower line and load transient responses, and higher crossover frequencies lead to system instability. Set the crossover frequency to ~0.1×fSW. COMP R7 C4 C5 Figure 8: Compensation Network The system has two important poles: one from the compensation capacitor (C4) and the output resistor of the error amplifier and the other from the output capacitor and the load resistor (see Figure 8). These poles can be calculated with Equation (14) and Equation (15): fP1 Gm = 2π × C4 × A O fP2 = 1 2π × Co × R LOAD (14) (15) The system has one important zero due to the compensation capacitor and the compensation resistor (R7), and can be calculated with Equation (16): 1 (16) f Z1 = 2π × C4 × R7 The system may have another significant zero if the output capacitor has a large capacitance or a high ESR value, and can be calculated with Equation (17): 1 (17) fESR = 2π × Co × R ESR In this case, a third pole set by the compensation capacitor (C5) and the compensation resistor can compensate for the effect of the ESR zero. This pole is calculated with Equation (18): 1 2π × C5 × R7 below to design the 1. Choose R7 to set the desired crossover frequency with Equation (19): R7 = 2π × Co × f C VOUT × G m × G CS VFB (19) Where fC is the desired crossover frequency. Where Gm is the error-amplifier transconductance 500μA/V, and Co is the output capacitor. fP3 = Follow the steps compensation: 2. Choose C4 to achieve the desired phase margin. For applications with typical inductor values, set the compensation zero (fZ1) < 0.25 x fC to provide a sufficient phase margin. C4 is then calculated with Equation (20): C4 > 4 2π × R7 × f C (20) 3. C5 is required if the ESR zero of the output capacitor is located at
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