MPQ2454-AEC1
36V, 0.6A Step-Down Converter
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ2454 is a frequency-programmable
(350kHz to 2.3MHz) step-down switching
regulator with an integrated internal high-side,
high-voltage power MOSFET. It outputs
efficiently up to 0.6A and has current-mode
control for fast loop response.
The wide 3.3V to 36V input range accommodates a
variety of step-down applications in automotiveinput environments. A 3.5μA shutdown-mode
quiescent current allows for use in batterypowered applications. Also, the device has a high
duty cycle and low drop-out mode for automotive
cold-crank conditions.
The MPQ2454 achieves high-power conversion
efficiency over a wide load range by scaling
down the switching frequency at light-load
conditions to reduce both switching and gate
driving losses.
60μA Operating Quiescent Current
Wide 3.3V to 36V Operating Input Range
200mΩ Internal Power MOSFET
Up to 2.3MHz Programmable Switching
Frequency
Stable with Ceramic Output Capacitors
Internal Compensation
External Soft-Start
> 90% Efficiency
Low Dropout Operation for Cold-Crank
3.5μA Low Shutdown Supply Current
Synchronization to External Clock
Power Good Output
Programmable Power Good Delay Time
MSOP-10 EP and QFN-10 (3mmx3mm)
Packages
Available in AEC-Q100 Grade 1
APPLICATIONS
Frequency foldback prevents inductor current
runaway during start-up and short circuit.
Thermal shutdown provides reliable, fault-tolerant
operation. An open-drain power good (PG) signal
indicates when the output is within its nominal
voltage.
High-Voltage Power Conversion
Automotive Systems
Industrial Power Systems
Distributed Power Systems
Battery Powered Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
The MPQ2454 is available in MSOP-10 EP and
QFN-10 (3mmx3mm) packages.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
C3
U1
L1
BST
VIN
VIN
VOUT
SW
D1
C2
C1
MPQ2454
EN/SYNC
POK
EN/SYNC
SS
R1
C4
GND
FREQ
POKDL
FB
R3
R2
MPQ2454 Rev. 1.01
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
MPQ2454GH
MSOP-10 EP
MPQ2454GH-AEC1
MSOP-10 EP
MPQ2454GQ
QFN-10 (3mmx3mm)
MPQ2454GQ-AEC1
QFN-10 (3mmx3mm)
Top Marking
See Below
See Below
* For Tape & Reel, add suffix –Z (e.g. MPQ2454GH–Z)
TOP MARKING (MPQ2454GH)
Y: Year Code
W: Week Code
LLL: Lot Number
M: Product Code of MPQ2454GH
2454: Four Digits of the Part Number
TOP MARKING (MPQ2454GQ)
AEF: Product Code of MPQ2454GQ
Y: Year Code
LLL: Lot Number
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
PACKAGE REFERENCE
TOP VIEW
SW
1
10
BST
VIN
2
9
EN/SYNC
GND
3
8
FREQ
SS
4
7
POK
FB
5
6
POKDL
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
MSOP-10 EP
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage (VIN)....................... -0.3V to 40V
Switch Voltage (VSW)....... –0.3V to VIN (MAX)+0.3V
BST to SW .......................................-0.3 to 6.0V
All Other Pins ................................ -0.3V to 5.0V
EN Sink Current .......................................150µA
(2)
Continuous Power Dissipation .... (TA=+25°C)
MSOP-10 EP ........................................... 2.27W
QFN-10 (3mmx3mm) ............................... 2.50W
Junction Temperature .............................. 150°C
Lead Temperature ................................... 260°C
Storage Temperature ................. -65°C to 150°C
Recommended Operating Conditions
Supply Voltage (VIN)........................ 3.3V to 36V
Operating Junction Temp (TJ) .. -40°C to +125°C
QFN-10 (3mmx3mm)
Thermal Resistance
(3)
θJA
θJC
MSOP-10 EP.......................... 55 ...... 12 ... °C/W
QFN-10 (3mmx3mm) ............. 50 ...... 12 ... °C/W
Notes:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance (θJA), and the ambient
temperature (TA). The maximum allowable continuous power
dissipation at any ambient temperature is calculated by
PD(MAX)=(TJ(MAX)-TA)/ θJA. Exceeding the maximum
allowable power dissipation produces an excessive die
temperature, causing the regulator to go into thermal
shutdown. Internal thermal shutdown circuitry protects the
device from permanent damage.
3) Measured on JESD51-7, 4-layer PCB.
MPQ2454 Rev. 1.01
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TJ=+25°C.
Parameter
Condition
Feedback Voltage
VIN=3.3V to 36V
Switch On Resistance
Switch Leakage
Current Limit
VBST-VSW =5V
VEN = 0V, VSW = 0V
Duty Cycle=30%
VIN UVLO Rising Threshold
VIN UVLO Falling Threshold
VIN UVLO Hysteresis
Soft-Start Current
Oscillator Frequency
Sync. Frequency Range
(4)
Minimum Switch-On Time
Shutdown Supply Current
Quiescent Supply Current
TJ=+25°C
POK Hysteresis
POK Output Voltage Low
Typ
Max
Units
0.784
0.78
0.8
0.816
0.82
400
1
2.7
V
V
mΩ
μA
A
3.2
2.95
V
V
V
µA
kHz
kHz
0.8
2.6
2.35
VSS=1.2V
RFREQ=130kΩ
RFREQ=49.9kΩ
0.9
300
800
RFREQ=17.4kΩ
1840
350
VEN = 0V
No Load, VFB=0.83V,
VBST-VSW =5.5V
EN Input Logic Low Voltage
EN Input Logic High Voltage
POK Threshold
Min
200
0.1
1.8
2.9
2.65
0.25
1.8
400
1000
2300
2.7
500
1200
2760
2300
60
3.5
10
kHz
kHz
ns
μA
60
85
μA
1
V
V
1.8
FB in Respect to the Nominal
Value, VOUT Rising
FB in Respect to the Nominal
Value, VOUT Falling
FB in Respect to the
Nominal Value
ISINK = 5mA
POK Delay Current Source
(4)
Thermal Shutdown
(4)
Thermal Shutdown Hysteresis
0.9
90
%
107
%
4.5
%
1.8
170
25
0.4
V
2.7
µA
°C
°C
Notes:
4) Derived from bench characterization. Not tested in production.
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
Name
1
SW
Switch Node. The output from the high-side switch. SW requires a low VF Schottky
diode to ground (close to SW) to reduce switching spikes.
2
VIN
Input Supply. VIN provides power to all the internal control circuitry (both the BST
regulators and the high-side switch). VIN requires a decoupling capacitor to ground
(close to VIN) to minimize the switching spikes.
3
GND
Ground. Place the output capacitor as close to GND as possible to shorten the
high-current switching paths.
4
SS
Soft-Start. Place a capacitor from SS to SGND to set the soft-start period. The
MPQ2454 sources 1.8µA from SS to the soft-start capacitor at start-up. As the SS
voltage rises, the feedback threshold voltage increases to limit the inrush current
during start-up.
5
FB
Feedback. Connect FB to the tap of the external resistor divider. The feedback
threshold voltage is 0.8V.
6
POKDL
7
POK
8
FREQ
Switching Frequency Program. Connect a resistor from FREQ to ground to set the
switching frequency.
9
EN/SYNC
Enable and SYNC Input. Pull EN/SYNC below the specified threshold to shut the
chip down. Pull EN/SYNC above the specified threshold to enable the chip. Floating
EN/SYNC shuts the chip down. Apply a clock signal (350kHz to 2.3MHz) to
synchronize the internal oscillator frequency to the external clock.
10
BST
Bootstrap. The positive power supply for the internal floating high-side MOSFET
driver. Connect a bypass capacitor between BST and SW.
Exposed Pad
Description
POK Signal Delay. Connect a capacitor from POKDL to GND to program the POK
signal delay time.
Open-Drain Power Good Output. POK goes high when VO is within the ±10%
window of the nominal voltage. POK is pulled down during shutdown.
Connect the exposed pad to the GND plane to optimize thermal performance.
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
MPQ2454 Rev. 1.01
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 10µH, COUT=2x10μF, fS=1MHz, TA = +25°C, unless otherwise noted.
MPQ2454 Rev. 1.01
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, COUT=2x10μF, fS=1MHz, TA = +25°C, unless otherwise noted.
MPQ2454 Rev. 1.01
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10µH, COUT=2x10μF, fS=1MHz, TA = +25°C, unless otherwise noted.
MPQ2454 Rev. 1.01
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
VIN
EN/SYNC
EN/SYNC
Logic
EN
Internal
Regulator
5V
EXCLK
FREQ
3.5V
SW
Oscillator
BST
CLK
POK
M1
Logic
Slope
ISW
Slope
Compensation
and Peak Current
Limit
FB
0.8V
Soft Start
SW
2.5V
M2
POK
Delay
BST
SS
POKDL
GND
FIGURE1. Functional Block Diagram
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
OPERATION
The MPQ2454 is a non-synchronous, step-down,
switching regulator with an internal high-side,
high-voltage power MOSFET. It provides an
internally compensated, highly-efficient output of
0.6A with current-mode control.
It features a wide input-voltage range, a
switching frequency programmable up to 2.3MHz,
an external soft-start, and a precise current limit.
Its very low operational quiescent current makes
it suitable for battery-powered applications.
PWM Control
At moderate to high output currents, the
MPQ2454 operates in a fixed frequency, peak
current-control mode to regulate the output
voltage. Once the internal clock initiates a PWM
cycle, the power MOSFET turns on and remains
on until its current reaches the value set by the
COMP voltage. When the power switch is off, it
remains off for at least 100ns before the next
cycle starts. If the current in the power MOSFET
does not reach the COMP set current value
(within one PWM cycle), the power MOSFET
remains on, skipping a turn-off period.
Pulse-Skipping Mode
In light-load conditions, the MPQ2454 enters
pulse-skipping mode to improve light-load
efficiency. Pulse skipping occurs when the
internal COMP voltage falls below the internal
sleep threshold, which generates a pause
command to block the turn-on clock pulse that
controls the power MOSFET. The power
MOSFET therefore does not turn on,
subsequently reducing gate drive and switching
losses. This pause command puts the chip
largely into sleep mode, which consumes very
low quiescent current and further improves the
light-load efficiency.
When the COMP voltage exceeds the sleep
threshold, the pause signal re-sets, so the chip
enters normal PWM operation. Every time the
pause signal goes from low to high, a signal turns
on the power MOSFET.
Error Amplifier (EA)
The error amplifier circuit is composed of an
internal OPAMP with an RC feedback network
connected between its output node (internal
COMP node) and GND. When the FB voltage
(VFB) is less than its internal reference voltage
(VREF), the OPAMP drives the COMP output
higher, increasing the switch peak current output
and hence increasing the energy delivered to the
output. Conversely, when VFB rises above VREF,
the output energy drops.
When connecting to FB, connect FB to the tap of
a resistor divider between VO and GND.
Internal Regulator
The 3.5V internal regulator powers most of the
internal circuitry. This regulator takes the VIN
input and operates in the full VIN range. When
VIN exceeds 3.5V, the output of the regulator is in
full regulation; conversely, when VIN is lower than
3.5V, the output degrades.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. A dedicated
internal bootstrap regulator charges and
regulates the bootstrap capacitor to about 5V.
When the voltage between the BST and SW
nodes falls below the regulation voltage, a PMOS
pass transistor connected from VIN to BST turns
on. The charging current path is from VIN to BST
and then to SW. The external circuit must provide
enough voltage headroom to facilitate charging.
As long as VIN is sufficiently higher than SW, the
bootstrap capacitor will charge. When the power
MOSFET is on, VIN is about equal to SW and
prevents the bootstrap capacitor from charging.
When the external free-wheeling diode is on, the
difference between VIN to SW is at its largest,
making this period the best time to charge. When
there is no current in the inductor, SW equals VO,
so the difference between VIN and VO charges the
bootstrap capacitor.
At higher duty cycles, the time period available
for bootstrap charging is smaller, so the
bootstrap capacitor may not fully charge. In case
the external circuit does not have sufficient
voltage
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
and time to charge the bootstrap capacitor, add
external circuitry to ensure that the bootstrap
voltage is in the normal operation region.
Low Dropout Operation (LDO)
The MPQ2454 is designed to operate at a 100%
duty cycle as long as the voltage difference
across BST to SW is greater than 2.5V; this
improves dropout. When the voltage from BST to
SW drops below 2.5V, an under-voltage lockout
(UVLO) circuit turns off the high-side MOSFET
(HS-FET), and an internal low-current switch
pulls the SW node low to refresh the charge on
the BST capacitor. After the BST capacitor
voltage is re-charged, the HS-FET turns on again
to regulate the output. Since the supply current
sourced from the BST capacitor is low, the HSFET can remain on for more switching cycles
than are required to refresh the capacitor, thus
increasing the effective duty cycle of the
switching regulator. The low-dropout operation
makes the MPQ2454 suitable for the automotive
cold-crank.
The voltage drop across the power MOSFET, the
inductor resistance, the low-side diode, and the
printed circuit board resistance influence heavily
the effective duty cycle during regulator dropout.
Enable Control and Frequency
Synchronization
EN/SYNC is a digital control pin that turns the
regulator on and off.When EN is pulled below 1V
for longer than 2µs, the chip enters the lowest
shutdown current mode. Forcing EN/SYNC
above 1.8V for longer than 200ns turns on the
device. Internally, a 1.2MΩ resistor is connected
from EN to GND. So when left floating, the
device pulls EN down to GND, and the chip is
disabled.
A Zener diode is connected from EN to GND
internally. The typical clamping voltage of the
Zener diode is 7.5V, so VIN can be connected to
EN through a high Ω resistor if the system does
not have another logic input acting as an enable
signal. The resistor needs to be designed to limit
the EN sink current to less than 150μA.
An external clock with a frequency range of
350kHz to 2.3MHz can be used to synchronize
the device through EN/SYNC. The internal
clock’s rising edge is synchronized to the
external clock’s rising edge.
If a clock on period exceeds 4µs or an off period
exceeds 2µs, the device interprets the signal as
an enable input and disables synchronization.
Frequency Programmable
An external resistor (RFREQ) from FREQ to GND
sets the MPQ2454’s oscillating frequency. For
additional details on the relationship between
RFREQ and fS, refer to the “Application Information”
section.
The oscillating frequency is related to the FB
voltage. When the FB voltage decreases, the
oscillating frequency decreases accordingly and
becomes one fifth of the nominal value (when FB
is 0). This frequency foldback scheme prevents
inductor current runaway during start-up or an
output short circuit.
Under-Voltage Lockout (UVLO)
VIN UVLO protects the chip from operating at an
insufficient supply voltage. The UVLO rising
threshold is 2.9V while its falling threshold is
2.65V.
Soft-Start (SS)
Soft-start (SS) prevents the converter output
voltage from overshooting during start-up. When
the soft-start period begins, an internal current
source charges the external soft-start capacitor.
When the SS voltage falls below the internal
reference (REF), the SS overrides REF as the
error amplifier reference. When SS exceeds REF,
REF acts as the reference.
The SS time is calculated with equation (1):
CSS (nF)
t SS (ms) ISS ( A)
VREF (V)
(1)
Where ISS is the soft-start current, and VREF is the
0.8V reference voltage. It can be used for
tracking and sequencing.
Thermal Shutdown (TSD)
Thermal shutdown prevents the chip from
thermal runaway. When the die temperature
exceeds the upper threshold (170oC), the entire
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
chip shuts down. When the temperature falls
below the lower threshold (145oC), the chip is
enabled again.
Current Comparator and Current Limit
A current sense MOSFET senses accurately the
power MOSFET current. The sensed current
goes to the high-speed current comparator for
current-mode control. When the power MOSFET
turns on, the comparator is blanked first (until the
end of the turn-on transition) to reduce noise.
Then, the comparator compares the powerswitch current against the reference current set
by the COMP voltage. When the power-switch
current exceeds the reference current, the
comparator outputs low to turn off the power
MOSFET.
programmed by adding a capacitor on POKDL.
To select a capacitor for POKDL, use equation
(2):
C DL (nF)
t POKDL (ms) IPOKDL ( A)
Vth_POKDL (V)
(2)
Where IPOKDL is the POKD source current, and
Vth_POKDL is 1.2V.
.
The maximum current of the internal power
MOSFET is limited internally cycle-by-cycle. The
current limit is related to the FB voltage and
deceases as Vo decreases, which prevents
inductor current runaway during start-up or an
output short circuit.
Start-Up and Shutdown
If both VIN and VEN exceed their respective
thresholds, the chip starts up. The reference
block starts first, generating a stable reference
voltage and stable currents, and then the internal
regulator is enabled. The regulator provides a
stable supply for the rest of the circuit. After this
occurs, the soft-start block starts working and
output ramps up slowly.
Three events shut down the chip: VEN low, VIN
low, and thermal shutdown. During shutdown, the
signaling path is blocked initially to avoid
triggering any faults. Then the COMP voltage
and the internal supply rail are pulled down.
Power Good Output
The MPQ2454 includes an open-drain power
good output that indicates whether the regulator’s
output is within ±10% of its nominal value. When
the output voltage falls outside this range, the
POK output is pulled to ground. It should be
connected to a voltage source of no more than
5V through a resistor (e.g. 100kΩ). There is a
20µs de-glitch time when POK asserts high (if
POKDL is left floating). The de-glitch time can be
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
APPLICATION Information
Output Rectifier Diode
Setting the Output Voltage
The output voltage is set using a resistive voltage
divider from the output voltage to FB. The voltage
divider divides the output voltage down to the
feedback voltage by the ratio from equation (3):
The inductor is required to supply constant
current to the output load while being driven by
the switched input voltage. A larger value
inductor results in less ripple current which
results in lower output-ripple voltage. However,
the larger value inductor will be larger physically,
have a higher series resistance, and/or lower
saturation current.
VFB =VOUT
R2
(3)
R1+R2
The output voltage is calculated by equation (4):
VOUT =VFB
R1+R2
(4)
R2
Choose R2 around 100kΩ, then R1 can be
calculated by equation (5):
R1 R2 (
VOUT
1)
VFB
(5)
For example, for a 3.3V output voltage, choose
R2 as 95.3kΩ, then R1 is 300kΩ.
Setting the Switching Frequency
The switching frequency (fS) is set using a
resistor (RFREQ) between FREQ and GND. Table
1 shows the recommended RFREQ value for a
typical fS.
TABLE 1. fS vs. RFREQ
RFREQ (kΩ)
fS (kHz)
150
105
49.9
30
21
17.4
350
500
1000
1500
2000
2300
A good rule for determining the inductance is to
allow the peak-to-peak ripple current in the
inductor to be approximately 30% of the
maximum switch current limit. Also, make sure
that the peak inductor current is below the
maximum switch current limit. The inductance
value can be calculated by equation (6):
For detailed RFREQ values for various fs values,
refer to the fS vs. RFREQ curve in the “Typical
Performance Characteristics” section.
For high fS applications (especially when VIN is
high and VOUT is low), avoid kicking the minimum
switch-on time. Once the minimum switch-on
time is kicked, pulse skipping occurs, resulting in
a large output ripple. The typical minimum
switch-on time is 60ns. For VOUT=3.3V, the
recommended operating input is 24V (or lower)
at a 2MHz fS and 20V (or lower) at a 2.3MHz fS.
L1=
VOUT
fs ΔIL
(1-
VOUT
VIN
)
(6)
Where VOUT is the output voltage, VIN is the input
voltage, fS is the switching frequency, and ∆IL is
the peak-to-peak inductor ripple current.
Choose an inductor that will not saturate under
the maximum inductor peak current. The peak
inductor current is calculated by equation (7):
ILP ILOAD
VOUT
V
1 OUT
2 fS L1
VIN
(7)
Where ILOAD is the load current.
Output Rectifier Diode
The output rectifier diode supplies the current to
the inductor when the high-side switch is off. To
reduce losses due to the diode forward voltage
and recovery times, use a Schottky diode.
Choose a diode with a maximum reverse voltage
rating greater than the maximum input voltage,
and a current rating that is greater than the
maximum load current.
Input Capacitor
The input current to the step-down converter is
discontinuous, therefore, a capacitor is required
to supply the AC current to the step-down
converter while maintaining the DC input voltage.
Use low ESR capacitors for best performance.
Ceramic capacitors are preferred, but tantalum or
low ESR electrolytic capacitors will suffice.
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MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
For simplification, choose an input capacitor with
a RMS current rating greater than half of the
maximum load current. The input capacitor (CIN)
can be electrolytic, tantalum, or ceramic.
When using electrolytic or tantalum capacitors, a
small, high-quality ceramic capacitor (i.e. 0.1μF),
should be placed as close to the IC as possible.
When using ceramic capacitors, make sure that
they have enough capacitance to provide
sufficient charge in order to prevent an excessive
voltage ripple at input. The input-voltage ripple
caused by capacitance can be estimated by
equation (8):
ILOAD
V
V
OUT 1 OUT
fS CIN
VIN
VIN
ΔVIN
(8)
Output Capacitor
The output capacitor (COUT) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
preferred to keep the output-voltage ripple low.
The output-voltage ripple can be estimated by
equation (9):
ΔV OUT
VOUT VOUT
1
fS L
VIN
1
RESR
8 fS COUT
VOUT
8 fS L C OUT
V
1 OUT
VIN
At no load or light load, the part enters sleep
mode, and the internal BST regulator turns off to
save power. This makes the BST cap voltage
drop easily to its UVLO, and the internal low-side
switch turn on frequently to refresh the BST cap.
The high frequency switching brings in a relative
high quiescent current. Adding an external BST
diode reduces greatly the BST refresh frequency,
thus producing a lower quiescent current.
A power supply between 3V and 5V can be used
to power the external bootstrap diode. VOUT is a
good choice for this power supply (see Fig. 3).
External BST Diode
BST
1N4148
CBST
L
VOUT
SW
When using ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance. The output-voltage ripple is caused
mainly by the capacitance. For simplification, the
output-voltage ripple can be estimated by
equation (10):
2
An external bootstrap diode is recommended to
reduce the quiescent current at no load and light
load and enhance efficiency, especially for a high
duty cycle (>65%) or high switching frequency
applications (e.g. >2MHz).
(9)
Where L is the inductor value, and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
ΔV OUT
External Bootstrap Diode
COUT
FIGURE 3. External Bootstrap Diode
The bootstrap diode can be low cost, i.e., a
IN4148 or a BAT54.
(10)
When using tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the output
ripple can be approximated by equation (11):
ΔVOUT
VOUT
V
1 OUT
fS L
VIN
R ESR
(11)
MPQ2454 Rev. 1.01
www.MonolithicPower.com
5/24/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
15
MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
Minimum Input Voltage
The low dropout and active BST refresh
operations allow the MPQ2454 to start up and
regulate the output at a very low input voltage.
Fig. 4 shows the minimum input voltage
necessary to regulate the output voltage within
5% of the nominal value (at different loads). Note
that the minimum input voltage curve is the same
when VIN ramps up or down.
3.50
fS=1MHz
3.45
3.40
VIN (V)
3.35
3.30
3.25
3)
Keep the connection from the power
ground→Schottky diode→SW as short and
wide as possible.
4)
Ensure all feedback connections are short
and direct. Place the feedback resistors as
close to the chip as possible.
5)
Route SW away from sensitive analog areas
such as FB.
6)
Connect IN, SW, the exposed pad, and
especially GND to large copper areas to cool
the chip for improved thermal performance
and long-term reliability.
Below is the recommended PCB layout for the
MSOP10 package. The recommended layout for
the QFN10 package is similar.
3.20
3.15
3.10
3.05
3.00
0
100
200
300
400
500
600
LOAD CURRENT (mA)
(a) VOUT=3.3V
5.10
fS=1MHz
5.05
VIN (V)
5.00
4.95
4.90
4.85
4.80
4.75
Top Layer
4.70
0
100
200
300
400
500
600
LOAD CURRENT (mA)
(b) VOUT=5V
FIGURE 4. Minimum Input Voltage vs. Load
Current
PCB Layout Guidelines
Efficient PCB layout is critical for stable operation.
For best results, refer to Fig. 5 and follow the
guidelines below:
1) Keep the path of the switching current short
and minimize the loop area formed by the
input capacitor, high-side MOSFET, and
Schottky diode.
2)
Place the input capacitor as close to VIN as
possible.
Bottom Layer
FIGURE 5. Recommended PCB Layout
MPQ2454 Rev. 1.01
www.MonolithicPower.com
5/24/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
16
MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
D2
C3
0.1μF
BST
U1
VIN
VIN
L1
10μH
1M
C1
10μF
C2
0.1μF
VOUT
SW
D1
R5
1N4148
C4
10μF
C5
10μF
MPQ2454
R3
POK
EN/SYNC
100k
R1
FREQ
300k
POKDL
C8
10nF
R4
49.9k
GND
SS
C6
39pF
FB
C7
1nF
R2
95.3k
FIGURE 6. 3.3V Output Typical Application Circuit
MPQ2454 Rev. 1.01
www.MonolithicPower.com
5/24/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
17
MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN-10 (3mmx3mm)
MPQ2454 Rev. 1.01
www.MonolithicPower.com
5/24/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
18
MPQ2454―36V, 0.6A, STEP-DOWN CONVERTER
PACKAGE INFORMATION
MSOP-10 EP
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MPQ2454 Rev. 1.01
www.MonolithicPower.com
5/24/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
19
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