N-Channel Switch
J111, J112, J113,
MMBFJ111, MMBFJ112,
MMBFJ113
Features
www.onsemi.com
• This Device is Designed for Low Level Analog Switching, Sample
•
•
•
and Hold Circuits and Chopper Stabilized Amplifiers
Sourced from Process 51
Source & Drain are Interchangeable
These are Pb−Free Devices
D
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
(Note 1, 2)
Symbol
Parameter
Value
Unit
VDG
Drain−Gate Voltage
35
V
VGS
Gate−Source Voltage
−35
V
50
mA
−55 to 150
°C
IGF
TJ, TSTG
Forward Gate Current
Operating and Storage Junction
Temperature Range
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. These ratings are based on a maximum junction temperature of 150°C.
2. These are steady−state limits. ON Semiconductor should be consulted on
applications involving pulsed or low−duty−cycle operations.
S
G
TO−92 3 4.83x4.76 LEADFORMED
CASE 135AR
D
S
G
TO−92 3 4.825x4.76
CASE 135AN
G
S
D
SOT−23 (TO−236)
CASE 318−08
THERMAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Max
Symbol
Parameter
PD
Total Device Dissipation
G
MMBFJ111 /
J111 / J112 / MMBFJ112 /
J113
MMBFJ113
(Note 3)
(Note 4)
S
D
Unit
625
350
mW
Derate Above 25_C
5.0
2.8
mW/°C
RqJC
Thermal Resistance,
Junction−to−Case
125
−
°C/W
RqJA
Thermal Resistance,
Junction−to−Ambient
200
357
°C/W
3. PCB size: FR−4, 76 mm x 114 mm x 1.57 mm (3.0 inch x 4.5 inch x 0.062 inch)
with minimum land pattern size.
4. Device mounted on FR−4 PCB 36 mm x 18 mm x 1.5 mm; mounting pad for
the collector lead minimum 6 cm2.
SOT−23
CASE 318BM
MARKING DIAGRAMS
AX
XXX
YWW
XXM
1
XXXX, XX
A
Y
WW
M
= Specific Device Code
= Assembly Plant Code
= Year
= Work Week
= Date Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 1997
April, 2021 − Rev. 4
1
Publication Order Number:
MMBFJ113/D
J111, J112, J113, MMBFJ111, MMBFJ112, MMBFJ113
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Max
Unit
OFF CHARACTERISTICS
V(BR)GSS
IGSS
VGS(off)
ID(off)
Gate−Source Breakdown Voltage
IG = −1.0 mA, VDS = 0
−35
−
V
Gate Reverse Current
VGS = −15 V, VDS = 0
−
−1.0
nA
Gate−Source Cut−Off Voltage
VDS = 5 V, ID = 1.0 mA
111
−3.0
−10.0
V
112
−1.0
−5.0
113
−0.5
−3.0
−
1.0
nA
111
20
−
mA
112
5.0
−
113
2.0
−
111
−
30
112
−
50
113
−
100
Drain Cutoff Leakage Current
VDS = 5.0 V, VGS = −10 V
ON CHARACTERISTICS
IDSS
rDS(on)
Zero−Gate Voltage Drain Current (Note 5)
Drain−Source On Resistance
VDS = 15 V, VGS = 0
VDS ≤ 0.1 V, VGS = 0
W
SMALL SIGNAL CHARACTERISTICS
Cdg(on)
Csg(on)
Drain−Gate &Source−Gate On Capacitance
VDS = 0, VGS = 0, f = 1.0 MHz
−
28
pF
Cdg(off)
Drain−Gate Off Capacitance
VDS = 0, VGS = −10 V, f = 1.0 MHz
−
5.0
pF
Csg(off)
Source−Gate Off Capacitance
VDS = 0, VGS = −10 V, f = 1.0 MHz
−
5.0
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse test: pulse width ≤300 ms, duty cycle ≤2%.
www.onsemi.com
2
J111, J112, J113, MMBFJ111, MMBFJ112, MMBFJ113
ID, DRAIN CURRENT (mA)
TA = 25°C
TYP VGS(off) = −2.0 V
VGS = 0 V
− 0.2 V
8
− 0.4 V
6
− 0.6 V
4
− 0.8 V
− 1.0 V
2
0
− 1.4 V
0
0.4
0.8
− 1.2 V
1.2
1.6
2
100
100
fDS
50
50
20
_5
0.5
ID, DRAIN CURRENT (mA)
ID, DRAIN CURRENT (mA)
− 55°C
25°C
125°C
VGS(off) = −2.0 V
0
125°C
25°C
− 55°C
VDS = 15 V
0
−1
−2
12
8
− 55°C
25°C
4
0
−3
125°C
0
gfs, TRANSCONDUCTANECE (mW)
gfs, TRANSCONDUCTANECE (mW)
VGS(off) = −2.0 V
− 55°C
25°C
125°C
0
−1
−2
−1
−1.5
Figure 4. Transfer Characteristics
VDS = 15 V
0
−0.5
VGS, GATE−SOURCE VOLTAGE (V)
VGS(off) = −3.0 V
− 55°C
25°C
125°C
10
VDS = 15 V
VGS(off) = −1.1 V
Figure 3. Transfer Characteristics
20
_
10
_5
VGS(off) = −1.6 V
− 55°C
25°C
125°C
VGS, GATE−SOURCE VOLTAGE (V)
30
_
2
Figure 2. Parameter Interactions
16
10
IDSS
_
1
10
VGS(OFF), GATE CUTOFF VOLTAGE (V)
VGS(off) = −3.0 V
20
IDSS, gfs @ VDS = 15 V,
VGS = 0 PULSED
rDS @ 1.0 mA, VGS = 0
VGS(off) @ VDS = 15 V,
ID = 1.0 nA
10
Figure 1. Common Drain−Source
30
20
gfs
VDS, DRAIN−SOURCE VOLTAGE (V)
40
−3
30
VGS(off) = −1.6 V
− 55°C
25°C
125°C
20
VGS(off) = −1.1 V
10
− 55°C
25°C
125°C
VDS = 15 V
0
VGS, GATE−SOURCE VOLTAGE (V)
0
−0.5
−1
−1.5
VGS, GATE−SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Transfer Characteristics
www.onsemi.com
3
rDS, DRAIN “ON” RESISTANCE (mW)
10
gfs, TRANSCONDUCTANECE (mW)
TYPICAL PERFORMANCE CHARACTERISTICS
5
J111, J112, J113, MMBFJ111, MMBFJ112, MMBFJ113
rDS, NORMALIZED RESISTANCE (W)
rDS, DRAIN “ON” RESISTANCE (mW)
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
100
125°C V
GS(off)
TYP = −2.0 V
50
25°C
125°C
VGS(off)
TYP = −7.0 V
− 55°C
20
25°C
rDS @ VGS(off) = 0
− 55°C
10
1
2
5
10
20
50
100
ID, DRAIN CURRENT (mA)
gos, OUTPUT CONDUCTANECE (mW)
gfs, TRANSCONDUCTANECE (mW)
VGS(off) = −1.4 V
VGS(off) = −3.0 V
1
0.1
1
r
r
20
10
en, NOICE VOLTAGE (nV / √Hz)
Cis (Crs), CAPACITANCE (pF)
f = 0.1 − 1.0 MHz
Cis (VDS = 0)
Cis (VDS = 20)
Crs (VDS = 0)
−4
−8
−12
−16
V
10
GS
V GS(off)
5
2
1
0
0.2
0.4
0.6
0.8
1
100
10
TA = 25°
f = 1.0 kHz
VDG = 5.0 V
5.0 V
10 V
15 V
20 V
5.0 V
10 V
15 V
20 V
VGS(off) = −5.0 V
1
10 V
15 V
20 V
VGS(off) = −2.0 V
VGS(off) = −0.85 V
0.1
0.01
0.1
10
Figure 10. Output Conductance vs. Drain Current
100
0
DS
ID, DRAIN CURRENT (mA)
Figure 9. Transconductance vs. Drain Current
1
+
1*
ID, DRAIN CURRENT (mA)
10
DS
Figure 8. Normalized Drain Resistance vs.
Bias Voltage
TA = 25°C
VDG = 15 V
f = 1.0 kHz
10
VGS(off) @ 5.0 V, 10 mA
50
VGS/VGS(off), NORMALIZED GATE−SOURCE VOLTAGE (V)
Figure 7. On Resistance vs. Drain Current
100
100
−20
100
50
VDG = 15 V
BW = 6.0 Hz @ f = 10 Hz,
100 Hz = 0.21 @ f ≥ 1.0 kHz
10
5
ID = 1.0 mA
ID = 10 mA
1
0.01
VGS, GATE−SOURCE VOLTAGE (V)
1
10
100
f, FREQUENCY (kHz)
Figure 11. Capacitance vs. Voltage
Figure 12. Noise Voltage vs. Frequency
www.onsemi.com
4
J111, J112, J113, MMBFJ111, MMBFJ112, MMBFJ113
100
PD, POWER DISSIPATION (mW)
en, NOICE VOLTAGE (nV / √Hz)
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
VDG = 15 V
f = 10 Hz
f = 100 Hz
f = 1.0 kHz
10
f = 10 kHz
f = 100 kHz
1
0.01
0.1
1
10
700
600
TO−92
500
SOT−23
400
300
200
100
0
0
25
50
ID, DRAIN CURRENT (mA)
VDD = 3.0 V
tr APPROX. ID INDEPENDENT
VGS(off) = 3.0 V
TA = 25°C
tr(ON)
20
15
10
2.5 mA
− 6.0 V
ID = 6.6 mA
VDG = 15 V
td(ON)
5
0
0
−2
−4
−6
100
125
150
Figure 14. Power Dissipation vs.
Ambient Temperature
td(OFF), tOFF, TURN OFF TIME (ns)
td(ON), td(ON), TURN ON TIME (ns)
Figure 13. Noise Voltage vs. Current
25
75
TEMPERATURE (°C)
−8
−10
100
VGS(off) = −2.2 V
80
− 4.0V
60
t(off)
− 7.5V
TA = 25°C
VDD = 3.0 V
VGS = −12 V
td(off) DEVICE
VGS(off) INDEPENDENT
40
20
0
VGS, GATE−SOURCE CUTOFF VOLTAGE (V)
td(off)
0
2
4
6
8
ID, DRAIN CURRENT (mA)
Figure 15. Switching Turn−On Time vs.
Gate−Source Voltage
Figure 16. Switching Turn−Off Time vs.
Drain Current
www.onsemi.com
5
10
J111, J112, J113, MMBFJ111, MMBFJ112, MMBFJ113
ORDERING INFORMATION
Part Number
Top Mark
Package
Shipping†
J111
AJ
111
YWW
TO−92 3L
(Pb−Free)
10000 Units / Bulk
J111−D26Z
AJ
111
YWW
TO−92 3L
(Pb−Free)
2000 / Tape & Reel
J111−D74Z
AJ
111
YWW
TO−92 3L
(Pb−Free)
2000 / Ammo
J112
AJ
112
YWW
TO−92 3L
(Pb−Free)
10000 Units / Bulk
J112−D26Z
AJ
112
YWW
TO−92 3L
(Pb−Free)
2000 / Tape & Reel
J112−D27Z
AJ
112
YWW
TO−92 3L
(Pb−Free)
2000 / Tape & Reel
J112−D74Z
AJ
112
YWW
TO−92 3L
(Pb−Free)
2000 / Ammo
J113
AJ
113
YWW
TO−92 3L
(Pb−Free)
10000 Units / Bulk
J113−D74Z
AJ
113
YWW
TO−92 3L
(Pb−Free)
2000 / Ammo
MMBFJ111
6P
SOT−23 3L
(Pb−Free)
3000 / Tape & Reel
MMBFJ112
6R
SOT−23 3L
(Pb−Free)
3000 / Tape & Reel
MMBFJ113
6S
SOT−23 3L
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−92 3 4.825x4.76
CASE 135AN
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13880G
TO−92 3 4.825X4.76
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−92 3 4.83x4.76 LEADFORMED
CASE 135AR
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13879G
DATE 30 SEP 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
TO−92 3 4.83X4.76 LEADFORMED
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D
0.25
3
E
1
2
T
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
HE
T
L
3X b
L1
VIEW C
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXMG
G
1
3X
2.90
3X
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
0.90
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.95
PITCH
0.80
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. NO CONNECTION PIN 1. CATHODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. GATE
3. ANODE
3. CATHODE−ANODE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23
CASE 318BM
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13784G
SOT−23
DATE 31 AUG 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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