LM337
1.5 A, Adjustable Output,
Negative Voltage Regulator
The LM337 is an adjustable 3−terminal negative voltage regulator
capable of supplying in excess of 1.5 A over an output voltage range of
−1.2 V to − 37 V. This voltage regulator is exceptionally easy to use
and requires only two external resistors to set the output voltage.
Further, it employs internal current limiting, thermal shutdown and
safe area compensation, making it essentially blow−out proof.
The LM337 serves a wide variety of applications including local, on
card regulation. This device can also be used to make a programmable
output regulator, or by connecting a fixed resistor between the
adjustment and output, the LM337 can be used as a precision current
regulator.
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THREE−TERMINAL
ADJUSTABLE NEGATIVE
VOLTAGE REGULATOR
MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
Output Current in Excess of 1.5 A
Output Adjustable between −1.2 V and −37 V
Internal Thermal Overload Protection
Internal Short Circuit Current Limiting Constant with Temperature
Output Transistor Safe−Area Compensation
Floating Operation for High Voltage Applications
Eliminates Stocking many Fixed Voltages
Available in Surface Mount D2PAK and Standard 3−Lead Transistor
Package
These Devices are Pb−Free and are RoHS Compliant
D2PAK
D2T SUFFIX
CASE 936
Heatsink surface (shown as terminal 4 in
case outline drawing) is connected to Pin 2.
Pin 1. Adjust
2. Vin
3. Vout
IPROG
Cin*
1.0 mF
R2
+
CO**
1.0 mF
R1
120
+
TO−220AB
T SUFFIX
CASE 221AB
IAdj
Heatsink surface
connected to Pin 2.
Vin
Vout
LM337
-Vin
-Vout
*Cin is required if regulator is located more than 4 inches from power supply filter.
*A 1.0 mF solid tantalum or 10 mF aluminum electrolytic is recommended.
**CO is necessary for stability. A 1.0 mF solid tantalum or 10 mF aluminum electrolytic
**is recommended.
ǒ
LM
337yyyy
AWLYWWG
Ǔ
R
V out + –1.25V 1 ) 2
R1
LM
337xx
AWLYWWG
1
xx
yyyy
A
WL
Y
WW
G
= BT, T
= BD2T, D2T
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Figure 1. Standard Application
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 10
1
Publication Order Number:
LM337/D
LM337
MAXIMUM RATINGS (TA = +25°C, unless otherwise noted)
Symbol
Value
Unit
VI−VO
40
Vdc
PD
qJA
qJC
Internally Limited
65
5.0
W
°C/W
°C/W
PD
qJA
qJC
Internally Limited
70
5.0
W
°C/W
°C/W
Operating Junction Temperature Range
TJ
−40 to +125
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Rating
Input−Output Voltage Differential
Power Dissipation
Case 221A
TA = +25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Case 936 (D2PAK)
TA = +25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (|VI−VO| = 5.0 V; IO = 0.5 A for T package; TJ = Tlow to Thigh [Note 1]; Imax and Pmax [Note 2].)
Figure
Characteristics
Symbol
Min
Typ
Max
Unit
−
0.01
0.04
%/V
−
−
15
0.3
50
1.0
mV
% VO
Regtherm
−
0.003
0.04
% VO/W
Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ |VI−VO| ≤ 40 V
1
Regline
Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax
|VO| ≤ 5.0 V
|VO| ≥ 5.0 V
2
Regload
Thermal Regulation, TA = +25°C (Note 5), 10 ms Pulse
3
IAdj
−
65
100
mA
1, 2
DIAdj
−
2.0
5.0
mA
Reference Voltage, TA = +25°C, 3.0 V ≤ |VI−VO| ≤ 40 V,
10 mA ≤ IO ≤ Imax, PD ≤ Pmax, TJ = Tlow to Thigh
3
Vref
−1.213
−1.20
−1.250
−1.25
−1.287
−1.30
V
Line Regulation (Note 3), 3.0 V ≤ |VI−VO| ≤ 40 V
1
Regline
−
0.02
0.07
%/V
Load Regulation (Note 3), 10 mA ≤ IO ≤ Imax
|VO| ≤ 5.0 V
|VO| ≥ 5.0 V
2
Regload
−
−
20
0.3
70
1.5
mV
% VO
Temperature Stability (Tlow ≤ TJ ≤ Thigh)
3
TS
−
0.6
−
% VO
Minimum Load Current to Maintain Regulation
(|VI−VO| ≤ 10 V)
(|VI−VO| ≤ 40 V)
3
ILmin
−
−
1.5
2.5
6.0
10
Maximum Output Current
|VI−VO| ≤ 15 V, PD ≤ Pmax, T Package
|VI−VO| ≤ 40 V, PD ≤ Pmax, TJ = +25°C, T Package
3
−
−
1.5
0.15
2.2
0.4
−
0.003
−
−
66
60
77
−
−
S
−
0.3
1.0
%/1.0 k
Hrs.
RqJC
−
4.0
−
°C/W
Adjustment Pin Current
Adjustment Pin Current Change, 2.5 V ≤ |VI−VO| ≤ 40 V,
10 mA ≤ IL ≤ Imax, PD ≤ Pmax, TA = +25°C
RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz
Imax
N
Ripple Rejection, VO = −10 V, f = 120 Hz (Note 4)
Without CAdj
CAdj = 10 mF
4
Long−Term Stability, TJ = Thigh (Note 6), TA = +25°C for
Endpoint Measurements
3
Thermal Resistance, Junction−to−Case, T Package
mA
A
RR
% VO
dB
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Tlow to Thigh = 0° to +125°C, for LM337T, D2T. Tlow to Thigh = − 40° to +125°C, for LM337BT, BD2T.
2. Imax = 1.5 A, Pmax = 20 W
3. Load and line regulation are specified at constant junction temperature. Change in VO because of heating effects is covered under the
Thermal Regulation specification. Pulse testing with a low duty cycle is used.
4. CAdj, when used, is connected between the adjustment pin and ground.
5. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die.
These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these
temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.
6. Since Long Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.
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2
LM337
Representative Schematic Diagram
Adjust
60
100
2.0k
2.5k
810
21k
Vout
10k
800
15pF
25pF
220
5.0k
75
0
60k
100k
2.0k
15pF
800
18k
4.0k
6.0k
100
1.0k
2.2k
3.0k
9.6k
18k
270
240
5.0pF
100pF
30k
2.0
pF 250
20k
5.0k
8.0k
0.2
100k
600
15
2.9k
4.0k
155
2.4k
500
15
0.05
500
Vin
This device contains 39 active transistors.
R2
1%
+
Cin
1.0 mF
CO
IAdj
*Pulse testing required.
1% Duty Cycle
is suggested.
120
1%
R1
Adjust
Vin
1.0 mF
RL
Vout
LM337
VIH
VIL
*
VEE
VOH
VOL
LineRegulation(%ńV) +
|V
–V |
OL OH
x100
|V |
OH
Figure 1. Line Regulation and DIAdj/Line Test Circuit
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3
LM337
*Pulse testing required.
1% Duty Cycle is suggested.
1%
R2
CO +
Cin
1.0 mF
IAdj
R1
1.0 mF
120
*
Adjust
-VI
Vin
Vout
LM337
RL
(max
Load)
-VO (min Load)
-VO (max Load)
IL
Load Regulation (mV) = VO (min Load) - VO (max Load)
Load Regulation (% VO) =
VO (min Load) - VO (max Load)
VO (min Load)
x 100
Figure 2. Load Regulation and DIAdj/Load Test Circuit
1%
R2
VI
CO
1.0 mF
Cin
Vref
R1
Adjust
Vin
LM337
R2 =
VO
RL
IAdj
To Calculate R2:
+
1.0 mF
VO
Vref
This assumes IAdj is negligible.
Vout
120
IL
R1
-1
* Pulse testing required.
* 1% Duty Cycle is suggested.
Figure 3. Standard Test Circuit
+
R2
Cin
CAdj
1%
1.0 mF
CO
Adjust
Vin
10mF
LM337
120
R1
D1*
+
1.0 mF
RL
VO
1N4002
Vout
Vout = -1.25 V
14.3 V
4.3 V
* D1 Discharges CAdj if output is shorted to Ground.
f = 120 Hz
Figure 4. Ripple Rejection Test Circuit
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4
0.2
4.0
0
IL = 0.5 A
-0.2
I out , OUTPUT CURRENT (A)
ΔV out , OUTPUT VOLTAGE CHANGE (%)
LM337
-0.4
-0.6
-0.8
Vin = -15 V
Vout = -10 V
-1.0
IL = 1.5 A
3.0
2.0
TJ = 25°C
1.0
-1.2
-1.4
0
-50
-25
0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE (°C)
150
0
10
20
30
Vin-Vout , INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
Figure 5. Load Regulation
Figure 6. Current Limit
3.0
V in - Vout , INPUT-OUTPUT VOLTAGE
DIFFERENTIAL (Vdc)
IAdj, ADJUSTMENT CURRENT (μA)
80
75
70
65
60
55
50
45
40
Vout = -5.0 V
DVO = 100 mV
2.5
IL = 1.5 A
2.0
1.0 A
500 mA
1.5
200 mA
20 mA
1.0
-50
-25
0
25
50 75
100 125
TJ, JUNCTION TEMPERATURE (°C)
150
-50
Figure 7. Adjustment Pin Current
-25
0
25
50 75
100 125
TJ, JUNCTION TEMPERATURE (°C)
150
Figure 8. Dropout Voltage
I B , QUIESCENT CURRENT (mA)
V ref , REFERENCE VOLTAGE (V)
1.27
1.26
1.25
1.24
1.8
1.6
1.4
1.2
1.0
TJ = 25°C
0.8
0.6
0.4
0.2
1.23
40
-50
-25
0
25
50 75
100 125
TJ, JUNCTION TEMPERATURE (°C)
0
150
0
Figure 9. Temperature Stability
10
20
30
40
Vin-Vout , INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
Figure 10. Minimum Operating Current
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5
LM337
100
CAdj = 10 mF
80
60
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
100
Without CAdj
40
Vin - Vout = 5.0 V
IL = 500 mA
f = 120 Hz
TJ = 25°C
20
-5.0
-10
-15
-20
-25
Vout, OUTPUT VOLTAGE (V)
-30
-35
40
0
0.01
-40
10
101
CAdj =10 mF
Z O , OUTPUT IMPEDANCE ()
Ω
Vin = -15 V
Vout = -10 V
IL = 500 mA
TJ = 25°C
80
60
40
Without CAdj
20
10
100
1.0 k
10 k
100 k
1.0 M
10-1
Without CAdj
CAdj = 10 mF
10-2
10-3
10 M
Vin = -15 V
Vout = -10 V
IL = 500 mA
CL = 1.0 mF
TJ = 25°C
100
f, FREQUENCY (Hz)
1.0 k
10 k
f, FREQUENCY (Hz)
Figure 13. Ripple Rejection versus Frequency
Figure 14. Output Impedance
ΔV out , OUTPUT
VOLTAGE DEVIATION (V)
RR, RIPPLE REJECTION (dB)
0.8
0.6
0.4
0.2
0
Without CAdj
CAdj = 10 mF
-0.2
-0.4
I L , LOAD
CURRENT (A)
ΔV in, INPUT
ΔV out , OUTPUT
VOLTAGE CHANGE (V) VOLTAGE DEVIATION (V)
0.1
1.0
IO, OUTPUT CURRENT (A)
Figure 12. Ripple Rejection versus Output Current
100
Vout = -10 V
IL = 50 mA
TJ = 25°C
CL = 1.0 mF
0
-0.5
-1.0
Vin = -15 V
Vout = -10 V
f = 120 Hz
TJ = 25°C
20
Figure 11. Ripple Rejection versus Output Voltage
0
Without CAdj
60
0
0
CAdj = 10 mF
80
0
10
20
30
10
100
100 k
0.6
0.4
Without CAdj
0.2
0
CAdj = 10 mF
-0.2
-0.4
-0.6
Vin = -15 V
Vout = -10 V
IL = 50 mA
TJ = 25°C
CL = 1.0 mF
0
-0.5
-1.0
-1.5
40
0
10
20
30
t, TIME (ms)
t, TIME (ms)
Figure 15. Line Transient Response
Figure 16. Load Transient Response
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6
1.0 M
40
LM337
APPLICATIONS INFORMATION
Basic Circuit Operation
External Capacitors
The LM337 is a 3−terminal floating regulator. In
operation, the LM337 develops and maintains a nominal
−1.25 V reference (Vref) between its output and adjustment
terminals. This reference voltage is converted to a
programming current (IPROG) by R1 (see Figure 17), and this
constant current flows through R2 from ground.
The regulated output voltage is given by:
ǒ
A 1.0 mF tantalum input bypass capacitor (Cin) is
recommended to reduce the sensitivity to input line
impedance.
The adjustment terminal may be bypassed to ground to
improve ripple rejection. This capacitor (CAdj) prevents
ripple from being amplified as the output voltage is
increased. A 10 mF capacitor should improve ripple
rejection about 15 dB at 120 Hz in a 10 V application.
An output capacitance (CO) in the form of a 1.0 mF
tantalum or 10 mF aluminum electrolytic capacitor is
required for stability. Using the classical tantalum or
aluminum electrolytic capacitor types with non−reduced
ESR (Equivalent Series Resistance) value is necessary.
Low−ESR or similar capacitor types with reduced ESR
value and ceramic capacitors can cause instability or
continuous oscillations in the application.
Ǔ
R
V out + V 1 ) 2 ) I R 2
ref
Adj
R1
Since the current into the adjustment terminal (IAdj)
represents an error term in the equation, the LM337 was
designed to control IAdj to less than 100 mA and keep it
constant. To do this, all quiescent operating current is
returned to the output terminal. This imposes the
requirement for a minimum load current. If the load current
is less than this minimum, the output voltage will rise.
Since the LM337 is a floating regulator, it is only the
voltage differential across the circuit which is important to
performance, and operation at high voltages with respect to
ground is possible.
Protection Diodes
When external capacitors are used with any IC regulator
it is sometimes necessary to add protection diodes to prevent
the capacitors from discharging through low current points
into the regulator.
Figure 18 shows the LM337 with the recommended
protection diodes for output voltages in excess of −25 V or
high capacitance values (CO > 25 mF, CAdj > 10 mF). Diode
D1 prevents CO from discharging thru the IC during an input
short circuit. Diode D2 protects against capacitor CAdj
discharging through the IC during an output short circuit.
The combination of diodes D1 and D2 prevents CAdj from
the discharging through the IC during an input short circuit.
+ Vout
R2
IPROG
IAdj
+
CO
Adjust
Vin
LM337
Vref
R1
Vout
- Vout
Vref = -1.25 V Typical
Figure 17. Basic Circuit Configuration
+ Vout
+
R2
CAdj
+
+
CO
Cin
Load Regulation
Adjust
The LM337 is capable of providing extremely good load
regulation, but a few precautions are needed to obtain
maximum performance. For best performance, the
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be returned
near the load ground to provide remote ground sensing and
improve load regulation.
-Vin
R1
LM337
Vin
Vout
D2
1N4002
- Vout
D1
1N4002
Figure 18. Voltage Regulator with Protection Diodes
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7
3.5
JUNCTION‐TO‐AIR (°C/W)
R θ JA, THERMAL RESISTANCE
80
PD(max) for TA = +50°C
70
3.0
Free Air
Mounted
Vertically
60
2.0 oz. Copper
L
Minimum
Size Pad
50
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
2.5
2.0
L
40
1.5
RqJA
1.0
30
0
5.0
10
15
20
L, LENGTH OF COPPER (mm)
25
30
Figure 19. D2PAK Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
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8
PD, MAXIMUM POWER DISSIPATION (W)
LM337
LM337
ORDERING INFORMATION
Device
Operating Temperature Range
LM337BD2TG
LM337BD2TR4G
TJ = − 40° to +125°C
Package
Shipping†
D2PAK
(Pb−Free)
50 Units / Rail
D2PAK
(Pb−Free)
800 / Tape & Reel
LM337BTG
TO−220AB
(Pb−Free)
LM337D2TG
D2PAK
(Pb−Free)
LM337D2TR4G
TJ = 0° to +125°C
LM337TG
50 Units / Rail
D2PAK
(Pb−Free)
800 / Tape & Reel
TO−220AB
(Pb−Free)
50 Units / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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9
LM337
PACKAGE DIMENSIONS
D2PAK
CASE 936−03
ISSUE D
T
C
A
K
S
B
2
C
OPTIONAL
CHAMFER
ES
V
H
1
U
ED
OPTIONAL
CHAMFER
T
TERMINAL 4
DETAIL C
DETAIL C
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. TAB CONTOUR OPTIONAL WITHIN
DIMENSIONS A AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
5. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH OR GATE PROTRUSIONS. MOLD
FLASH AND GATE PROTRUSIONS NOT TO
EXCEED 0.025 (0.635) MAXIMUM.
6. SINGLE GAUGE DESIGN WILL BE SHIPPED
AFTER FPCN EXPIRATION IN OCTOBER 2011.
J
F
G
SIDE VIEW
2X
TOP VIEW
D
0.010 (0.254)
N
M
P
R
L
SIDE VIEW
BOTTOM VIEW
SINGLE GAUGE
CONSTRUCTION
DUAL GAUGE
CONSTRUCTION
T
M
T
SEATING
PLANE
BOTTOM VIEW
DETAIL C
OPTIONAL CONSTRUCTIONS
SOLDERING FOOTPRINT*
10.49
8.38
16.155
2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
DIM
A
B
C
D
ED
ES
F
G
H
J
K
L
M
N
P
R
S
U
V
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.018
0.026
0.051 REF
0.100 BSC
0.539
0.579
0.125 MAX
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
5 _ REF
0.116 REF
0.200 MIN
0.250 MIN
MILLIMETERS
MIN
MAX
9.804 10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
0.457
0.660
1.295 REF
2.540 BSC
13.691 14.707
3.175 MAX
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
5 _ REF
2.946 REF
5.080 MIN
6.350 MIN
LM337
PACKAGE DIMENSIONS
TO−220, SINGLE GAUGE
CASE 221AB
ISSUE A
−T−
B
SEATING
PLANE
C
F
T
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS
S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.020
0.024
0.235
0.255
0.000
0.050
0.045
----0.080
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
0.508
0.61
5.97
6.47
0.00
1.27
1.15
----2.04
ON Semiconductor and the
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SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
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11
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