Voltage Regulators
AN8011S
2-channel step-down, step-up, or inverting use
DC-DC converter control IC
Unit: mm
■ Overview
10.1±0.3
9
4.2±0.3
6.5±0.3
16
(0.15)
The AN8011S is a DC-DC converter control IC
with two-channel output using the PWM method
which allows 500 kHz high-speed control.
Respective output operation can be completely
synchronized with each other by using the same
oscillation output.
1
8
■ Features
1.5±0.2
0.3
0.1±0.1
• PWM control frequency of 500 kHz is available.
• Wide operating supply voltage range
1.27
0.4
0.40±0.25
(VCC = 3.6 V to 34 V)
Seating plane
Seating plane
• Built-in 2-channel of open collector type for output (A single-channel is also usable for inverted
SOP016-P-0225A
amplification type)
Note) The package of this product will be changed to lead-free type
• Each output can be stopped independently by the
(SOP016-P-0225E). See the new package dimensions section
external control .
later of this datasheet.
• Built-in on/off function for the operation/stop of
IC Incorporating circuit for short-circuit protection and under-voltage lock-out (U.V.L.O.)
• The latch circuit is externally controllable.
• Low consumption current (during operation: 5 mA, during standby: 2 µA)
■ Applications
8
VCC
9
Out1
10
7
DTC1
11
FB1
12
IN−1
13
IN+
14
15 Latch
16
■ Block Diagram
VREF
• LCD displays, digital still cameras, and PDAs
Error amp.
Latch
VREF
PWM1
Unlatch pro.
Short pro.
U.V.L.O.
Unlatch pro.
PWM2
OSC
Publication date: December 2001
GND
Out2
6
DTC2
5
SDH00002BEB
FB2
4
Error amp.
IN−2
3
On/Off
2
RT
CT
1
On/
Off
1
AN8011S
■ Pin Descriptions
2
Pin No.
Symbol
Description
1
CT
Pin for connecting the oscillation frequency setting capacitor for triangular oscillation
circuit. Frequency of triangular oscillation is set by connecting a capacitor between this
terminal and GND.
2
RT
Resistor connection pin for setting the oscillation frequency of triangular oscillation
circuit. Frequency of triangular oscillation is set by connecting resistance between the
pin and GND
3
On/Off
"On/Off" pin for turning on/off IC. "Low" stops IC (output off) and "High" operates IC.
4
IN−2
Inverted input pin for channel 2 error amplifier
5
F/B 2
Output pin for channel 2 error amplifier. Gain setting or phase compensation is performed by connecting resistor or capacitor between the pin and IN−2. It is also connected
to PWM short-circuit protection.
6
DTC 2
Pin for setting dead-time period of channel 2. The dead-time of channel 2 is set by connecting external resistor. Soft start function can be also given by connecting capacitor in
parallel with the external resistor. In addition, only channel 2 output can be turned off by
decreasing the pin voltage to below 0.12 V. (short-circuit protection function stop circuit)
7
Out 2
Channel 2 open-collector type output pin. IO = 100 mA maximum
8
GND
Grounding pin of signal system.
9
VCC
Power supply voltage application pin. It detects start voltage and stop voltages
10
Out 1
Channel 1 open-collector type output pin. IO = 100 mA maximum
11
DTC 1
Pin for setting dead-time period of channel 1. The dead-time period of channel 1 is set by
connecting external resistor. Soft start function can be also given by connecting capacitor in
parallel with the external resistor. In addition, only channel 1 output can be turned off by
decreasing the pin voltage to below 0.12 V. (short-circuit protection function stop circuit)
12
F/B 1
Output pin for channel 1 error amplifier. Gain setting or phase compensation is performed by connecting resistor or capacitor between the pin and IN−1. It is also connected
to PWM short-circuit protection.
13
IN−1
Inverted input pin for channel 1 error amplifier.
14
IN+
Pin for noninverted input of channel 1 error amplifier.
15
Latch
Pin for connecting the time constant setting capacitor for timer latch type short-circuit
protection circuit. The time constant for short-circuit protection is set by connecting a capacitor between this terminal and GND.
16
VREF
Internal reference voltage output pin (2.5 V (allowance: ±3%)). If a load of 20 mA typical
or more is applied, the overcurrent protection operates to reduce VREF and switching
operation stops.
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AN8011S
■ Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Rating
Unit
VCC
35
V
PD
380
mW
Operating ambient temperature
Topr
−30 to +85
°C
Storage temperature
Tstg
−40 to +125
°C
Supply voltage
Power dissipation
*
Note) 1. Do not apply external currents or voltages to any pins not specifically mentioned.
For circuit currents, '+' denotes current flowing into the IC, and '−' denotes current flowing out of the IC.
2 * : When using the IC at Ta of 25°C or more, the power dissipation should be decreased 3.8 mW per 1°C.
■ Recommended Operating Range
Parameter
Supply voltage
Symbol
Range
Unit
VCC
3.6 to 34
V
■ Electrical Characteristics at VCC = 12 V, Ta = 25°C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
2.413
2.5
2.588
V
Reference voltage block
Output voltage
VREF
Input regulation with input fluctuation
Line
VCC = 3.6 V to 34 V
3
20
mV
Load regulation
Load
IREF = 0 mA to 5 mA
2
10
mV
Output voltage temperature
characteristics 1 *
VTC1
Ta = −25°C to + 25°C
±1
%
Output voltage temperature
characteristics 2 *
VTC2
Ta = 25°C to 85°C
±1
%
ICC
−20
mA
Circuit operation start voltage
VUON
2.8
3.1
3.4
V
Hysteresis width
VHYS
100
200
300
mV
VIN-O1
−6
6
mV
IB1
−500
−25
100
nA
Common-mode input voltage range
VCM
0.5
0.8
V
High-level output voltage 1
VEH1
VREF − 0.3
V
Low-level output voltage 1
VEL1
0.5
V
IB2
25
100
nA
Common mode input threshold voltage
VIN+
0.72
0.75
0.78
V
High-level output voltage 2
VEH2
VREF − 0.3
V
Low-level output voltage 2
VEL2
0.5
V
Overcurrent protection drive current *
U.V.L.O. block
Error amplifier block 1
Input offset voltage 1
Input current 1
Error amplifier block 2
Input current 2
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3
AN8011S
■ Electrical Characteristics at VCC = 12 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
PWM comparator 1/2 block
High-level input threshold voltage
VDT-H
fOSC = 200 kHz, duty = 100%
1.2
V
Low-level input threshold voltage
VDT-L
fOSC = 200 kHz, duty = 100%
0.6
V
Input current
IDTC
RT = 20 kΩ
−37
−34
−31
µA
fOUT1
CT = 150 pF, RT = 20 kΩ, IO = 30 mA
180
200
220
kHz
Output 1/2 block
Output frequency 1
Frequency 1
fdv
VCC = 3.6 V to 34 V
CT = 150 pF, RT = 20 kΩ
−2
2
%
Output duty ratio 1
Du1
CT = 150 pF, RT = 20 kΩ, RDTC = 24 kΩ
40
45
50
%
Output duty ratio 2
Du2
CT = 150 pF, RT = 20 kΩ, RDTC = 33 kΩ
65
75
85
%
Output saturation voltage 1
VO(sat)1
IO = 30 mA
0.9
V
Output saturation voltage 2
VO(sat)2
IO = 100 mA
1.2
V
Output leak current 1
IOLe1
VCC = 34 V, when output
transistor is off
10
µA
Frequency temperature characteristics 1 *
fdT1
fOSC = 200 kHz, Ta = −30°C to +25°C
±9
%
Frequency temperature characteristics 2 *
fdT2
fOSC = 200 kHz, Ta = 25°C to 85°C
±9
%
fOUT2
CT = 150 pF, RT = 6.6 kΩ, IO = 30 mA
500
kHz
VCC = 3.6 V to 34 V,
CT = 150 pF, RT = 6.6 kΩ
±2
%
Output frequency 2
Frequency 2
*
*
fdv2
Short-circuit protection block
Input threshold voltage
VSLTH
1.75
1.85
1.95
V
Latch drive voltage
VSLON
1.15
1.25
1.35
V
ICHG
−120
−50
−40
µA
VULTH
0.12
V
VTH
0.8
2
V
VCC = 12 V, RT = 20 kΩ
5
7
mA
Total consumption current fluctuation
ICC(max.) VCC = 3.6 V to 34 V, RT = 20 kΩ
2
mA
Standby consumption current
ICC(SB)
VCC = 12 V, VREF is down
2
µA
Maximum standby consumption current ICC(SB-M) VCC = 34 V, VREF is down
5
µA
Charge current
Unlatch pro. 1/2 block
Input threshold voltage
On/off block
Threshold voltage
Whole device
Total consumption current
ICC
Note) *: These characteristics are theoretical values based on the IC design and are not guaranteed.
4
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AN8011S
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
1
VREF 16
To PWM input
IO
CT
1
OSC
comp.
2IO
2
VREF
16
OSC
PWM
Description
I/O
CT:
The terminal used for connecting a timing
capacitor to set oscillator frequency. Use a
capacitance value within the range of 100 pF
to 0.1 mF. For frequency setting method,
refer to the "Application Notes, [2] Function
descriptions" section. Use the oscillation frequency in the range of 1 kHz to 500 kHz.
O
RT:
The terminal used for connecting a timing
resistor to set oscillation frequency.
Use a resistance value ranging from 5.1 kΩ
to 20 kΩ.
The terminal voltage is 0.67 V typ.
I
On/Off:
The terminal for on/off control.
High-level input: normal operation
(VON/OFF > 2.0 V typ.)
Low-level input: standby state
(VON/OFF < 0.8 V typ.)
The total current consumption in the standby
state can be suppressed to a value below 5 µA.
I
IN−2:
The terminal for the inverted input of ch.2
error amplifier. Use a common-mode input
ranging from − 0.1 V to 0.8 V.
I
2 RT (= 0.67 V)
3
Internal
circuit start/stop
On/Off
17 kΩ
3
13 kΩ
4
VREF
16
0.75 V
4
IN−2
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5
AN8011S
■ Terminal Equivalent Circuits (continued)
Pin No.
5
Equivalent circuit
VREF 16
25 µA typ.
PWM2
CT
8 mA
typ.
Description
I/O
FB2:
The output terminal of ch.2 error amplifier.
Its source current is −25 µA typ. and sink
current is 8 mA typ.
Correct the frequency characteristics of the
gain and the phase by connecting a resistor
and a capacitor between the terminal and
IN−2 terminal.
O
DTC2:
1) Terminal for connecting a resistor and a
capacitor for setting the dead-time and the
soft start period of ch.2 PWM output.
Input current IDTC is determined by the timing resistor RT so that dispersion, and fluctuation with temperature are suppressed. The
input current is −35 µA typ.
when RT = 20 kΩ
VRT
IDTC2 =
× 1.04 (A)
RT
(VRT: 0.67 V typ.)
2) The ch.2 output can be turned off by reducing the terminal voltage to below 0.12 V.
(short-circuit protection function stop)
I
Out2:
The ch.2 open-collector type (Darlington)
output terminal.
The absolute maximum rating of output current is 150 mA.
Use with an output current under 100 mA
normally.
O
GND:
GND pin
VCC:
The pin to which supply voltage is applied.
Use within an operating supply voltage range
of 3.6 V to 34 V.
5 FB2
6
VREF 16
IDTC2
CT
PWM2
U.V.L.O.
output
6 DTC2
7
VREF 16
Out2
7
8
8
GND
9
9
VCC
6
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AN8011S
■ Terminal Equivalent Circuits (continued)
Pin No.
10
Equivalent circuit
VREF 16
Out1
10
11
VREF 16
IDTC1
CT
PWM1
U.V.L.O.
output
11 DTC1
12
VREF 16
25 µA typ.
CT
PWM1
8 mA
typ.
Description
I/O
Out1:
The ch.1 open collector type (darlington)
output terminal.
The absolute maximum rating of output current is 150 mA.
Use with an output current of 100 mA or less
normally.
O
DTC1:
1) Terminal for connecting a resistor and a
capacitor for setting the dead-time and the soft
start period of ch.1 PWM output.
Input current IDTC is determined by the timing resistor RT so that dispersion and fluctuation with temperature are suppressed. The
input current is −35 µA typ, when RT = 20 kΩ.
VRT
IDTC2 =
× 1.04 (A)
RT
(VRT: 0.67 V typ.)
2) The ch.1 output can be turned off by reducing the terminal voltage to below 0.12 V.
(short-circuit protection function stop)
I
FB1:
The output terminal of ch.1 error amplifier.
Its source current is −25 µA typ. and sink
current is 8 mA typ.
Correct the frequency characteristics of the
gain and the phase by connecting a resistor
and a capacitor between the terminal and
IN−1 terminal.
O
IN−1:
The terminal for the inverted input of ch.1
error amplifier. Use a common-mode input
ranging from − 0.1 V to +0.8 V.
I
IN+:
The terminal for noninverted input of ch.1
error amplifier. Use a common-mode input
ranging from − 0.1 V to +0.8 V.
I
12 FB1
13
VREF
14
13
14
IN − 1
IN +
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7
AN8011S
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
15
VREF 16
ICHG
4.2 kΩ
typ.
Latch
S
R
30 kΩ
10kΩ typ.
typ.
1.25 V
typ.
I/O
Latch:
Terminal for connecting the time constant
setting capacitor for timer latch short-circuit
protection circuit. The charge current ICHG is
about −80 µA.
O
VREF:
The output terminal for the reference voltage
(2.5 V typ.).
Use it with a load current of −1 mA or under.
The terminal has a built-in short-circuit protection circuit, and the short-circuit current
is −20 mA typ.
Use the terminal for setting the reference input of the error amplifier.
O
Q
1.25 V
typ.
15 Latch
16
VCC 9
VREF overcurrent
detection
Bias to
other blocks
16 VREF
8
Description
SDH00002BEB
AN8011S
■ Application Notes
[1] Main characteristics
Reference voltage temperature characteristics
Maximum duty ratio temperature characteristics
54
Maximum duty ratio Du(45) (%)
Reference voltage VREF (V)
2.500
2.495
2.490
2.485
2.480
−40
−20
0
20
40
60
80
53
52
51
50
49
−40
100
209
90
208
80
Output duty ratio (%)
Output frequency fOUT (kHz)
100
207
206
205
204
203
50
60
60
80
100
80
fOUT = 200 kΩ
30
20
40
fOUT = 500 kΩ
40
10
20
40
60
201
0
20
70
202
−20
0
DTC pin voltage Output duty ratio
Output frequency temperature characteristics
210
200
−40
−20
Ambient temperature Ta (°C)
Ambient temperature Ta (°C)
0
100
0
Ambient temperature Ta (°C)
0.5
1
1.5
DTC pin voltage (V)
Output frequency characteristics
Output frequency fOUT (kHz)
500
100
RT = 10 kΩ
RT = 5.1 kΩ
RT = 20 kΩ
10
0
102
103
104
105
CT (pF)
SDH00002BEB
9
AN8011S
■ Application Notes (continued)
[2] Function descriptions
1. Reference voltage block
This block is composed of the band gap circuit, and outputs the temperature compensated 2.5 V reference
voltage to the VREF terminal. The reference voltage is stabilized when the supply voltage is 3.6 V or higher, and
used as the operating power supply for the IC inside. It is possible to take out a load current of up to −3 mA. Also,
an overcurrent protection circuit is built in for the load, thereby protecting the IC from destruction when VREF
terminal is short circuited.
2. Triangular wave oscillation block
The triangular wave which swings from the wave peak of approximately 1.4 V to the wave bottom of
approximately 0.4 V will be generated by connecting a timing capacitor and a resistor to the CT terminal and RT
terminal respectively. The oscillation frequency can be freely decided by the value of CT and RT connected
externally. The triangular wave is connected with the inverted input of PWM comparator of the IC inside.
3. Error amplifier block
This block detects the output voltage of DC-DC converter, and inputs the signal amplified by the pnp transistor
input type differential amplifier to the PWM comparator.
The common-mode input voltage range is − 0.1 V to 0.8 V, and is a voltage obtained by dividing the reference
voltage with resistors.
Also, it is possible to perform the gain setting and the phase compensation arbitrarily by connecting the
feedback resistor and the capacitor from the error amplifier output terminal to the inverted input terminal.
The output voltage VOUT, if positive, is obtained by connecting the resistor-divided reference voltage to the
noninverted input terminal as shown in figure 1. 1), and the output voltage VOUT, if negative, is obtained by
connecting to the inverted input terminal as shown in figure 1. 2). The output voltages in each of these cases are
given in the following equations.
R1 + R2
R3 + R4
VOUT1 = VIN ×
VOUT1 = − (VREF − VIN-1 ) ×
+ VREF
R2
R3
R1 + R2
R2
VIN−1 = VREF ×
VIN+ = VREF ×
R2
R1 + R2
VOUT1
R1
R2
VREF 16
VREF 16
R3
Error amp.1 PWM comparator
IN+ 14
input
IN−1 13
12
R4
RNF
FB1
R1
R2
R3
Error amp.1 PWM comparator
IN+ 14
input
IN−1 13
12
R4
RNF
FB1
VOUT1
CNF
CNF
2) Negative output
1) Positive output
Figure 1. Connection method of error amplifier 1
The output voltage of channel 2 VOUT2 is
exclusively for positive voltage output, and
method of connection is as shown in figure 2.
R1 + R2
VOUT2 = 0.75 ×
R2
FB2 5
VOUT2
R1
RNF
VREF: 2.5 V
CNF
R3
0.75V
IN−2 4
Error amp.2 PWM comparator
input
R4
R2
Figure 2. Connection method of error amplifier 2
10
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AN8011S
■ Application Notes (continued)
[2] Function descriptions (continued)
4. Timer latch short-circuit protection circuit
This circuit protects the external main switching devices, switching diodes, choke coils, and etc. from
destruction or deterioration if overload or short-circuit of power supply output lasts for a certain time.
The timer latch type short-circuit protection circuit detects the output level of each error amplifier, and when
the output level of either one or both of the error amplifiers exceeds 1.85 V typical, the timer circuit is actuated,
and initiates charging the external capacitor for protection enable.
If the output of the error amplifier does not return to a normal voltage range by the time when the voltage of
this capacitor reaches 1.25 V, it sets the latch circuit, cuts off the output drive transistor, and sets the dead time to
100%.
5.
Low input voltage malfunction prevention circuit (U.V.L.O.)
This circuit protects the system from destruction or deterioration due to control malfunction caused by the
supply voltage reduction in the transient state of power on or off.
The low input voltage malfunction prevention circuit detects the internal reference voltage according to the
supply voltage level, and cuts off the output drive transistor by resetting the latch circuit, thereby setting the deadtime to 100% and keeping the latch terminal low.
6. PWM comparator block
The PWM comparators, each has one inverted input, and two noninverted inputs, and controls the on-period
of output pulse in accordance with the input voltage. It turns on the output transistor during the period when the
triangular wave of CT terminal is lower than either the error amplifier output voltage or the DTC terminal voltage.
The dead-time is set by the addition of a resistor between the DTC terminal and GND. By the addition of a
capacitor in parallel with the external resistor RDTC, the soft start function which gradually extends the on-period
of the output pulse by the RC time constant when the power supply is turned on starts to work.
7. Output block
The output drive transistor is of open-collector type output connected in Darlington circuit of emitter common
GND. The breakdown voltage of the collector output terminal is 34 V and it is possible to obtain up to 100 mA
output current.
8. Remote circuit
It is possible to switch on/off the IC control by an external control signal. When the on/off terminal voltage is
lowered to a value below approximately 0.8 V, the internal reference voltage goes down, thereby the IC control
is stopped and the circuit current is decreased to 5 µA or less. When the on/off terminal voltage is increased to a
value higher than approximately 2.0 V, the internal reference voltage raises and the control operation is started.
[3] The time constant setting method for timer latch type short-circuit protection circuit
Figure 3 shows the block diagram of the protection latch circuit. The comparator for short-circuit protection
compares the output voltage of error amplifier VFB with the reference voltage (1.85 V) at all the time. When the load
conditions of DC-DC converter output is stabilized, there is no fluctuation of error amplifier output, and the shortcircuit protection comparator also keeps the balance. At this moment, the switch SW1 will be in the off state, and the
latch terminal voltage will be kept at approximately 0.9 V typical.
When the load conditions suddenly change, and high-level signal (1.85 V typical of higher) is inputted from the
error amplifier to the noninverted input of the short-circuit protection comparator, the short-circuit protection comparator outputs the high-level signal. This signal turns on the switch SW1, and the charging to the capacitor CS
connected externally to the latch terminal is started with a current of 80 µA typical.
When the external capacitor CS is charged up to approximately 1.25 V typical, the latch circuit is set and the undervoltage lock-out circuit (U.V.L.O.) is enabled, thereby the output drive transistor is cut off and the dead-time is set to
100%.
Once the under-voltage lock-out circuit (U.V.L.O.) is enabled, the latch circuit will not be reset unless the power
supply is switched off.
SDH00002BEB
11
AN8011S
■ Application Notes (continued)
[3] The time constant setting method for timer latch type short-circuit protection circuit (continued)
VREF
FB2
FB1
ICHG
80 µA typ.
5
SW1
Latch comp.
12
1.85 V
4
Latch
4.2 kΩ typ.
30 kΩ
typ.
1.25 V
typ.
10 kΩ
typ.
Cut output off
S R
Latch
R
U.V.L.O.
CS
Figure 3. Short-circuit protection circuit
When the power supply is turned on, the output is considered to be short-circuited state, so that the error amplifier
output becomes high-level, then SW1 becomes on state and the charging starts. It is necessary to set the external
capacitor so as to start up the DC-DC converter output voltage before setting the latch circuit in the later stage.
Especially, pay attention to the delay of the start-up time when applying the soft-start.
[4] Explanation of unlatch protection circuit operation
Figure 4 shows the block diagram of the unlatch protection circuit. It is possible to suppress FB terminal, the error
amplifier output terminal of the channel, to low by setting DTC terminal to 0.12 V or less through external signal.
Consequently, by controlling the DTC terminal voltage, it is possible to operate only one channel, or to start and stop
each channel in any required sequence.
FB1
IN+
IN−1
12
14
5
Error amp.1
To PW1
To PW2
Error amp.2
IDTC1
DTC1
IN−2
IDTC2
11
Unlatch protection
comp.1
6
Unlatch protection
comp.2
0.12 V typ.
0.12 V typ.
Figure 4. Unlatch protection circuit
12
4
13
FB2
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DTC2
AN8011S
■ Application Notes (continued)
[5] Triangular wave oscillation circuit
• Oscillation frequency setting method
The waveform of triangular wave oscillation is obtained by charging and discharging of the constant current IO
from the external timing capacitor CT which is connected to CT terminal. The constant current is set by the externally
attached timing resistor RT .
The peak value of the wave VCTH and the trough
VCTH = 1.4 V typ.
value of the wave VCTL are fixed at approximately 1.4 V
typical and 0.4 V typical respectively.
The oscillation frequency fOSC is obtained by the
following formula;
VCTL = 0.4 V typ.
t1
t2
1
IO
fOSC =
=
2 × CT × (VCTH − VCHL)
Charging Discharging
(typ.) t1 + t2
VRT
0.67
Where IO = 2 ×
=2×
RT
RT
T
Because VCTH − VCTL = 1 V
0.67
Figure 5. Triangular wave oscillation waveform
fOSC =
[Hz]
C
×
R
T
T
(typ.)
The output frequency fOUT is equal to fOSC since it is PWM-controlled.
[6] Dead-time (maximum duty) setting method
The setting of the dead-time is conducted by adjusting the DTC terminal voltage VDTC as shown in figure 6. Since
the DTC terminal provides a constant current output through the resistor RT, VDTC is adjusted by attaching the external
resistor RDTC.
The output duty ratio Du and the DTC terminal voltage VDTC are expressed by the following formula. When the
oscillation frequency fOSC is 200 kHz, the output duty ratio is 0% at VDTC = 0.42 V, and 100% at VDTC = 1.35 V.
Pay attention to the peak value and the trough value of triangular wave because the overshoot and undershoot
voltages depend on the frequency.
CT waveform
VCTH
VREF
DTC waveform
VDTC
IDTC
Out waveform
tOFF
tON
Off
On
VCTL
IDTC =
VRT
× 1.04 [A]
RT
CT
FB
PWM
Off
DTC
tON
Du
=
× 100 [%]
t
ON + tOFF
(typ.)
VCTH −VDTC
=
× 100 [%]
VCTH −VCTL
VDTC = IDTC × RDTC
(typ.)
RDTC
= VRT ×
× 1.04 [V]
RT
RDTC
CDTC
ex.) When fOSC = 200 kHz (RT = 20 kΩ, CT = 150 pF),
VCTH ≈ 1.4 V (typ.) VRT ≈ 0.67 V (typ.)
VCTL ≈ 0.4 V (typ.) IDTL ≈ 35 µA (typ.)
Figure 6. Dead-time setting method
When the capacitor CDTC is added in parallel with the external resistor RDTC, the soft start function gradually extends
the on-period of the output pulse when the power supply is turned on. This prevents the overshoot of the DC-DC
converter output.
SDH00002BEB
13
AN8011S
■ Application Notes (continued)
[7] Timing chart
Supply voltage (VCC)
3.1 V typ.
Lock-out release
3.6 V
Reference voltage (VREF)
2.5 V
Error amplifier output (FB)
1.83 V
Power supply
on
Latch terminal voltage
Triangular wave (CT)
1.3 V
0.9 V
0.40 V
0.03 V
High
Dead-time voltage (VDT)
Low
Output transistor collector
waveform (OUT)
Soft start operation
Maximum duty
Figure 7. Operation waveform of PWM comparator
2.5 V
Reference voltage (VREF)
Short-circuit protection input threshold level
Comparator threshold level
1.85 V
1.4 V
0.9 V
DTC terminal voltage
Latch terminal voltage
Error amplifier output (FB)
0.40 V
Triangular wave (CT)
High
Output transistor collector waveform
(OUT)
Low
Short-circuit protection comparator
output
tPE
High
Low
Figure 8. Operation waveform of short-circuit protection
14
SDH00002BEB
AN8011S
■ Application Circuit Examples
• Application circuit example 1
SBD
3V
33 kΩ
VCC
9 VCC
12 FB1
13 IN−1
14 IN+
15 Latch
16 VREF
120 kΩ
10 Out1
0.01 µF
0.1 µF
7 kΩ
−5 V
11 DTC1
14 kΩ 6 kΩ
23 kΩ
VREF
3V
SBD
f = 200 kHz
Duty = 75%
Error
amp.
Latch
7
5V
25.5 kΩ
PWM1
Unlatch pro.
4.5 kΩ
Short pro.
U.V.L.O.
To pin 4
Unlatch pro.
OSC
PWM2
GND 8
Out2 7
DTC2 6
0.01 µF
3V
33 kΩ
120 kΩ
0.1 µF
FB2 5
Error
amp.
IN−2 4
On/Off 3
20 kΩ 2
RT
CT
150 pF
1
On/
Off
SBD
5V
25.5 kΩ
4.5 kΩ
SDH00002BEB
15
AN8011S
■ Application Circuit Examples
• Application circuit example 2
500 Ω
VIN = 7 V
10 Out1
9 VCC
100 Ω
GND 8
33 kΩ
100 Ω
VCC = 7 V
Out2 7
13 IN−1
14 IN+
15 Latch
16 VREF
10 µF
12 FB1
120 kΩ
2.5 V
11 DTC1
0.01 µF
0.1 µF
3.3 V
Error
amp.
Latch
VREF
PWM1
Unlatch pro.
Short pro.
U.V.L.O.
Unlatch pro.
OSC
PWM2
33 kΩ
0.01 µF
DTC2 6
FB2 5
120 kΩ
0.1 µF
IN−2 4
On/Off 3
20 kΩ 2
Error
amp.
RT
CT
150 pF
1
On/
Off
R
500 Ω
VCC = 7 V
5V
25.5 kΩ
0.75 V
4.5 kΩ
■ New Package Dimensions (Unit: mm)
• SOP016-P-0225E (Lead-free package)
10.09±0.20
9
+0.10
0.15-0.05
6.40±0.30
(1.05)
4.30±0.20
16
0° to 10°
0.50±0.10
Seating plane
16
0.40+0.10
-0.05
0.10±0.10
1.27
1.50±0.20
8
1
(0.60)
SDH00002BEB
Seating plane
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