Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
http://www.semicon.panasonic.co.jp/en/
3 A Synchronous DC-DC Step down Regulator
(VIN = 6 V to 30 V, VOUT = 0.75 V to 5.5 V)
DESCRIPTION
High-Speed Response DC-DC Step Down Regulator
Circuit that employs Hysteretic Control System
Two 25 m (Typ) MOSFETs for High Efficiency at 3 A
Skip (discontinuous) Mode for Light Load Efficiency
Maximum Output Current : 3 A
Input Voltage Range : AVIN = 6 V to 30 V,
PVIN = 6 V to 30 V
Output Voltage Range : 0.75 V to 5.5 V
Selectable Switching Frequency
: 250 kHz, 750 kHz, 1250 kHz
Adjustable Soft Start
Low Operating and Standby Quiescent Current
Power Good Indication for Output Over and
Under Voltage
Built-in Under Voltage Lockout (UVLO),
Thermal Shut Down (TSD),
Over Voltage Detection (OVD),
Under Voltage Detection (UVD),
Over Current Protection (OCP),
Short Circuit Protection (SCP)
24 pin Plastic Quad Flat Non-leaded Package Heat
Slug Down (QFN Type)
(Size : 4 mm 4 mm 0.7 mm, 0.5 mm pitch)
NN30310AA is a synchronous DC-DC Step down
Regulator (1-ch) comprising of a Controller IC and two
power MOSFETs and employs the hysteretic control
system.
By this system, when load current changes suddenly,
it responds at high speed and minimizes the changes
of output voltage.
Since it is possible to use capacitors with small
capacitance and it is unnecessary to add external parts
for system phase compensation, this IC realizes
downsizing of set and reducing in the number of
external parts. Output voltage is adjustable by user.
Maximum current is 3 A.
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Efficiency (%)
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M
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FEATURES
APPLICATIONS
High Current Distributed Power Systems such as
・HDDs (Hard Disk Drives)
・SSDs (Solid State Drives)
・PCs
・Game consoles
・Servers
・Security Cameras
・Network TVs
・Home Appliances
・OA Equipment etc.
APPLICATION CIRCUIT EXAMPLE
EFFICIENCY CURVE
VREG
100
90
60
1 µF
SS
AGND PGND
22 µF 2
10 nF
Note : The application circuit is an example. The operation of
the mass production set is not guaranteed. Sufficient
evaluation and verification is required in the design of
the mass production set. The Customer is fully
responsible for the incorporation of the above
illustrated application circuit in the design of the
equipment.
40
30
20
10
0
10.000
VFB
VREG
VOUT = 3.3 V
0.100
LX
1 µH
FCCM/ Vo= 1.05V
FCCM/ Vo= 1.2V
FCCM/ Vo= 1.8V
FCCM/ Vo= 3.3V
FCCM/ Vo= 5.0V
SKIP/ Vo= 1.05V
SKIP/ Vo= 1.2V
SKIP/ Vo= 1.8V
SKIP/ Vo= 3.3V
SKIP/ Vo= 5.0V
50
0.1 µF
0.010
NN30310AA
lan
AVIN
1.000
BST
(p
0.1 µF
10 µF 2
1 k
70
PGOOD
VOUT
AVIN
4.5 k
80
100 k
0.001
EN
PVIN
ed
0.1 µF
10 µF 2
PVIN
IOUT (A)
Condition :
VIN = 12 V, VOUT Setting = 1.05 V, 1.2 V, 1.8 V, 3.3 V, 5.0 V,
Switching Frequency = 750 kHz, FCCM / Skip Mode,
LO = 1 µH, CO = 44 µF (22 µF 2)
Page 1 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
ORDERING INFORMATION
Feature
Package
Output Supply
NN30310AAVB
Maximum Output Current : 3 A
24 pin HQFN
Emboss Taping
M
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tin nc
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Order Number
Supply voltage
Operating free-air temperature
Operating junction temperature
Storage temperature
Input Voltage Range
Output Voltage Range
ESD
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Parameter
e)
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
Unit
Notes
VIN
33
V
*1
Topr
– 40 to + 85
C
*2
Tj
– 40 to + 150
C
*2
Tstg
– 55 to + 150
C
*2
VMODE,VFSEL,VOUT,VFB
– 0.3 to (VREG + 0.3)
V
*1
*3
VEN
– 0.3 to 6.0
V
*1
VPGOOD
– 0.3 to (VREG + 0.3)
V
*1
*3
VLX
– 0.3 to ( VIN + 0.3 )
V
*1
*4
HBM
1.4
kV
—
(p
lan
ed
Notes : This product may sustain permanent damage if subjected to conditions higher than the above stated absolute
maximum rating. This rating is the maximum rating and device operating at this range is not guaranteed as it
is higher than our stated recommended operating range.
When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected.
VIN is voltage for AVIN, PVIN. VIN = AVIN = PVIN.
Do not apply external currents and voltages to any pin not specifically mentioned.
*1 : The values under the condition not exceeding the above absolute maximum ratings and
the power dissipation.
*2 : Except for the power dissipation, operating ambient temperature, and storage temperature,
all ratings are for Ta = 25 C.
*3 : (VREG + 0.3) V must not exceed 6 V.
*4 : (VIN + 0.3) V must not exceed 33 V.
Page 2 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
POWER DISSIPATION RATING
Package
24 pin Plastic Quad Flat Non-leaded
Package Heat Slug Down (QFN Type)
j-a
j-C
PD
(Ta = 25 C)
PD
(Ta = 85 C)
Notes
61.6 C / W
8.1 C / W
2.029 W
1.054 W
*1
39.0 C / W
5.6 C / W
3.205 W
1.666 W
*2
Notes : For the actual usage, please follow the power supply voltage, load and ambient temperature conditions to ensure that there is
enough margin and the thermal design does not exceed the allowable value.
*1:Glass Epoxy Substrate (4 Layers) [50 50 0.8 t (mm)]
M
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CAUTION
e)
M
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*2:Glass Epoxy Substrate (4 Layers) [50 50 1.57 t (mm)]
Although this IC has built-in ESD protection circuit, it may still sustain permanent damage if not handled
properly. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS
gates.
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply voltage range
Input Voltage Range
Output Voltage Range
Symbol
Min
Typ
Max
Unit
Notes
AVIN
6
12
30
V
—
PVIN
6
12
30
V
—
VMODE
– 0.3
—
VREG + 0.3
V
*1
VFSEL
– 0.3
—
VREG + 0.3
V
*1
VEN
– 0.3
—
6.0
V
—
VPGOOD
– 0.3
—
VREG + 0.3
V
*1
VLX
– 0.3
—
VIN + 0.3
V
*2
Notes : Voltage values, unless otherwise specified, are with respect to GND.
GND is voltage for AGND, PGND. AGND = PGND
VIN is voltage for AVIN, PVIN. VIN = AVIN = PVIN.
(p
lan
ed
Do not apply external currents or voltages to any pin not specifically mentioned.
*1 : (VREG + 0.3) V must not exceed 6 V.
*2 : (VIN + 0.3) V must not exceed 33 V.
Page 3 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
ELECTRICAL CHARACTERISTICS
CO = 22 µF 2, LO = 1 µH, VOUT Setting = 3.3 V, VIN = AVIN = PVIN = 12 V,
Switching Frequency = 750 kHz, VMODE = VREG (FCCM)
Ta = 25 C 2 C unless otherwise noted.
Parameter
Symbol
Condition
Min
Limits
Typ
Max
—
650
1000
—
—
2
Unit Note
IOPR
Consumption current at standby
ISTB
VEN = 0 V
µA
—
µA
—
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M
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Consumption current at active
VEN = 5 V, IOUT = 0 A
RFB1 = 4.5 k
RFB2 = 1.0 k
VMODE = GND
(Skip Mode)
e)
Current Consumption
Logic Pin Characteristics
EN pin Low level input voltage
VENL
—
—
—
0.3
V
—
EN pin High level input voltage
VENH
—
1.5
—
6.0
V
—
EN pin leak current
IleakEN
—
5.0
10.0
µA
—
VEN = 5 V
MODE pin Low level input voltage
VMDL
—
—
—
VREG
0.3
V
—
MODE pin High level input voltage
VMDH
—
VREG
0.7
—
VREG
V
—
MODE pin leak current
IleakMD
—
5.0
10.0
µA
—
VMODE = 5 V
FSEL pin Low level input voltage
VFSL
—
—
—
0.3
V
—
FSEL pin High level input voltage
VFSH
—
VREG
– 0.3
—
VREG
V
—
FSEL pin leak current
IleakFS
VFSEL = 5 V
—
15.0
25.0
µA
—
VREG
IVREG = 6 mA
5.1
5.5
5.9
V
—
VREGLIN = VREG (VIN= 12 V)
– VREG (VIN = 6 V)
IVREG = 6 mA
—
—
200
mV
—
VREG Characteristics
Output voltage
VREGLIN
(p
lan
ed
Line regulation
Page 4 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
ELECTRICAL CHARACTERISTICS (Continued)
CO = 22 µF 2, LO = 1 µH, VOUT Setting = 3.3 V, VIN = AVIN = PVIN = 12 V,
Switching Frequency = 750 kHz, VMODE = VREG (FCCM)
Ta = 25 C 2 C unless otherwise noted.
Parameter
Min
Limits
Typ
Max
0.594
0.600
0.606
V
—
VFB = 0 V
–1
—
1
µA
—
VFB = 6 V
–1
—
1
µA
—
VUVLODE
VIN = 5 V to 0 V
3.5
3.8
4.1
V
—
VUVLORE
VIN = 0 V to 5 V
3.9
4.2
4.5
V
—
VPGUV
VPGOOD : High to Low
78
85
92
%
—
VPGUV
VPGOOD : Low to High
2
5
8
%
—
VPGOV
VPGOOD : High to Low
108
115
122
%
—
VPGOV
VPGOOD : Low to High
2
5
8
%
—
—
8
12
—
Symbol
Condition
VFB comparator threshold
VFBTH
—
VFB pin leak current 1
IleakF1
VFB pin leak current 2
IleakF2
Unit Note
M
Di ain
sc te
on na
tin nc
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d
VFB Characteristics
UVLO recover voltage
PGOOD Characteristics
PGOOD Threshold 1
(VFB ratio for UVD detect)
PGOOD Hysteresis 1
(VFB ratio for UVD release)
PGOOD Threshold 2
(VFB ratio for OVD detect)
PGOOD Hysteresis 2
(VFB ratio for OVD release)
PGOOD ON resistance
M
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typ s f
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tin
ue
dt
yp
UVLO detection voltage
e)
Under Voltage Lockout (UVLO)
—
(p
lan
ed
RPGOOD
Page 5 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
ELECTRICAL CHARACTERISTICS (Continued)
CO = 22 µF 2, LO = 1 µH, VOUT Setting = 3.3 V, VIN = AVIN = PVIN = 12 V,
Switching Frequency = 750 kHz, VMODE = VREG (FCCM)
Ta = 25 C 2 C unless otherwise noted.
Parameter
Symbol
Condition
Min
Limits
Typ
Max
—
0.25
0.75
%/V
—
Unit Note
DC-DC Characteristics
Line regulation
VIN = 6 V to 30 V
IOUT = 0.5 A
M
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sc te
on na
tin nc
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VLIN
VLOA
IOUT = 10 mA to 3 A
—
3.5
—
%
*1
Output ripple voltage 1
VR1
IOUT = 10 mA
—
20
—
mV
[p-p]
*1
—
20
—
mV
[p-p]
*1
VTR1
IOUT = 100 mA to 1.5 A
VOUT Setting = 1 V
t = 0.5 A / µs
—
20
—
mV
*1
VTR2
IOUT = 1.5 A to 100 mA
VOUT Setting = 1 V
t = 0.5 A / µs
—
20
—
mV
*1
RONH
VGS = 5.5 V
—
25
50
m
—
RONL
VGS = 5.5 V
—
25
50
m
—
Vdiff
Vdiff = VIN – VOUT
—
2.5
—
V
*1
VR2
Load transient response 1
Load transient response 2
High Side Power MOSFET
ON resistance
Low Side Power MOSFET
ON resistance
MIN input and output voltage
difference
*1 : Typical design value
(p
lan
ed
Note :
IOUT = 3 A
M
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tin
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dt
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Output ripple voltage 2
e)
Load regulation
Page 6 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
ELECTRICAL CHARACTERISTICS (Continued)
CO = 22 µF 2, LO = 1 µH, VOUT Setting = 3.3 V, VIN = AVIN = PVIN = 12 V,
Switching Frequency = 750 kHz, VMODE = VREG (FCCM)
Ta = 25 C 2 C unless otherwise noted.
Parameter
Symbol
Condition
Min
Limits
Typ
Max
—
4.7
—
A
*1
Unit Note
Protection
DC-DC Over Current
Protection Limit
VOUT Setting = 1 V
M
Di ain
sc te
on na
tin nc
ue e/
d
ILMT
Ishort
Thermal Shut Down (TSD)
Hysteresis
Soft Start Timing
TTSDTH
SS Discharge Resistance
(Shut down)
Switching Frequency
60
70
%
—
—
140
—
C
*1
—
20
—
C
*1
VSS = 0.3 V
—
2
4
µA
—
VEN = 0 V
—
5
10
k
—
TTSDHYS
ISSCH
SS Charge Current
—
50
M
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tin
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dt
yp
Thermal Shut Down (TSD)
Threshold
VFB = 0.6 V to 0.0 V
e)
DC-DC Short Circuit
Protection Threshold
RSSDCH
—
DC-DC Switching Frequency 1
fSW1
VOUT Setting = 0.75 V
IOUT = 3 A
—
250
—
kHz
*1
DC-DC Switching Frequency 2
fSW2
VOUT Setting = 0.75 V
IOUT = 3 A
—
750
—
kHz
*1
DC-DC Switching Frequency 3
fSW3
VOUT Setting = 0.75 V
IOUT = 3 A
—
1250
—
kHz
*1
*1 : Typical design value
(p
lan
ed
Note :
Page 7 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
FSEL
EN
VREG
VFB
SS
Top View
VOUT
PIN CONFIGURATION
18 17 16 15 14 13
19
AGND 20
PGOOD
11 AGND
21
10 MODE
22
27
LX
26
PVIN
9
M
Di ain
sc te
on na
tin nc
ue e/
d
PVIN
23
24
Pin name
Type
1
4
PGND
Ground
Ground pin for Power MOSFET
7
9
AGND
Ground
AVIN
Power supply
(p
12
Input
ed
20
MODE
lan
11
Description
Output
6
10
5 6
LX
5
8
3 4
Power MOSFET output pin
An inductor is connected and switching operation is carried out
between VIN and GND.
Due to high current and large amplitude at this terminal,
the parasitic inductance and impedance of the routing path
can cause an increase in noise and a degradation in the efficiency.
Routing path should be kept as short as possible.
2
3
2
M
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typ isc
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ma inu
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LX
an clu
ce de
typ s f
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pla wi
ne ng
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isc r P
on rod
tin uc
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d t ife
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, d st
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on e.
tin
ue
dt
yp
Pin No.
PGND
7
1
PIN FUNCTIONS
8
e)
BST
12 AVIN
25
AGND
Skip (discontinuous) Mode / FCCM (Forced Continuous Conduction Mode )
select pin
Skip Mode is set at Low level input, FCCM is set at High level input.
Ground pin
Power supply pin
Recommended rise time ( time to reach 90 % of set value ) setting is
greater than or equal to 10 µs and less than or equal to 1 s.
13
FSEL
Input
Frequency selection pin
This is set to 1250 kHz at Low level input, 250 kHz at High level input,
and 750 kHz at open.
14
EN
Input
ON / OFF control pin
DC-DC is stopped at Low level input, and it is started at High level input.
Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section.
Page 8 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
PIN FUNCTIONS (Continued)
15
VREG
VFB
Type
Description
Output
LDO output pin
This is Output pin of Power supply (LDO) for internal control circuit.
Please connect capacitor between VREG and GND.
Comparator negative input pin
VFB terminal voltage is regulated to REF output (internal reference voltage).
Since VFB is a high impedance terminal, it should not be routed near
other noisy path (LX, BST, etc.) or an inductor
Routing path should be kept as short as possible.
Input
M
Di ain
sc te
on na
tin nc
ue e/
d
16
Pin name
17
VOUT
Output voltage sense pin
Switching frequency is controlled by monitoring output voltage.
Input
e)
Pin No.
SS
Output
19
PGOOD
Output
Power good open drain pin
A pull up resistor between PGOOD and VREG terminal is necessary.
Output is low during Over or Under Voltage Detection conditions.
BST
Output
High side Power MOSFET gate driver pin
Bootstrap operation is carried out in order to drive the gate voltage of High
side Power MOSFET. Please connect a capacitor between BST and LX.
Routing path should be kept as short as possible to minimize noise.
PVIN
Power
supply
Power supply pin for Power MOSFET
Recommended rise time ( time to reach 90 % of set value ) setting is
greater than or equal to 10 µs and less than or equal to 1 s.
25
AGND
Ground
Ground pin for heat radiation
26
PVIN
Power
supply
Power supply pin for heat radiation
27
LX
Output
Power MOSFET output pin for heat radiation
21
22
23
24
M
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an clu
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typ s f
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pla wi
ne ng
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on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
18
Soft start capacitor connect pin
The output voltage at a start up is smoothly controlled
by adjusting Soft Start time.
Please connect capacitor between SS and GND.
(p
lan
ed
Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section.
Page 9 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
FUNCTIONAL BLOCK DIAGRAM
AVIN
SS
18
EN
14
VREG
SS
19
PGOOD
ON / OFF
M
Di ain
sc te
on na
tin nc
ue e/
d
VREG
VBG
BGR
VINT
12
Soft-Start
15
VREG : 5.5 V
VOUT
e)
22,23,24,26
M
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typ isc
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ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
TSD
SCP
0.6 V + 15 %
BST
OCP
UVLO
17
21
PVIN
Fault
0.6 V – 15 %
HPD
VFB
16
Soft-Start
Aux VREF
Timer
FSEL
13
VIN
REF
Ton
Timer + Comp
HGO
10
1,2,3,
4,5,6,
27
LX
0.6 V
Toff
Timer + Comp
Control
Logic
ON
CMP
LGATE
LPD
Coast
FCCM
/ Skip
MODE
HGATE
LGO
PGND
7,8,9
11,20,25
(p
lan
ed
AGND
Note : This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified.
Page 10 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
OPERATION
1. Protection
1) The Over Current Protection is activated at 4.7 A
(Typ). During the OCP, the output voltage
continues to drop at the specified current.
2) The Short Circuit Protection is implemented
when the output voltage decreases and the VFB pin
reaches to 60 % of the set voltage of 0.6 V.
3) The SCP operates intermittently at 2 ms ON, 16 ms
OFF intervals.
1) The MOSFET connected to the PGOOD pin turns ON
when the output voltage rises and the VFB pin voltage
reaches 115 % of its set voltage (0.6 V).
2) After (1) above, the MOSFET connected to the
PGOOD pin is turned OFF after 1 ms when the output
voltage drops and the VFB pin voltage reaches 110 %
of its set voltage (0.6 V).
3) The MOSFET connected to the PGOOD pin turns ON
when the output voltage drops and the VFB pin
voltage reaches 85 % of its set voltage (0.6 V).
4) After (3) above, the MOSFET connected to the
PGOOD pin is turned OFF after 1 ms when the output
voltage drops and the VFB pin voltage reaches 90 %
of its set voltage (0.6 V).
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
Over Current Protection ( Typ : 4.7 A )
3.2 A to 7 A
1)
Ground short protection
hysteresis
Output Voltage [V]
e)
(2) Over Voltage Detection (OVD) and Under Voltage
Detection (UVD)
M
Di ain
sc te
on na
tin nc
ue e/
d
(1) Over Current Protection (OCP) and Short Circuit
Protection (SCP)
2)
3)
Intermittent
operation area
about 0.75 A
(Ground short
protection
Detection 60 %
of Vout )
Pendency
characteristics
Output current [A]
Figure : OCP and SCP Operation
115 %
110 %
VFB
90 %
85 %
0.6 V
0.6 V
1 ms
PGOOD
1)
2)
1 ms
3)
4)
Note: PGOOD pin is pulled up to VREG pin
(3) Thermal Shut Down (TSD)
(p
lan
ed
Figure : OVD and UVD Operation
When the IC internal temperature becomes more than
about 140 C, TSD operates and DC-DC turns off.
Page 11 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
OPERATION (Continued)
2. Pin Setting
3. Output Voltage Setting
(1) Operating Mode Setting
The Output Voltage can be set by external resistance
of VFB pin, and its calculation is as follows.
(VIN = 12 V, IOUT = 0 A, FCCM,
Switching Frequency = 750 kHz)
RFB2
) 0.6
RFB1
VFB (0.6 V)
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
MODE pin
VOUT = (1 +
RFB1
VOUT
e)
M
Di ain
sc te
on na
tin nc
ue e/
d
The IC can operate at two different modes :
Skip (discontinuous) Mode and
Forced Continuous Conduction Mode (FCCM).
In Skip Mode, the IC is working under pulse skipping
mechanism to improve efficiency at light load condition.
In FCCM mode, the IC is working at fixed frequency to
avoid EMI issues.
The Operating Mode can be set by MODE pin as follows.
RFB2
Mode
Low
Skip Mode
High
FCCM
(2) Switching Frequency Setting
The IC can operate at three different frequency :
1250 kHz, 750 kHz and 250 kHz.
The Switching Frequency can be set by FSEL pin
as follows.
FSEL pin
Frequency [kHz]
Low
High
Open
1250
250
VOUT [V]
RFB1 []
RFB2 []
5.0
11.0 k
1.5 k
3.3
4.5 k
1.8
1.0
2.0 k
1.0 k
1.0 k
1.0 k
1.5 k
Note : RFB2 can be set to a maximum value of 10 k.
A larger RFB2 value will be more susceptible to noise.
VFB comparator threshold is adjusted to 1 %, but
The actual output voltage accuracy becomes more
than 1 % due to the influence from the circuits other
than VFB comparator.
In the case of VOUT setting = 3.3 V, the actual output
voltage accuracy becomes 2.5 %.
(FCCM, VIN = 12 V, IOUT = 0 A, Switching Frequency
= 750 kHz)
(p
lan
ed
750
Below resistors are recommended for following popular
output voltage.
Page 12 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
OPERATION (Continued)
5. Start-up / Shut-down Settings
The Start-up / Shut-down is enabled by the EN pin.
The EN pin can be set by applying voltage from
an external voltage source.
Case : Setting up the EN pin using an external voltage
source. When an external voltage source is
used, the EN pin input voltage (VENH, VENL)
should satisfy the conditions as defined in the
electrical characteristics
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
Di ain
sc te
on na
tin nc
ue e/
d
Soft Start function maintains the smooth control of the
output voltage during start up by adjusting soft start
time. When the EN pin becomes High, the current
(2 µA) begin to charge toward the external capacitor
(CSS) of SS pin, and the voltage of SS pin increases
straightly.
Because the voltage of VFB pin is controlled by the
voltage of SS pin during start up, the voltage of VFB
increase straightly to the regulation voltage (0.6 V)
together with the voltage of SS pin and keep the
regulation voltage after that. On the other hand, the
voltage of SS pin increase to about 2.8 V and keep the
voltage. The calculation of Soft Start Time is as follows.
Soft Start Setting [s] =
0.6
2µ
6 V (Max)
CSS
CSS : External capacitor value of SS pin
EN
VREG
4.2 V
UVLO
e)
4. Soft Start Setting
AVIN
VREG
EN
14
0V
Figure : Internal circuit with EN pin
Soft Start Time [s]
0.6 V
(p
VFB
lan
ed
SS
VOUT
Figure : Soft Start Operation
Page 13 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
OPERATION (Continued)
6. Power ON / OFF Sequence
Greater than or equal to 10 µs, Less than or equal to 1 s
VIN
90%
EN
M
Di ain
sc te
on na
tin nc
ue e/
d
4.2 V
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
VREG
e)
(1) When the EN pin is set to High after the VIN settles,
the BGR and the VREG start up. (Recommended
VIN rise time setting is greater than or equal to
10 µs and less than or equal to 1 s.)
(2) When the VREG pin exceeds its threshold value,
the UVLO is released and the Soft Start Sequence
is enabled.
The capacitor connected to the SS pin begins to
charge and the SS pin voltage increases linearly.
(3) The VOUT pin (DC-DC Output) voltage increases
at the same rate as the SS pin.
Normal operation begins after the VOUT pin
reaches the set voltage.
(4) When the EN pin is set to Low, the BGR, VREG
and UVLO stop operation. The VOUT pin / SS pin
Voltage starts to drop and the VOUT pin discharge
time depends on the value of the Feedback
resistors and the output load current.
Note : The SS pin capacitor should be discharged
completely before restarting the startup
UVLO
Soft Start Time [s] =
SS
0.6
Css
2µ
0.6 V
VFB
VOUT
sequence.
An incomplete discharge process might result
in an overshoot of the output voltage.
Delay Time [s] =
0.09
CSS + 1 m
2µ
PGOOD
(1) (2) (3)
(4)
(p
lan
ed
Figure : Power ON / OFF Sequence
Page 14 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
OPERATION (Continued)
7. Inductor and Output Capacitor Setting
IL
0
IC
IL / 2
VO
EO
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
0
M
Di ain
sc te
on na
tin nc
ue e/
d
IL / 2
e)
Highest efficiency operation is obtained at low
frequency with small ripple current. However,
achieving this requires a large inductor. There is a
trade off among component size, efficiency and
operating frequency. A reasonable starting point is to
choose a ripple current that is about 40 % of
IO (Max). The largest ripple current occurs at the
highest Ei. To guarantee that ripple current does not
exceed a specified maximum, the inductance should
be chosen according to:
IO
VRPL
Lo
Eo Ei Eo
2 Ei Iox f
@ Ei Ei_max
And its maximum current rating is
Ton
IL_max Io_max
T=1/f
VO(EO)
Q1
LO
IL
Ei
IC
IO
CO
Q2
RC
Given the desired input and output voltages,
the inductor value and operating frequency determine
the ripple current.
@ Ei Ei_max
The selection of CO is primarily determined by the
ESR (RC) required to minimize voltage ripple and load
transients. The output ripple VRPL is approximately
bounded by:
IL
Co Rc 2
Vrpl Vop Vob Ei
2 Lo
8Co f
Ei
Co Rc 2
Eo Ei Eo
2 Lo
8Ei Lo Co f 2
From the above equation, to achieve desired output
ripple, low ESR ceramic capacitors are recommended,
and its required RMS current rating is:
Ic(rms)_max
IL
2 3
@ Ei Ei_max
(p
lan
ed
Eo Ei Eo
IL
Ei Lo f
IL
2
Iox
IL
2
Page 15 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES
1. Output Ripple Voltage
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, Skip Mode,
LO = 1 µH, CO = 44 µF (22 µF x 2)
IOUT = 0.1 A
M
Di ain
sc te
on na
tin nc
ue e/
d
IOUT = 0 A
LX
e)
VOUT
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
VOUT
LX
IOUT = 1 A
VOUT
LX
(p
lan
ed
VOUT
IOUT = 3 A
LX
Page 16 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
1. Output Ripple Voltage (Continued)
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, FCCM,
LO = 1 µH, CO = 44 µF (22 µF x 2)
IOUT = 0.1 A
M
Di ain
sc te
on na
tin nc
ue e/
d
IOUT = 0 A
LX
e)
VOUT
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
VOUT
LX
IOUT = 1 A
VOUT
LX
(p
lan
ed
VOUT
IOUT = 3 A
LX
Page 17 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
2. Load transient response
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, IOUT = 50 mA to 3 A (0.15 A / µs),
LO = 1 µH, CO = 44 µF (22 µF x 2)
FCCM
VOUT (50 mV/div)
VOUT (50 mV/div)
19.6mV
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
31mV
e)
M
Di ain
sc te
on na
tin nc
ue e/
d
Skip Mode
21.6mV
15.9mV
IOUT (2 A/div)
IOUT (2 A/div)
Time (100 us/div)
Time (100 us/div)
Condition : VIN = 12 V, VOUT = 1.05 V, Switching Frequency = 750 kHz, IOUT = 0.1 A to 3 A (0.15 A / µs),
LO = 1 µH, CO = 44 µF (22 µF x 2)
Skip Mode
FCCM
23.1mV
VOUT (50 mV/div)
VOUT (50 mV/div)
17.7mV
22.9mV
15.2mV
IOUT (2 A/div)
(p
lan
ed
IOUT (2 A/div)
Time (100 us/div)
Time (100 us/div)
Page 18 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
3. Efficiency
Condition : VIN = 12 V, VOUT Setting = 1.05 V / 1.2 V / 1.8 V / 3.3 V / 5.0 V, Switching Frequency = 250 kHz,
LO = 4.7 µH, CO = 44 µF (22 µF x 2)
100
M
Di ain
sc te
on na
tin nc
ue e/
d
90
FCCM/ Vo= 1.05V
FCCM/ Vo= 1.2V
FCCM/ Vo= 1.8V
FCCM/ Vo= 3.3V
FCCM/ Vo= 5.0V
SKIP/ Vo= 1.05V
SKIP/ Vo= 1.2V
SKIP/ Vo= 1.8V
SKIP/ Vo= 3.3V
SKIP/ Vo= 5.0V
60
50
40
30
20
10
0.001
0
e)
70
M
ma ain
int ten
0.010
en an
an ce
ce /D
typ isc
e, ont
0.100
ma inu
e
int d
en in
an clu
ce de
typ s f
1.000
e, ollo
pla wi
ne ng
d d fou
isc r P 10.000
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
Efficiency (%)
80
IOUT (A)
Condition : VIN = 12 V, VOUT Setting = 1.05 V / 1.2 V / 1.8 V / 3.3 V / 5.0 V, Switching Frequency = 750 kHz,
LO = 1 µH, CO = 44 µF (22 µF x 2)
100
90
80
60
10
(p
lan
0.001
0
IOUT (A)
10.000
20
1.000
30
0.100
40
0.010
FCCM/ Vo= 1.05V
FCCM/ Vo= 1.2V
FCCM/ Vo= 1.8V
FCCM/ Vo= 3.3V
FCCM/ Vo= 5.0V
SKIP/ Vo= 1.05V
SKIP/ Vo= 1.2V
SKIP/ Vo= 1.8V
SKIP/ Vo= 3.3V
SKIP/ Vo= 5.0V
50
ed
Efficiency (%)
70
Page 19 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
4. Load Regulation
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 250 kHz, LO = 4.7 µH, CO = 44 µF (22 µF x 2)
Load Regulation_f = 250kHz (FCCM)
1.15
1.13
1.13
1.11
1.11
M
Di ain
sc te
on na
tin nc
ue e/
d
1.09
1.07
1.07
1.05
1.03
1.05
1.03
e)
VOUT (V)
1.09
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
1.01
1.01
0.99
0.99
0.97
0.97
3.0
2.5
2.0
1.5
1.0
0.5
3.0
2.0
1.5
1.0
0.5
0.0
IOUT (A)
0.0
0.95
0.95
2.5
VOUT (V)
Load Regulation_f = 250kHz (Skip mode)
1.15
IOUT (A)
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, LO = 1 µH, CO = 44 µF (22 µF x 2)
Load Regulation_f = 750kHz (Skip mode)
1.13
1.13
1.11
1.11
1.09
1.09
VOUT (V)
1.07
1.05
1.03
1.01
1.07
1.05
1.03
1.01
0.99
0.99
0.97
0.97
3.0
2.5
2.0
1.0
0.5
0.0
1.5
IOUT (A)
(p
lan
ed
IOUT (A)
3.0
2.0
1.5
1.0
0.5
0.95
0.0
0.95
2.5
VOUT (V)
Load Regulation_f = 750kHz (FCCM)
1.15
1.15
Page 20 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
5. Line Regulation
Condition : VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, FCCM, IOUT = 1.5 A,
LO = 1 µH, CO = 44 µF (22 µF x 2)
Line Regulation_f = 750kHz (FCCM)
M
Di ain
sc te
on na
tin nc
ue e/
d
1.10
1.04
1.02
0
1.00
e)
1.06
M
ma ain
int ten
5
en an
an ce
ce /D
typ isc
10
e, ont
ma inu
int ed
en in
15
an clu
ce de
typ s f
e, ollo
20
pla wi
ne ng
d d fou
isc r 25P
on rod
tin uc
ue t l
d t ife
30
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
VOUT (V)
1.08
(p
lan
ed
VIN (V)
Page 21 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
6. Start / Shut Down
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, Skip Mode, IOUT = 0 A,
LO = 1 µH, CO = 44 µF (22 µF x 2)
SS (2 V/div)
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
SS (2 V/div)
EN (2 V/div)
e)
M
Di ain
sc te
on na
tin nc
ue e/
d
EN (2 V/div)
VOUT (0.5 V/div)
VOUT (0.5 V/div)
Time (10 ms/div)
Time (200 ms/div)
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, FCCM, IOUT = 0 A,
LO = 1 µH, CO = 44 µF (22 µF x 2)
EN (2 V/div)
SS (2 V/div)
SS (2 V/div)
VOUT (0.5 V/div)
(p
lan
ed
VOUT (0.5 V/div)
EN (2 V/div)
Time (10 ms/div)
Time (200 ms/div)
Page 22 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
6. Start / Shut Down (Continued)
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, Skip Mode, RLOAD = 0.5 ,
LO = 1 µH, CO = 44 µF (22 µF x 2)
M
Di ain
sc te
on na
tin nc
ue e/
d
EN (2 V/div)
SS (2 V/div)
M
ma ain
int ten
en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
SS (2 V/div)
e)
EN (2 V/div)
VOUT (0.5 V/div)
VOUT (0.5 V/div)
Time (10 ms/div)
Time (10 ms/div)
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, FCCM, RLOAD = 0.5 ,
LO = 1 µH, CO = 44 µF (22 µF x 2)
EN (2 V/div)
EN (2 V/div)
SS (2 V/div)
VOUT (0.5 V/div)
(p
lan
ed
VOUT (0.5 V/div)
SS (2 V/div)
Time (10 ms/div)
Time (10 ms/div)
Page 23 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
7. Short Circuit Protection
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, LO = 1 µH, CO = 44 µF (22 µF x 2)
FCCM
LX (10 V/div)
SS (2 V/div)
SS (2 V/div)
VOUT (1 V/div)
VOUT (1 V/div)
M
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an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
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on na
tin nc
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LX (10 V/div)
e)
Skip Mode
IOUT (2 A/div)
IOUT (2 A/div)
Time (10 ms/div)
(p
lan
ed
Time (10 ms/div)
Page 24 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
8. Switching Frequency
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, IOUT = 10 mA to 3 A,
LO = 1 µH, CO = 44 µF (22 µF x 2)
LX Average Frequency (MHz) Skip Mode
LX Average Frequency (MHz) FCCM Mode
0.6
M
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typ isc
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ma inu
int ed
en in
LX Average a
Frequency
LX Average Frequency (MHz)
nc clu(MHz)
e t des
yp fo
e, llo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
e)
0.7
0.6
M
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sc te
on na
tin nc
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LX Average Frequency (MHz)
0.7
0.5
0.5
0.4
0.4
0.3
0.3
0.2
0.2
0.1
0.1
0.0
0.01
0.1
1
ILOAD (A)
10
0
0.01
0.1
1
ILOAD (A)
10
Condition : VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, IOUT = 1.5 A, LO = 1 µH, CO = 44 µF (22 µF x 2)
LX Average Frequency (MHz) FCCM Mode
LX Average Frequency (MHz) Skip Mode
0.80
0.70
0.70
LX Average Frequency (MHz)
0.80
0.60
0.60
0.50
0.50
0.40
0.40
0.30
0.30
0.20
0.20
0.10
0.10
0.00
0.00
6
8
10
12
14
16
18
20
24
26
28
30
6
8
10
12
14
16
18
20
22
24
26
28
30
VIN(V)
(p
lan
ed
VIN(V)
22
Page 25 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
TYPICAL CHARACTERISTICS CURVES (Continued)
9. Thermal Performance
e)
(p
lan
ed
M
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en in
an clu
ce de
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pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
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tin nc
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d
Condition : VIN = 12 V, VOUT Setting = 1.05 V, Switching Frequency = 750 kHz, FCCM, IOUT = 3 A,
LO = 1 µH, CO = 44 µF (22 µF x 2)
Page 26 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
APPLICATIONS INFORMATION
1. Evaluation Board Information
Condition : VOUT Setting = 3.3 V, Switching Frequency = 750 kHz, Skip Mode
C-BST
PGOOD
C-SS
21
22
23
24
18
SS
VOUT
R-FB2 R-FB1
FSEL
C-AVIN1
C-AVIN2
L-LX
C-VREG
EN
R-FB4 R-FB3
12
AVIN
11
AGND
10
MODE
9
VREG
DCDCOUT
Figure : Application circuit
VOUT
L-LX
LX
VFB
C-VREG
C-DCDCOUT1
C-DCDCOUT2
C-DCDCOUT3
R-FBX
R-FBX
AVIN
C-AVIN2
C-AVIN1
PGND
Figure : layout
(p
lan
ed
NN30310AA
C-DCDCOUT1
C-DCDCOUT2
6
13
5
14
4
15
3
16
VFB
8
SS
VOUT
M
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typ isc
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int ed
en in
an clu
ce de
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pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
2
17
VOUT
7
C-PVIN5
C-PVIN6
e)
AGND
20
1
LX
BST
PVIN
M
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on na
tin nc
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R-PG
PVIN
SS
19
C-BST
C-PVIN5
C-PVIN6
PVIN
Figure Top Layer with silk screen
( Top View ) with Evaluation board
Figure Bottom Layer with silk screen
( Bottom View ) with Evaluation board
Note : The application circuit diagram and layout diagram explained in this section, should be used as reference examples. The
operation of the mass production set is not guaranteed. Sufficient evaluation and verification is required in the design of the
mass production set. The Customer is fully responsible for the incorporation of the above illustrated application circuit and the
information attached with it, in the design of the equipment.
Page 27 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
APPLICATIONS INFORMATION (Continued)
2. Layout Recommendations
Board layout considerations are necessary for stable
operation of the DC-DC regulator. The following
precautions must be used when designing the board
layout.
M
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d
(a) The Input capacitor CIN must be placed in such a way
that the distance between PVIN and PGND is
minimum, in order to suppress the switching noise.
Stray inductance and impedance should be reduced
as indicated by loop (1) in the figure below.
(b) A single point ground connection (2) must be used to
connect PGND and AGND to improve operation
stability.
(c) Output current line IOUT and the output sense line
VOUT must have small common impedance to
reduce output load variations. Output sense line
VOUT must be close to the output condenser CO as
indicated by (3) below.
(d) Power Loss and output ripple voltage can be reduced
by placing the inductor LO and output capacitor CO
such that the stray inductance and the impedance of
loop (4) is minimum. This is realized by :
i) Minimizing distance between inductor LO and LX
pin.
ii) Reducing distance between output capacitor CO
and (2) / (3)
(e) Thick lines in the application circuit example
represent lines with large current flow. These lines
should be designed as thick as possible.
(f) VFB / SS / VREG lines should be placed far away
from LX line, BST line and inductor LO to reduce the
effects of switching noise. These lines should be
designed as short as possible. This is especially true
for the VFB line, which is a high impedance line.
(g) RFB1 / RFB2 should also be placed as far away as
possible from LX line, BST line and inductor LO to
minimize the effects of switching noise. RFB1 / RFB2
should be placed close to the VFB pin.
(h) LX / BST lines are noisy lines. They should be
designed as short as possible.
(1)
PVIN
VOUT
(3)
BST
LO
M
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en an
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ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
RFB1
e)
AVIN
VFB
LX
IOUT
RFB2
VREG
SS
AGND PGND
CIN
CO
(4)
(2)
Figure : Application circuit diagram
(p
lan
ed
Note : The application circuit diagram and layout diagram
explained in this section, should be used as reference
examples. The operation of the mass production set is
not guaranteed. Sufficient evaluation and verification is
required in the design of the mass production set. The
Customer is fully responsible for the incorporation of
the above illustrated application circuit and the
information attached with it, in the design of the
equipment.
Page 28 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
APPLICATIONS INFORMATION (Continued)
3. Recommended component
Value
Manufacturer
Part Number
Note
C-AVIN1
2
10 µF
TAIYO YUDEN
UMK325AB7106MM-T
—
C-AVIN2
1
0.1 µF
Murata
GRM188R72A104KA35L
—
C-BST
1
0.1 µF
Murata
GRM188R72A104KA35L
—
C-DCDCOUT
2
22 µF
Murata
GRM32ER71E226KE15L
—
C-PVIN5
2
10 µF
TAIYO YUDEN
UMK325AB7106MM-T
—
C-PVIN6
1
C-SS
1
C-VREG
1
1
1
R-FB2
1
R-FB3
1
R-FB4
1
R-PG
1
0.1 µF
Murata
GRM188R72A104KA35L
—
10 nF
Murata
GRM188R72A103KA01L
—
1.0 µF
Murata
GRM188R71E105KA12L
—
1.0 µH
Panasonic
ETQP3W1R0WFN
FSEL :
GND (1250 kHz)
OPEN (750 kHz)
4.7 µH
Panasonic
ETQ3W4R7WFN
FSEL :
VREG (250 kHz)
3.3 k
Panasonic
ERJ3EKF3301V
—
1.2 k
Panasonic
ERJ3EKF1201V
—
1.0 k
Panasonic
ERJ3EKF1001V
—
0 k
Panasonic
ERJ3GEY0R00V
—
100k
Panasonic
ERJ3EKF1003V
—
(p
lan
ed
R-FB1
M
ma ain
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en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
L-LX
e)
QTY
M
Di ain
sc te
on na
tin nc
ue e/
d
Reference
Designator
Page 29 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
PACKAGE INFORMATION
Outline Drawing
Package Code : HQFN024-A3-0404
e)
(p
lan
ed
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ne ng
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on rod
tin uc
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d t ife
yp cy
ed cle
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on e.
tin
ue
dt
yp
M
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on na
tin nc
ue e/
d
Unit : mm
Body Material
: Br / Sb Free Epoxy Resin
Lead Material
: Cu Alloy
Lead Finish Method : Pd Plating
Page 30 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Doc No. TA4-EA-06104
Revision. 4
Product Standards
NN30310AA
IMPORTANT NOTICE
1. When using the IC for new models, verify the safety including the long-term reliability for each product.
2. When the application system is designed by using this IC, please confirm the notes in this book.
Please read the notes to descriptions and the usage notes in the book.
e)
M
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en an
an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
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pla wi
ne ng
d d fou
isc r P
on rod
tin uc
ue t l
d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
M
Di ain
sc te
on na
tin nc
ue e/
d
3. This IC is intended to be used for general electronic equipment.
Consult our sales staff in advance for information on the following applications: Special applications in which exceptional
quality and reliability are required, or if the failure or malfunction of this IC may directly jeopardize life or harm the human body.
Any applications other than the standard applications intended.
(1) Space appliance (such as artificial satellite, and rocket)
(2) Traffic control equipment (such as for automotive, airplane, train, and ship)
(3) Medical equipment for life support
(4) Submarine transponder
(5) Control equipment for power plant
(6) Disaster prevention and security device
(7) Weapon
(8) Others : Applications of which reliability equivalent to (1) to (7) is required
Our company shall not be held responsible for any damage incurred as a result of or in connection with the IC being used for
any special application, unless our company agrees to the use of such special application.
However, for the IC which we designate as products for automotive use, it is possible to be used for automotive.
4. This IC is neither designed nor intended for use in automotive applications or environments unless the IC is designated by our
company to be used in automotive applications.
Our company shall not be held responsible for any damage incurred by customers or any third party as a result of or in
connection with the IC being used in automotive application, unless our company agrees to such application in this book.
(p
lan
ed
5. Please use this IC in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled
substances, including without limitation, the EU RoHS Directive. Our company shall not be held responsible for any damage
incurred as a result of our IC being used by our customers, not complying with the applicable laws and regulations.
6. Pay attention to the direction of the IC. When mounting it in the wrong direction onto the PCB (printed-circuit-board),
it might be damaged.
7. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins.
In addition, refer to the Pin Description for the pin configuration.
8. Perform visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as
solder-bridge between the pins of the IC. Also, perform full technical verification on the assembly quality, because the same
damage possibly can happen due to conductive substances, such as solder ball, that adhere to the IC during transportation.
9. Take notice in the use of this IC that it might be damaged when an abnormal state occurs such as output pin-VCC short
(Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short). Safety measures such as
installation of fuses are recommended because the extent of the above-mentioned damage will depend on the current
capability of the power supply.
10. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit should not work
during normal operation.
Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily
exceeded due to output pin to VCC short (Power supply fault), or output pin to GND short (Ground fault), the IC might be
damaged before the thermal protection circuit could operate.
11. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the
pins because the IC might be damaged, which could happen due to negative voltage or excessive voltage generated during
the ON and OFF timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven.
12. Product which has specified ASO (Area of Safe Operation) should be operated in ASO
13. Verify the risks which might be caused by the malfunctions of external components.
14. Connect the metallic plates (fins) on the back side of the IC with their respective potentials (AGND, PVIN, LX). The thermal
resistance and the electrical characteristics are guaranteed only when the metallic plates (fins) are connected with their
respective potentials.
Page 31 of 31
Established : 2012-07-25
Revised
: 2013-05-31
Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any
other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any
other company which may arise as a result of the use of technical information described in this book.
M
Di ain
sc te
on na
tin nc
ue e/
d
(3) The products described in this book are intended to be used for general applications (such as office equipment, communications
equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book.
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment,
life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of
the products may directly jeopardize life or harm the human body.
It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with
your using the products described in this book for any special application, unless our company agrees to your using the products in
this book for any special application.
e)
(4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.
ed M
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an ce
ce /D
typ isc
e, ont
ma inu
int ed
en in
an clu
ce de
typ s f
e, ollo
pla wi
ne ng
d d fou
isc r P
on rod
tin uc
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d t ife
yp cy
ed cle
, d st
isc ag
on e.
tin
ue
dt
yp
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.
(p
20100202
lan
(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company.
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