NP80N03CLE

DATA SHEET MOS FIELD EFFECT TRANSISTOR NP80N03CLE,NP80N03DLE,NP80N03ELE NP80N03KLE SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION These products are N-channel MOS Field Effect Transistor designed for high current switching applications. ORDERING INFORMATION PART NUMBER NP80N03CLE NP80N03DLE PACKAGE TO-220AB TO-262 TO-263 (MP-25ZJ) TO-263 (MP-25ZK) FEATURES • Channel Temperature 175 degree rated • Super Low On-state Resistance RDS(on)1 = 7.0 mΩ MAX. (VGS = 10 V, ID = 40 A) RDS(on)2 = 9.0 mΩ MAX. (VGS = 5 V, ID = 40 A) • Low Ciss : Ciss = 2600 pF TYP. • Built-in Gate Protection Diode 5 NP80N03ELE NP80N03KLE (TO-220AB) ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Note1 Note2 VDSS VGSS ID(DC) ID(pulse) PT PT Tch Tstg 30 ±20 ±80 ±320 1.8 120 175 –55 to +175 50 / 40 / 9 2.5 / 160 / 400 V V A A W W °C °C A mJ (TO-262) Drain Current (Pulse) Total Power Dissipation (TA = 25°C) Total Power Dissipation (TC = 25°C) Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy Note3 Note3 IAS EAS Notes 1. Calculated constant current according to MAX. allowable channel temperature. 2. PW ≤ 10 µs, Duty cycle ≤ 1% 3. Starting Tch = 25°C, RG = 25 Ω , VGS = 20 → 0 V (see Figure 4.) (TO-263) THERMAL RESISTANCE Channel to Case Thermal Resistance Channel to Ambient Thermal Resistance Rth(ch-C) Rth(ch-A) 1.25 83.3 °C/W °C/W The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. D14032EJ4V0DS00 (4th edition) Date Published December 2002 NS CP(K) Printed in Japan The mark 5 shows major revised points. 1 999, 2000 NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS Zero Gate Voltage Drain Current Gate to Source Leakage Current Gate to Source Threshold Voltage Forward Transfer Admittance Drain to Source On-state Resistance SYMBOL IDSS IGSS VGS(th) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge 1 Total Gate Charge 2 Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Ciss Coss Crss td(on) tr td(off) tf QG1 QG2 QGS QGD VF(S-D) trr Qrr VDD = 24 V, VGS = 10 V, ID = 80 A VDD = 24 V VGS = 5 V ID = 80 A IF = 80 A, VGS = 0 V IF = 80 A, VGS = 0 V di/dt = 100 A/µs TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = VGS, ID = 250 µA VDS = 10 V, ID = 40 A VGS = 10 V, ID = 40 A VGS = 5 V, ID = 40 A VGS = 4.5 V, ID = 40 A VDS = 25 V VGS = 0 V f = 1 MHz VDD = 15 V, ID = 40 A VGS = 10 V RG = 1 Ω 1.5 20 2.0 41 5.3 6.8 7.5 2600 590 270 20 12 60 14 48 28 10 14 1.0 34 22 7.0 9.0 11 3900 890 490 44 31 120 35 72 42 MIN. TYP. MAX. 10 ±10 2.5 UNIT µA µA V S mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC nC V ns nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG VGS RL VDD VDS 90% 90% 10% 10% VGS Wave Form 0 10% VGS 90% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 µs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD 2 Data Sheet D14032EJ4V0DS NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE TYPICAL CHARACTERISTICS (T A = 2 5°C) Figure1. DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA 140 Figure2. TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 100 80 60 40 20 0 120 100 80 60 40 20 0 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 TC - Case Temperature - ˚C TC - Case Temperature - ˚C Figure4. SINGLE AVALANCHE ENERGY DERATING FACTOR 450 Figure3. FORWARD BIAS SAFE OPERATING AREA EAS- Single Avalanche Energy - mJ 1000 ID(pulse) PW 400 350 300 250 200 400 mJ ID - Drain Current - A 100 R tV (a ) (on DS GS d ite ) Lim10 V = ID(DC) DC Po Lim wer ite Dis sip d ati on 10 0µ s 1m s =1 0µ s 10 IAS = 9 A 40 A 50 A 160 mJ 150 100 50 2.5 mJ 0 25 50 75 100 125 150 175 1 TC = 25˚C Single pulse 0.1 0.1 VDS 1 10 - Drain to Source Voltage - V 100 Starting Tch - Starting Channel Temperature - ˚C Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - ˚C/W 100 Rth(ch-A) = 83.3˚C/W 10 1 Rth(ch-C) = 1.25˚C/W 0.1 Single pulse 0.01 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet D14032EJ4V0DS 3 NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE Figure6. FORWARD TRANSFER CHARACTERISTICS 1000 Pulsed ID - Drain Current - A Figure7. DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE 400 350 Pulsed VGS = 10 V ID - Drain Current - A 100 300 250 200 150 100 50 4.5 V 10 1 TA = −50˚C 25˚C 75˚C 150˚C 175˚C 5V 0.1 1 2 3 4 5 6 0 0.0 1.0 2.0 3.0 4.0 VGS - Gate to Source Voltage - V Figure8. FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VDS = 10 V Pulsed 10 TA = 175˚C 75˚C 25˚C −50˚C VDS - Drain to Source Voltage - V Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 50 Pulsed RDS(on) - Drain to Source On-state Resistance - mΩ | yfs | - Forward Transfer Admittance - S 40 30 20 10 1 0.1 ID = 40 A 0.01 0.01 0.1 1 10 100 0 0 2 4 6 8 10 12 14 16 18 ID - Drain Current - A VGS - Gate to Source Voltage - V Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs. CHANNEL TEMPERATURE 3.0 VDS = VGS ID = 250 µ A 2.5 2.0 1.5 1.0 0.5 0 −50 RDS(on) - Drain to Source On-state Resistance - mΩ 30 Pulsed 20 10 VGS = 4.5 V 5V 10 V 0 1 10 100 1000 VGS(th) - Gate to Source Threshold Voltage - V Figure10. DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 0 50 100 150 ID - Drain Current - A Tch - Channel Temperature - ˚C 4 Data Sheet D14032EJ4V0DS NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE RDS(on) - Drain to Source On-state Resistance - mΩ Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 12 Pulsed 10 VGS = 4.5 V 5V 10 V 8 6 4 2 0 −50 0 50 100 ID = 40 A 150 Figure13. SOURCE TO DRAIN DIODE FORWARD VOLTAGE 1000 Pulsed ISD - Diode Forward Current - A 100 VGS = 10 V 10 VGS = 0 V 1 0.1 0 0.5 1.0 1.5 Tch - Channel Temperature - ˚C VSD - Source to Drain Voltage - V Figure14. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE Figure15. SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns 10000 1000 tf 100 td(off) td(on) 10 tr Ciss, Coss, Crss - Capacitance - pF VGS = 0 V f = 1 MHz Ciss 1000 Coss Crss 100 10 0.1 1 10 100 1 0.1 1 10 100 VDS - Drain to Source Voltage - V ID - Drain Current - A Figure16. REVERSE RECOVERY TIME vs. DRAIN CURRENT 1000 trr - Reverse Recovery Time - ns di/dt = 100 A/µs VGS = 0 V Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS 40 VDS - Drain to Source Voltage - V 16 14 VGS VDD = 24 V 15 V 6V 12 10 8 6 4 VDS ID = 80 A 2 30 40 50 60 70 80 0 VGS - Gate to Source Voltage - V 35 30 25 20 15 10 5 0 0 10 100 10 1 0.1 1 10 100 20 IF - Drain Current - A QG - Gate Charge - nC Data Sheet D14032EJ4V0DS 5 NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE PACKAGE DRAWINGS (Unit: mm) 1) TO-220AB (MP-25) 2) TO-262 (MP-25 Fin Cut) 3.0±0.3 φ 3.6±0.2 5.9 MIN. 1.0±0.5 10.6 MAX. 10.0 TYP. 4.8 MAX. 1.3±0.2 10 TYP. 4.8 MAX. 1.3±0.2 15.5 MAX. 4 1 2 3 4 123 6.0 MAX. 1.3±0.2 12.7 MIN. 1.3±0.2 12.7 MIN. 8.5±0.2 0.75±0.1 2.54 TYP. 0.5±0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.8±0.2 0.75±0.3 2.54 TYP. 0.5±0.2 2.54 TYP. 1.Gate 2.Drain 3.Source 4.Fin (Drain) 2.8±0.2 3) TO-263 (MP-25ZJ) 5 4) TO-263 (MP-25ZK) 10 TYP. 4 4.8 MAX. 1.3±0.2 No plating 10.0±0.3 7.88 MIN. 4 1.35±0.3 4.45±0.2 1.3±0.2 1.0±0.5 8.0 TYP. 8.5±0.2 9.15±0.3 15.25±0.5 0.025 to 0.25 1 2 3 5.7±0.4 1.4±0.2 0.7±0.2 2.54 TYP. R 0.5 TY P. TY P. 2.54 TYP. R 0.8 0.5±0.2 0.75±0.2 2.54 0.5± 0.2 8o 0 to 2.8±0.2 1.Gate 2.Drain 3.Source 4.Fin (Drain) 0.25 1 2 3 1.Gate 2.Drain 3.Source 2.5 4.Fin (Drain) 6 Data Sheet D14032EJ4V0DS 2.54±0.25 NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE EQUIVALENT CIRCUIT Drain Gate Body Diode Remark Gate Protection Diode The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. Source Data Sheet D14032EJ4V0DS 7 NP80N03CLE,NP80N03DLE,NP80N03ELE,NP80N03KLE • The information in this document is current as of December, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. 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