UPA2790GR

DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2790GR SWITCHING N- AND P-CHANNEL POWER MOS FET DESCRIPTION The µ PA2790GR is N- and P-channel MOS Field Effect Transistors designed for Motor Drive application. 8 PACKAGE DRAWING (Unit: mm) 5 N-channel 1 : Source 1 2 : Gate 1 7, 8 : Drain 1 P-channel 3 : Source 2 4 : Gate 2 5, 6 : Drain 2 6.0 ±0.3 FEATURES • Low on-state resistance N-channel RDS(on)1 = 28 mΩ MAX. (VGS = 10 V, ID = 3 A) 1.8 Max. RDS(on)2 = 40 mΩ MAX. (VGS = 4.5 V, ID = 3 A) P-channel RDS(on)1 = 60 mΩ MAX. (VGS = −10 V, ID = −3 A) RDS(on)2 = 80 mΩ MAX. (VGS = −4.5 V, ID = −3 A) • Low input capacitance N-channel Ciss = 500 pF TYP. P-channel Ciss = 460 pF TYP. 1 4 +0.05 –0.10 5.37 Max. 4.0 1.0 0.20 0.10 Min. 0.6 1.27 0.12 M 0.40 +0.11 –0.05 0.5 ±0.2 0.10 • Built-in gate protection diode • Small and surface mount package (Power SOP8) EQUIVALENT CIRCUITS N-channel Drain P-channel Drain ORDERING INFORMATION PART NUMBER PACKAGE Power SOP8 Gate Protection Diode Source Gate Body Diode Gate Body Diode µ PA2790GR Gate Protection Diode Source Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. G16954EJ2V0DS00 (2nd edition) Date Published August 2004 NS CP(K) Printed in Japan The mark shows major revised points. 2004 µ PA2790GR ABSOLUTE MAXIMUM RATINGS (TA = 25°C. All terminals are connected.) PARAMETER Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) Note1 Note2 Note2 SYMBOL VDSS VGSS ID(DC) ID(pulse) PT PT Tch Tstg N-CHANNEL 30 ±20 ±6 ±24 1.7 2.0 150 −55 to +150 6 3.6 P-CHANNEL −30 UNIT V V A A W W °C °C m20 m6 m24 Total Power Dissipation (1 unit) Total Power Dissipation (2 units) Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy Note3 Note3 IAS EAS −6 3.6 A mJ Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2. Mounted on ceramic substrate of 2000 mm x 1.6 mm 3. Starting Tch = 25°C, VDD = 1 2 2 x VDSS, RG = 25 Ω, L = 100 µH, VGS = VGSS → 0 V 2 Data Sheet G16954EJ2V0DS µ PA2790GR ELECTRICAL CHARACTERISTICS (TA = 25°C. All terminals are connected.) N-channel CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Note Note SYMBOL IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±16 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 3 A VGS = 10 V, ID = 3 A VGS = 4.5 V, ID = 3 A VGS = 4.0 V, ID = 3 A VDS = 10 V VGS = 0 V f = 1 MHz VDD = 15 V, ID = 3 A VGS = 10 V RG = 10 Ω MIN. TYP. MAX. 10 UNIT µA µA V S ±10 1.5 2 21 28 34 500 135 77 9.2 8.8 28 7.4 28 40 53 2.5 Drain to Source On-state Resistance mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Note Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr ID = 6 A VDD = 24 V VGS = 10 V IF = 6 A, VGS = 0 V IF = 6 A, VGS = 0 V di/dt = 100 A/µs 12.6 1.7 3.8 0.85 18 11 Note Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG RL VDD VGS VGS Wave Form 0 10% VGS 90% VDS 90% 90% 10% 10% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 µs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD Data Sheet G16954EJ2V0DS 3 µ PA2790GR P-channel CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Note Note SYMBOL IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 TEST CONDITIONS VDS = −30 V, VGS = 0 V VGS = m16 V, VDS = 0 V VDS = −10 V, ID = −1 mA VDS = −10 V, ID = −3 A VGS = −10 V, ID = −3 A VGS = −4.5 V, ID = −3 A VGS = −4.0 V, ID = −3 A VDS = −10 V VGS = 0 V f = 1 MHz VDD = −15 V, ID = −3 A VGS = −10 V RG = 10 Ω MIN. TYP. MAX. −10 UNIT µA µA V S m10 −1.0 2 43 58 65 460 130 77 8.5 4.8 42 19 60 80 110 −2.5 Drain to Source On-state Resistance mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Note Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr ID = −6 A VDD = −24 V VGS = −10 V IF = 6 A, VGS = 0 V IF = 6 A, VGS = 0 V di/dt = 100 A/µs 11 1.7 3.3 0.92 21 12 Note Pulsed TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = −20 → 0 V − ID VDD 50 Ω L VDD PG. BVDSS VDS VGS(−) 0 τ Starting Tch τ = 1 µs Duty Cycle ≤ 1% VDS Wave Form TEST CIRCUIT 2 SWITCHING TIME D.U.T. RL RG VDD VDS(−) 90% 10% 10% 90% VGS(−) VGS Wave Form 0 10% VGS 90% IAS VDS 0 td(on) ton tr td(off) toff tf TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = −2 mA PG. 50 Ω RL VDD 4 Data Sheet G16954EJ2V0DS µ PA2790GR TYPICAL CHARACTERISTICS (TA = 25°C) (1) N-channel DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA PT - Total Power Dissipation - W/package TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2.8 2.4 2 units 2.0 1 unit 1.6 1.2 0.8 0.4 0 0 20 40 60 80 100 120 140 160 Mounted on ceramic substrate of 2000 mm2 x 1.6 mm dT - Percentage of Rated Power - % 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA TA - Ambient Temperature - ˚C 100 ID(pulse) RDS(on) Limited (at VGS = 10 V) PW = 100 µs ID(DC) ID - Drain Current - A 10 DC 1 10 ms 100 ms Power Dissipation Limited 1 ms 0.1 TA = 25°C Single pulse Mounted on ceramic substrate of 2000 mm x 1.6 mm 2 0.01 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W 100 Rth(ch-A) = 73.5°C/W 10 1 TA = 25°C, Single pulse, 1 unit Mounted on ceramic substrate of 2000 mm2 x 1.6 mm 1m 10 m 100 m 1 PW - Pulse Width - s 10 100 1000 0.1 100 µ Data Sheet G16954EJ2V0DS 5 µ PA2790GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 25 10 V ID - Drain Current - A 100 4.5 V ID - Drain Current - A 20 15 10 5 Pulsed 0 0 0.5 1 1.5 2 VDS - Drain to Source Voltage - V 10 TA = −55°C 25°C 75°C 150°C VGS = 4.0 V 1 0.1 VDS = 10 V Pulsed 0.01 0 1 2 3 4 5 VGS - Gate to Source Voltage - V GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 3 VGS(off) - Gate Cut-off Voltage - V 100 TA = −55°C 25°C 75°C 150°C 2 10 1 VDS = 10 V ID = 1 m A 0 -50 0 50 100 150 Tch - Channel Temperature - °C 1 VDS = 10 V Pulsed 0.1 0.1 1 10 100 ID - Drain Current - A 150 Pulsed 125 100 75 50 25 0 0.1 1 10 100 ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 150 125 100 75 50 25 0 0 5 10 15 20 VGS - Gate to Source Voltage - V ID = 3 A Pulsed VGS = 4.0 V 4.5 V 10 V 6 Data Sheet G16954EJ2V0DS µ PA2790GR DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 50 40 30 20 10 0 -50 0 50 100 150 Tch - Channel Temperature - °C Ciss, Coss, Crss - Capacitance - pF 10000 VGS = 4.0 V 4.5 V 10 V VGS = 0 V f = 1 MHz 1000 Ciss 100 Coss Crss ID = 3 A Pulsed 10 0.1 1 10 100 VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns 30 VDD = 24 V 15 V 6V 15 VGS - Gate to Source Voltage - V tf 10 td(on) td(off) 20 10 tr 10 VGS VDS 5 VDS = 15 V VGS = 10 V RG = 10 Ω 1 10 100 ID = 6 A 0 10 15 1 0.1 ID - Drain Current - A 0 0 5 QG - Gate Charge - nC SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 100 trr - Reverse Recovery Time - ns IF - Diode Forward Current - A 100 10 VGS = 10 V 1 0V 10 0.1 Pulsed 0.01 0 0.5 1 VF(S-D) - Source to Drain Voltage - V di/dt = 100 A/µs VGS = 0 V 1 0.1 1 10 100 IF - Diode Forward Current - A Data Sheet G16954EJ2V0DS 7 µ PA2790GR (2) P-channel DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA PT - Total Power Dissipation - W/package TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE 2.8 2.4 2 units 2.0 1 unit 1.6 1.2 0.8 0.4 0 0 20 40 60 80 100 120 140 160 Mounted on ceramic substrate of 2000 mm2 x 1.6 mm dT - Percentage of Rated Power - % 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA TA - Ambient Temperature - ˚C -100 ID(DC) ID(pulse) PW = 100 µs ID - Drain Current - A -10 RDS(on) Limited (at VGS = −10 V) DC -1 1 ms 10 ms 100 ms Power Dissipation Limited -0.1 TA = 25°C Single pulse Mounted on ceramic substrate of 2000 mm2 x 1.6 mm -0.01 -0.01 -0.1 -1 -10 -100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 rth(t) - Transient Thermal Resistance - °C/W 100 Rth(ch-A) = 73.5°C/W 10 1 TA = 25°C, Single pulse, 1 unit Mounted on ceramic substrate of 2000 mm2 x 1.6 mm 0.1 100 µ 1m 10 m 100 m 1 PW - Pulse Width - s 10 100 1000 8 Data Sheet G16954EJ2V0DS µ PA2790GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS -25 VGS = −10 V ID - Drain Current - A -100 −4.5 V ID - Drain Current - A -20 -15 −4.0 V -10 -1 -10 -5 Pulsed 0 0 -0.5 -1 -1.5 -2 VDS - Drain to Source Voltage - V -0.1 TA = −55°C 25°C 75°C 150°C VDS = −10 V Pulsed -0.01 0 -1 -2 -3 -4 -5 VGS - Gate to Source Voltage - V GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT -3 VGS(off) - Gate Cut-off Voltage - V 100 TA = −55°C 25°C 75°C 150°C -2 10 -1 VDS = −10 V ID = 1 m A 0 -50 0 50 100 150 Tch - Channel Temperature - °C 1 VDS = −10 V Pulsed 0.1 -0.1 -1 -10 -100 ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 300 250 200 150 100 50 Pulsed 300 250 200 150 100 50 0 0 -5 -10 I D = −3 A Pulsed VGS = −4.0 V −4.5 V −10 V 0 -0.1 -1 -10 -100 -15 -20 ID - Drain Current - A VGS - Gate to Source Voltage - V Data Sheet G16954EJ2V0DS 9 µ PA2790GR DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ 100 80 60 40 20 0 -50 0 50 100 150 Tch - Channel Temperature - °C Ciss, Coss, Crss - Capacitance - pF 10000 VGS = −4.0 V −4.5 V −10 V VGS = 0 V f = 1 MHz 1000 Ciss 100 Coss Crss ID = 3 A Pulsed 10 -0.1 -1 -10 -100 VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 VDS - Drain to Source Voltage - V td(on), tr, td(off), tf - Switching Time - ns -30 -15 VGS - Gate to Source Voltage - V td(off) tf 10 td(on ) -20 VDD = −24 V −15 V −6 V -10 tr -10 VGS VDS -5 1 -0.1 VDS = −15 V VGS = −10 V RG = 10 Ω -10 -100 I D = −6 A 0 10 15 0 0 5 QG - Gate Charge - nC -1 ID - Drain Current - A SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT 100 IF - Diode Forward Current - A 100 VGS = −10 V trr - Reverse Recovery Time - ns 10 1 0V 10 0.1 Pulsed 0.01 0 0.5 1 VF(S-D) - Source to Drain Voltage - V di/dt = 100 A/µs VGS = 0 V 1 0.1 1 10 100 IF - Diode Forward Current - A 10 Data Sheet G16954EJ2V0DS µ PA2790GR • T he information in this document is current as of August, 2004. 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