0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
NJU6052V-TE1

NJU6052V-TE1

  • 厂商:

    NJRC

  • 封装:

    LSSOP20

  • 描述:

    IC LED DRIVER RGLTR DIM 20SSOP

  • 数据手册
  • 价格&库存
NJU6052V-TE1 数据手册
NJU6052 PRELIMINARY White LED Driver with Automatic Dimming Control ! GENERAL DESCRIPTION The NJU6052 is a white LED driver with an automatic dimming control. It contains an output driver, a PWM controller, a luminance sensor control (power supply for sensor & A/D converter), a step-up DC/DC converter, a serial interface, etc. The output driver ensures a 60mA maximum capability which allows the connection of 12 white LEDs (4 series x 3 parallels). Depending on the ambient light sensed with an external luminance sensor, the PWM controller controls PWM duty in 8 steps preselected out of 64 steps. In addition, the frequency of the DC/DC converter is high so that it permits the use of small, low-profile inductors and capacitors to minimize the footprint in space-conscious applications. All of these benefits make the NJU6052 suitable for the battery-powered portable applications such as a cellular phone, a camcorder, PDA, etc. ! PACKAGE OUTLINE NJU6052KN1 NJU6052V ! FEATURES # Drives up to 12 white LEDs (4 series x 3 parallels) VSW = 18.0V(Max.), IOUT = 60mA # Built-in PWM Dimming Control (Selectable 8 out of 64 steps) # Built-in Luminance Sensor Control (Power Supply for Sensor & A/D converter) # # # # # # (No MPU-access required after initial setting) Built-in Temperature Compensation Circuit to Suppress the Characteristic Degradation of LEDs Uses Small Inductor and Capacitors 1.8V to 3.6V Operating Voltage for Logic Circuits (VDDL) 3.0V to 5.5V Operating Voltage for Step-up Circuits (VDD) CMOS Technology Package : QFN28 / SSOP20 Ver.2004-02-26 -1- NJU6052 ! QFN20 PIN CONNECTIONS (TOP VIEW) NC CX REF VSS VSS VSS NC NC NC FB VSO VOUT SENS SW RSTb SW SCK SW DATA NC NC NC REQ VDDL VDD NC TEST NC ! SSOP20 PIN CONNECTIONS (TOP VIEW) SW VOUT SW FB SW VSS TEST VSS NC VSS VDD REF VDDL REQ -2- CX VSO DATA SENS SCK RSTb Ver.2004-02-26 NJU6052 ! PIN DESCRIPTION QFN No. SSOP SYMBOL TYPE DESCRIPTIONS 4 6 VDD Power VDD Power Supply - Power supply for step-up voltage 5 7 VDDL Power VDDL Power Supply - Power supply for logic voltage. - Relation:1.8V ≤ VDDL≤ VDD should be maintained. 25 26 27 1 2 3 SW Input Switch - All these terminals should be connected together. 10 10 SCK Input 9 9 DATA Input / Output 2 4 TEST Output 6 8 REQ Input 12 12 SENS Input 11 11 RSTb Input 24 20 VOUT Input 23 19 FB Input 18 19 20 16 17 18 VSS Power 16 14 CX/TCLK Input 13 13 VSO Output 17 15 REF Input 1 3 7 8 14 15 21 22 28 5 NC - Ver.2004-02-26 Shift Clock - Serial data is latched on the rising edge of SCK. Serial Data Test - This terminal must be open. Data Request “L” : Writing command data “H” : Reading sensor data Luminance Sensor Connection Reset - Active “L”. Input - This terminal is connected to LED anode. Feedback Ground - All these terminals should be connected together. Oscillator Capacitor Connection / External Clock Input VSO Power Supply - Power supply for luminance sensor - 2.4V typical Reference Voltage - This terminal must be open. Non Connection - These terminals must be open. -3- NJU6052 ! BLOCK DIAGRAM L1 VDD D1 SW VOUT VSO Regulator C1 C2 SENS A/D Converter Register PWM Controller A1 VDDL REQ Logic Serial Interface REF VREF SCK DATA RSTb CX/TCLK FB RLED A2 Reset VSS OSC TEST -4- Ver.2004-02-26 NJU6052 ! FUNCTIONAL DESCRIPTONS (1) LED CURRENT CONTROL The NJU6052 incorporates the LED current control circuit to regulate the LED current (ILED), which is programmed by the feedback resistor (RLED) connected between the FB and VSS terminals. The reference voltage VREF is internally regulated to 0.6V typical and connected to the positive input of the built-in comparator A1. Formula (1) is used to choose the value of the RLED, as shown below. RLED = VREF I LED --- Formula (1) VREF=0.6V (TYP.) Referring to the block diagram is recommended for understanding the operation of the LED current control. The ILED is the constant current programmed by the RLED. When the feedback voltage on the FB terminal reaches above the reference voltage VREF on the REF terminal (i.e., ILED is above the level programmed by RLED), the output capacitor C2 delivers the ILED. Once the feedback voltage drops below the reference voltage (i.e., ILED drops below the level programmed by RLED), the comparator A1 detects it and turns on the internal MOS switch, then the current of the inductor L1 begins increasing. When this switch current reaches 720mA and the comparator A2 detects it, or when the predetermined switch-on-period expires, the MOS switch is turned off. The L1 then delivers current to the output through the diode D1 as the inductor current drops. After that, the MOS switch is turned on again and the switch current increases up to 720mA. This switching cycle continues until the ILED reaches the level programmed by the RLED, then the ILED is maintained constant. When the feedback voltage is less than 1/2*VREF, the current limit of the MOS switch is reduced to 500mA typical. This action reduces the average inductor-current, minimizes the power dissipation and protects the IC against high current at start-up. The total forward-voltage of the LEDs must be greater than the power supply voltage VDD, otherwise the LEDs remain lighting up, being out of control. (2) OSCILLATOR The built-in oscillator incorporates a reference power supply, so its frequency is independent from the VDD. The frequency is varied by the external capacitor CX, as shown in Figure 7. (3) LUMINANCE SENSOR CONTROL The luminance sensor control circuits consist of the power supply for sensor and the A/D converter. The A/D converter senses the voltage on the SENS terminal and selects 1 out of 8 registers (PWM REGISTER 0–7). And the data in the selected register is reflected to the PWM duty (PWM dimming control). The contents of the registers can be programmed through the serial interface, in other words, the dimming control is user-settable. The voltage sense and the register selection are updated at regular intervals, and the interval period is set by the “DIVIDE” bits. The selected register is held by setting “1” at the “HOLD” bit of the command data. Ver.2004-02-26 -5- NJU6052 (4) PWM DIMMING CONTROL By setting the duty data at “PWM REGISTER” bits, 8 out of 64 registers are assigned to the PWM REGISTER 0-7. The PWM duty is changed depending on the register selected by the SENS voltage. The relation between the PWM REGISTER and its duty is shown below. TABLE 1 PWM DUTY vs. PWM REGISTER REGISTER DUTY REGISTER 0,0,0,0,0,0 OFF 0,1,0,0,0,0 0,0,0,0,0,1 3.13% 0,1,0,0,0,1 0,0,0,0,1,0 4.69% 0,1,0,0,1,0 0,0,0,0,1,1 6.25% 0,1,0,0,1,1 0,0,0,1,0,0 7.81% 0,1,0,1,0,0 0,0,0,1,0,1 9.38% 0,1,0,1,0,1 0,0,0,1,1,0 10.94% 0,1,0,1,1,0 0,0,0,1,1,1 12.50% 0,1,0,1,1,1 0,0,1,0,0,0 14.06% 0,1,1,0,0,0 0,0,1,0,0,1 15.63% 0,1,1,0,0,1 0,0,1,0,1,0 17.19% 0,1,1,0,1,0 0,0,1,0,1,1 18.75% 0,1,1,0,1,1 0,0,1,1,0,0 20.31% 0,1,1,1,0,0 0,0,1,1,0,1 21.88% 0,1,1,1,0,1 0,0,1,1,1,0 23.44% 0,1,1,1,1,0 0,0,1,1,1,1 25.00% 0,1,1,1,1,1 DUTY 26.56% 28.13% 29.69% 31.25% 32.81% 34.38% 35.94% 37.50% 39.06% 40.63% 42.19% 43.75% 45.31% 46.88% 48.44% 50.00% REGISTER 1,0,0,0,0,0 1,0,0,0,0,1 1,0,0,0,1,0 1,0,0,0,1,1 1,0,0,1,0,0 1,0,0,1,0,1 1,0,0,1,1,0 1,0,0,1,1,1 1,0,1,0,0,0 1,0,1,0,0,1 1,0,1,0,1,0 1,0,1,0,1,1 1,0,1,1,0,0 1,0,1,1,0,1 1,0,1,1,1,0 1,0,1,1,1,1 DUTY 51.56% 53.13% 54.69% 56.25% 57.81% 59.38% 60.94% 62.50% 64.06% 65.63% 67.19% 68.75% 70.31% 71.88% 73.44% 75.00% REGISTER 1,1,0,0,0,0 1,1,0,0,0,1 1,1,0,0,1,0 1,1,0,0,1,1 1,1,0,1,0,0 1,1,0,1,0,1 1,1,0,1,1,0 1,1,0,1,1,1 1,1,1,0,0,0 1,1,1,0,0,1 1,1,1,0,1,0 1,1,1,0,1,1 1,1,1,1,0,0 1,1,1,1,0,1 1,1,1,1,1,0 1,1,1,1,1,1 DUTY 76.56% 78.13% 79.69% 81.25% 82.81% 84.38% 85.94% 87.50% 89.06% 90.63% 92.19% 93.75% 95.31% 96.88% 98.44% 100.00% The relation between the PWM REGISTER and SENS voltage is reversed by the “REV” bit, as follows. TABLE 2 REV vs. PWM REGISTER REV PWM REGISTER PWM REGISTER0 PWM REGISTER1 0 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 PWM REGISTER7 PWM REGISTER6 1 PWM REGISTER5 PWM REGISTER4 PWM REGISTER3 PWM REGISTER2 PWM REGISTER1 PWM REGISTER0 Note 1) For the information on the relation between PWM duty and LED current (ILED), refer to “(9-1) PWM DUTY and LED CURRENT“. Note 2) For the information on the relation between SENS voltage and PWM REGISTER, refer to “DC ELECTRICAL CHARACTERISTICS”. -6- Ver.2004-02-26 NJU6052 (5) SERIAL INTERFACE (5-1) SERIAL DATA WRITE The serial data is latched into the shift register on the rising edge of the serial clock (SCK), and determined on the rising edge of the data request (REQ). The serial data format should be the MSB first. For COMMAND data transmission, the command data 1 (CMD1) and the command data 2 (CMD2) should be continuous. The CMD1 is first, then the CMD2. If only 1-byte data is transferred, this data is recognized as the CMD1. Do not transmit 3 bytes or more, because 3rd data is used only for maker test and the 4th and later are ignored. If it's absolute necessary to send the 3 bytes or more in the user's application, the only data (0,0,0,0,0,0,0,0) as the 3rd data can be accepted. For DUTY data transmission, 8 bytes for PWM REGISTER 0-7 should be continuous. The order is : PWM REGISTER 0, 1, 2, 3, 4, 5, 6 and 7. If 7bytes or less are transferred, all bytes are accepted. And if 9 bytes or more, the 9th and later are ignored. Note that the data should be in 8*n bits (n=integer number), otherwise it may cause malfunctions. And the SCK should be “0” when the REQ is changed. SERIAL DATA FORMAT TABLE 3-1 Command Data 1 B7 B6 B5 B4 0 SOFF BRIGHT TABLE 3-2 Command Data 2 B7 B6 B5 B4 0 0 0 0 TABLE 3-3 Duty Data B7 B6 B5 1 * FIGURE 1 B4 B3 B2 STBY B3 0 B2 0 B1 HOLD B0 REV B1 B0 DIVIDE B3 B2 PWM REGISTER B1 B0 COMMAND DATA TRANSMISSION REQ SCK DATA B7 6 5 4 3 2 1 0 B7 6 5 4 CMD1 FIGURE 2 3 2 1 0 0 B7 6 CMD2 DUTY DATA TRANSMISSION REQ SCK DATA B7 PWM REGISTER Ver.2004-02-26 6 5 4 3 0 2 1 0 B7 6 1 0 B7 6 6 7 -7- NJU6052 (5-2) SENSOR DATA READ The DATA terminal becomes output state by setting the REQ terminal to “1” after the command data transmission. And the sensor data is read out, synchronizing with the SCK. The bit number corresponding to a selected register is “1” and the others are “0”, as shown below. FIGURE 3 SENSOR DATA READ (REV=0, PWM REGISTER4 selected) REQ SCK DATA B7 0 Command Data (Input) 1 2 3 4 5 6 7 Sensor Data (Output) (5-3) SOFF and BRIGHT By setting “1” at the SOFF bit, the luminance sensor control is disabled and the PWM duty is controlled by the BRIGHT bits, as shown below. TABLE 4 SOFF and BRIGHT SOFF BRIGHT REV 0 - 0 1 000 001 010 011 100 101 110 111 - PWM REGISTER PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 Note 1) When SOFF=”0”, luminance sensor control is enabled and PWM REGISTER is selected according to SENS voltage. Note 2) For the information on the relation between SENS voltage and PWM REGISTER, refer to “DC ELECTRICAL CHARACTERISTICS”. (5-4) STBY By setting “1” at the STBY bit, the NJU6052 goes into the standby mode, as follows. - DC/DC converter, oscillator, reference voltage generator, and power supply for sensor are halted. - The contents of PWM REGISTER are maintained. - Luminance sensor control circuit is initialized. -8- Ver.2004-02-26 NJU6052 (5-5) HOLD By setting “1” at the HOLD bit, the selected PWM REGISTER is held and the luminance sensor control cannot be used. In other words, this setting works so that the luminance of the LEDs doesn’t change even if the SENS voltage changes. The selection is initialized to the PWM REGISTER 0 by the reset. And when the standby is released, the selection is initialized to the PWM REGISTER 0 at REV=“0” or the PWM REGISTER 7 at REV=“1”. (5-6) REV By setting “1” at the REV bit, the correspondence between the PWM REGISTER and SENS voltage is reversed. TABLE 5 REV REV 0 1 PWM REGISTER PWM REGISTER0 PWM REGISTER1 PWM REGISTER2 PWM REGISTER3 PWM REGISTER4 PWM REGISTER5 PWM REGISTER6 PWM REGISTER7 PWM REGISTER7 PWM REGISTER6 PWM REGISTER5 PWM REGISTER4 PWM REGISTER3 PWM REGISTER2 PWM REGISTER1 PWM REGISTER0 (5-7) DIVIDE By setting the DIVIDE bits, the sensor-sampling-time (tSENS) and PWM frequency (fPWM) are changed. Note that these parameters are varied depending on the oscillation frequency (FOSC). The formula (2) gives the sensor-sampling-time. t sens = TABLE 6 2 (17 + N ) f OSC (sec) --- Formula (2) SENSOR SAMPLING TIME DIVIDE N 00 01 10 11 0 1 2 3 FOSC 100kHz 1.311 2.621 5.243 10.486 200kHz 0.655 1.311 2.621 5.243 400kHz 0.328 0.655 1.311 800kHz 0.164 0.328 0.655 2.621 1.311 UNIT : sec Ver.2004-02-26 -9- NJU6052 And, the formula (3) gives the PWM frequency. f pwm = TABLE 7 f 1 ⋅ ( 3osc 64 2 + N ) ( Hz ) --- Formula (3) PWM FREQUENCY DIVIDE N 00 01 10 11 0 1 2 3 FOSC 100kHz 195.3 97.7 48.8 24.4 200kHz 390.6 400kHz 781.3 390.6 195.3 97.7 48.8 195.3 800kHz 1562.5 781.3 390.6 97.7 195.3 UNIT : Hz NOTE) PWM frequencies written in bold or neighbors are recommended, otherwise it might cause LED flickering. (6) LEVEL SHIFTER The level shifter allows the communication with the MPU working at the power supply voltage lower than the VDD. Apply the MPU power-supply-voltage on the VDDL terminal. The voltage range is: 1.8V
NJU6052V-TE1 价格&库存

很抱歉,暂时无法提供与“NJU6052V-TE1”相匹配的价格&库存,您可以联系我们找货

免费人工找货