54F379DM

54F 74F379 Quad Parallel Register with Enable August 1995 54F 74F379 Quad Parallel Register with Enable General Description The ’F379 is a 4-bit register with buffered common Enable This device is similar to the ’F175 but features the common Enable rather than common Master Reset Features Y Y Y Y Y Edge triggered D-type inputs Buffered positive edge-triggered clock Buffered common enable input True and complement outputs Guaranteed 4000V minimum ESD protection Commercial 74F379PC Military Package Number N16E Package Description 16-Lead (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line 16-Lead (0 300 Wide) Molded Small Outline JEDEC 16-Lead (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F379DM (QB) 74F379SC (Note 1) 74F379SJ (Note 1) 54F379FM (QB) 54F379LM (QB) J16A M16A M16D W16A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Logic Symbols IEEE IEC Connection Diagrams Pin Assignment DIP SOIC and Flatpak Pin Assignment for LCC TL F 9527 – 1 TL F 9527 – 2 TL F 9527–5 TL F 9527–3 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9527 RRD-B30M115 Printed in U S A Unit Loading Fan Out 54F 74F Pin Names Description UL Input IIH IIL HIGH LOW Output IOH IOL 10 10 10 10 10 10 50 33 3 50 33 3 20 mA b0 6 mA 20 mA b0 6 mA 20 mA b0 6 mA b 1 mA 20 mA b 1 mA 20 mA E D 0 – D3 CP Q0 – Q3 Q0 – Q3 Enable Input (Active LOW) Data Inputs Clock Pulse Input (Active Rising Edge) Flip-Flop Outputs Complement Outputs Functional Description The ’F379 consists of four edge-triggered D-Type flip-flops with individual D inputs and Q and Q outputs The Clock (CP) and Enable (E) inputs are common to all flip-flops When the E is input HIGH the register will retain the present data independent of the CP input The Dn and E inputs can change when the clock is in either state provided that the recommended setup and hold times are observed Truth Table Inputs E H L L CP L L L Dn X H L Qn NC H L Outputs Qn NC L H H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Transition NC e No Change Logic Diagram TL F 9527 – 4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 2 Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Plastic VCC Pin Potential to Ground Pin b 65 C to a 150 b 55 C to a 125 b 55 C to a 175 b 55 C to a 150 Recommended Operating Conditions Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial b 55 C to a 125 C 0 C to a 70 C a 4 5V to a 5 5V a 4 5V to a 5 5V C C C C b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltge (Min) 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol VIH VIL VCD VOH Parameter Min Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Short-Circuit Current Power Supply Current b 60 54F 74F Typ Max Units V 08 b1 2 VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal 20 V V V Min Min IIN e b18 mA IOH e b1 mA IOH e b1 mA IOH e b1 mA IOL e 20 mA IOL e 20 mA VIN e 2 7V VIN e 7 0V VOUT e VCC IID e 1 9 mA All Other Pins Grounded VIOD e 150 mV All Other Pins Grounded VIN e 0 5V VOUT e 0V VO e LOW 54F 10% VCC 74F 10% VCC 74F 5% VCC 54F 10% VCC 74F 10% VCC 54F 74F 54F 74F 54F 74F 74F 74F 25 25 27 05 05 20 0 50 100 70 250 50 4 75 3 75 b0 6 b 150 VOL IIH IBVI ICEX VID IOD IIL IOS ICCL V mA mA mA V mA mA mA mA Min Max Max Max 00 00 Max Max Max 28 40 3 AC Electrical Characteristics 74F Symbol Parameter Min fmax tPLH tPHL Maximum Clock Frequency Propagation Delay CP to Qn Qn 100 35 50 TA e a 25 C VCC e a 5 0V CL e 50 pF Typ 140 50 65 65 85 Max 54F TA VCC e Mil CL e 50 pF Min 75 30 40 85 10 0 Max 74F TA VCC e Com CL e 50 pF Min 100 35 50 75 95 Max MHz ns Units AC Operating Requirements 74F Symbol Parameter TA e a 25 C VCC e a 5 0V Min ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup Time HIGH or LOW Dn to CP Hold Time HIGH or LOW Dn to CP Setup Time HIGH or LOW E to CP Hold Time HIGH or LOW E to CP CP Pulse Width HIGH or LOW 30 30 10 10 60 60 0 0 40 50 Max 54F TA VCC e Mil Min 40 40 20 20 80 80 0 0 50 70 Max 74F TA VCC e Com Min Max 30 30 10 10 60 60 0 0 40 50 ns Units ns ns Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows 74F Temperature Range Family 74F e Commercial 54F e Military Device Type Package Code P e Plastic DIP D e Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ 379 S C X Special Variations QB e Military grade device with environmental and burn-in processing X e Devices shipped in 13 reel Temperature Range C e Commercial (0 C to a 70 C) M e Military (b55 C to a 125 C) 4 Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) NS Package Number E20A 16-Lead Ceramic Dual-In-Line Package (D) NS Package Number J16A 5 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 150 Wide) Molded Small Outline Integrated Circuit (S) NS Package Number M16A 16-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M16D 6 Physical Dimensions inches (millimeters) (Continued) 16-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N16E 7 54F 74F379 Quad Parallel Register with Enable Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flatpak (F) NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications