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54LS169LMQB

54LS169LMQB

  • 厂商:

    NSC

  • 封装:

  • 描述:

    54LS169LMQB - Synchronous 4-Bit Up/Down Binary Counter - National Semiconductor

  • 数据手册
  • 价格&库存
54LS169LMQB 数据手册
54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter June 1989 54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs all change at the same time when so instructed by the countenable inputs and internal gating This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple clock) counters A buffered clock input triggers the four master-slave flip-flops on the rising edge of the clock waveform This counter is fully programmable that is the outputs may each be preset either high or low The load input circuitry allows loading with the carry-enable output of cascaded counters As loading is synchronous setting up a low level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse The carry look-ahead circuitry permits cascading counters for n-bit synchronous applications without additional gating Both count-enable inputs (P and T) must be low to count The direction of the count is determined by the level of the up down input When the input is high the counter counts up when low it counts down Input T is fed forward to enable the carry outputs The carry output thus enabled will produce a low-level output pulse with a duration approximately equal to the high portion of the QA output when counting up and approximately equal to the low portion of the QA output when counting down This low-level overflow carry pulse can be used to enable successively cascaded stages Transitions at the enable P or T inputs are allowed regardless of the level of the clock input All inputs are diode clamped to minimize transmission-line effects thereby simplifying system design This counter features a fully independent clock circuit Changes at control inputs (enable P enable T load up down) which modify the operating mode have no effect until clocking occurs The function of the counter (whether enabled disabled loading or counting) will be dictated solely by the conditions meeting the stable setup and hold times Features Y Y Y Y Y Fully synchronous operation for counting and programming Internal look-ahead for fast counting Carry output for n-bit cascading Fully independent clock circuit Alternate Military Aerospace device (54LS169) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package TL F 6401 – 1 Order Number 54LS169DMQB 54LS169FMQB 54LS169LMQB DM54LS169AJ DM54LS169AW DM74LS169AM or DM74LS169AN See NS Package Number E20A J16A M16A N16E or W16A C1995 National Semiconductor Corporation TL F 6401 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55 C to a 125 C DM54LS and 54LS DM74LS 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL fCLK tW tSU Parameter Min Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Clock Frequency (Note 1) Clock Frequency (Note 2) Clock Pulse Width (Note 3) Setup Time (Note 3) Data Enable T or P Load UD tH TA Hold Time (Note 3) Free Air Operating Temperature 0 0 25 20 20 25 30 0 b 55 DM54LS169A Nom 5 Max 55 07 b0 4 DM74LS169A Min 4 75 2 08 b0 4 Units Max 5 25 V V V mA mA MHz MHz ns Nom 5 45 2 4 25 20 0 0 25 20 20 8 25 20 ns 25 30 0 125 0 70 ns C Note 1 CL e 15 pF RL e 2 kX TA e 25 C and VCC e 5V Note 2 CL e 50 pF RL e 2 kX TA e 25 C and VCC e 5V Note 3 TA e 25 C and VCC e 5V Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Conditions VCC e Min II e b18 mA VCC e Min IOH e Max VIL e Max VIH e Min VCC e Min IOL e Max VIL e Max VIH e Min IOL e 4 mA VCC e Min II IIH IIL IOS ICC Input Current Input Voltage Max VCC e Max VI e 7V VCC e Max VI e 2 7V VCC e Max VI e 0 4V VCC e Max (Note 5) VCC e Max (Note 6) Min Typ (Note 4) 34 34 0 25 0 35 0 25 04 05 04 02 01 40 20 b0 8 b0 4 b 20 b 20 b 100 b 100 Max b1 5 Units V V DM54 DM74 DM54 DM74 DM74 Enable T Others Enable T Others Enable T Others DM54 DM74 25 27 V mA mA mA mA mA High Level Input Current Low Level Input Current Short Circuit Output Current Supply Current 20 34 Note 4 All typicals are at VCC e 5V and TA e 25 C Note 5 Not more than one output should be shorted at a time and the duration should not exceed one second Note 6 ICC is measured after a momentary 4 5V then ground is applied to the CLOCK with all other inputs grounded and all the outputs open 2 Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) RL e 2 kX Symbol Parameter From (Input) To (Output) fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output Clock to Ripple Carry Clock to Ripple Carry Clock to Any Q Clock to Any Q Enable T to Ripple Carry Enable T to Ripple Carry Up Down to Ripple Carry (Note 1) Up Down to Ripple Carry (Note 1) CL e 15 pF Min 25 35 35 20 23 18 18 25 29 Max CL e 50 pF Min 20 39 44 24 32 24 28 30 38 Max MHz ns ns ns ns ns ns ns ns Units Note 1 The propagation delay from UP DOWN to RIPPLE CARRY must be measured with the counter at either a minimum or a maximum count As the logic level of the up down input is changed the ripple carry output will follow If the count is minimum the ripple carry output transition will be in phase If the count is maximum the ripple carry output will be out of phase 3 Logic Diagram LS169A Binary Counter TL F 6401 – 2 4 Timing Diagram LS169A Binary Counters Typical Load Count and Inhibit Sequences TL F 6401 – 3 5 Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier Package (E) Order Number 54LS169LMQB NS Package Number E20A 16-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS169DMQB or DM54LS169AJ NS Package Number J16A 6 Physical Dimensions inches (millimeters) (Continued) 16-Lead Small Outline Molded Package (M) Order Number DM74LS169AM NS Package Number M16A 16-Lead Molded Dual-In-Line Package (N) Order Number DM74LS169AN NS Package Number N16E 7 54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flat Package (W) Order Number 54LS169FMQB or DM54LS169AW NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications
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