LF156H

LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers December 2001 LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers General Description These are the first monolithic JFET input operational amplifiers to incorporate well matched, high voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner. n Logarithmic amplifiers n Photocell amplifiers n Sample and Hold circuits Common Features n Low input bias current: 30pA n Low Input Offset Current: 3pA n High input impedance: 1012Ω n Low input noise current: n High common-mode rejection ratio: n Large dc voltage gain: 106 dB 100 dB Features Advantages n Replace expensive hybrid and module FET op amps n Rugged JFETs allow blow-out free handling compared with MOSFET input devices n Excellent for low noise applications using either high or low source impedance — very low 1/f corner n Offset adjust does not degrade drift or common-mode rejection as in most monolithic amplifiers n New output stage allows use of large capacitive loads (5,000 pF) without stability problems n Internal compensation and large differential input voltage capability Uncommon Features LF155/ LF355 j Extremely LF156/ LF256/ LF356 1.5 LF257/ LF357 (AV =5) 1.5 Units 4 µs fast settling time to 0.01% j Fast slew 5 2.5 20 12 5 12 50 20 12 V/µs MHz rate j Wide gain Applications n n n n Precision high speed integrators Fast D/A and A/D converters High impedance buffers Wideband, low noise, low drift amplifiers bandwidth j Low input noise voltage Simplified Schematic 00564601 *3pF in LF357 series. BI-FET™, BI-FET II™ are trademarks of National Semiconductor Corporation. © 2001 National Semiconductor Corporation DS005646 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, contact the National Semiconductor Sales Office/Distributors for availability and specifications. LF155/6 Supply Voltage Differential Input Voltage Input Voltage Range (Note 2) Output Short Circuit Duration TJMAX H-Package N-Package M-Package Power Dissipation at TA = 25˚C (Notes 1, 8) H-Package (Still Air) H-Package (400 LF/Min Air Flow) N-Package M-Package Thermal Resistance (Typical) θJA H-Package (Still Air) H-Package (400 LF/Min Air Flow) N-Package M-Package (Typical) θJC H-Package Storage Temperature Range Soldering Information (Lead Temp.) Metal Can Package Soldering (10 sec.) Dual-In-Line Package Soldering (10 sec.) Small Outline Package Vapor Phase (60 sec.) Infrared (15 sec.) 215˚C 220˚C 215˚C 220˚C 260˚C 260˚C 260˚C 300˚C 300˚C 300˚C 23˚C/W −65˚C to +150˚C 23˚C/W −65˚C to +150˚C 23˚C/W −65˚C to +150˚C 160˚C/W 65˚C/W 160˚C/W 65˚C/W 130˚C/W 195˚C/W 160˚C/W 65˚C/W 130˚C/W 195˚C/W 560 mW 1200 mW 400 mW 1000 mW 670 mW 380 mW 400 mW 1000 mW 670 mW 380 mW 150˚C 115˚C 100˚C 100˚C 115˚C 100˚C 100˚C LF256/7/LF356B LF355/6/7 ± 22V ± 40V ± 20V Continuous ± 22V ± 40V ± 20V Continuous ± 18V ± 30V ± 16V Continuous See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices. ESD tolerance (100 pF discharged through 1.5kΩ) 1000V 1000V 1000V DC Electrical Characteristics (Note 3) Symbol VOS ∆VOS/∆T ∆TC/∆VOS IOS Parameter Input Offset Voltage Average TC of Input Offset Voltage Change in Average TC with VOS Adjust Input Offset Current Conditions Min RS =50Ω, TA =25˚C Over Temperature RS =50Ω RS =50Ω, (Note 4) TJ =25˚C, (Notes 3, 5) TJ≤THIGH 5 0.5 3 20 20 LF155/6 Typ 3 Max Min 5 7 5 0.5 3 20 1 LF256/7 LF356B Typ 3 Max Min 5 6.5 5 0.5 3 50 2 LF355/6/7 Typ 3 Max 10 13 mV mV µV/˚C µV/˚C per mV pA nA Units www.national.com 2 LF155/LF156/LF256/LF257/LF355/LF356/LF357 DC Electrical Characteristics (Note 3) Symbol IB RIN AVOL Parameter Input Bias Current Input Resistance Large Signal Voltage Gain Output Voltage Swing Input Common-Mode Voltage Range Common-Mode Rejection Ratio Supply Voltage Rejection Ratio (Note 6) (Continued) LF256/7 LF356B Max Min 100 50 10 50 25 12 Conditions Min TJ =25˚C, (Notes 3, 5) TJ≤THIGH TJ =25˚C VS = ± 15V, TA =25˚C VO = ± 10V, RL =2k Over Temperature LF155/6 Typ 30 LF355/6/7 Max Min 100 5 Typ 30 10 25 15 12 Units pA nA Ω V/mV V/mV Typ 30 10 12 Max 200 8 200 50 25 200 200 VO VCM CMRR PSRR VS = ± 15V, RL =10k VS = ± 15V, RL =2k VS = ± 15V ± 12 ± 10 ± 11 85 85 ± 13 ± 12 +15.1 −12 100 100 ± 12 ± 10 ± 11 85 85 ± 13 ± 12 ± 15.1 −12 100 100 ± 12 ± 10 +10 80 80 ± 13 ± 12 +15.1 −12 100 100 V V V V dB dB DC Electrical Characteristics TA = TJ = 25˚C, VS = ± 15V Parameter Supply Current LF155 Typ 2 Max 4 LF355 Typ 2 Max 4 LF156/256/257/356B Typ 5 Max 7 LF356 Typ 5 Max 10 LF357 Typ 5 Max 10 Units mA AC Electrical Characteristics TA = TJ = 25˚C, VS = ± 15V LF155/355 Symbol SR Parameter Slew Rate Conditions Typ LF155/6: AV =1, LF357: AV =5 GBW ts en Gain Bandwidth Product Settling Time to 0.01% Equivalent Input Noise Voltage (Note 7) RS =100Ω f=100 Hz f=1000 Hz in Equivalent Input Current Noise Input Capacitance f=100 Hz f=1000 Hz 25 20 0.01 0.01 3 15 12 0.01 0.01 3 15 12 0.01 0.01 3 pF 2.5 4 5 1.5 5 LF156/256/ 356B Min 7.5 LF156/256/356/ LF356B Typ 12 50 20 1.5 LF257/357 Units Typ V/µs V/µs MHz µs CIN Notes for Electrical Characteristics Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum available power dissipation at any temperature is PD =(TJMAX−TA)/θJA or the 25˚C PdMAX, whichever is less. Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage. Note 3: Unless otherwise stated, these test conditions apply: 3 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Notes for Electrical Characteristics LF155/156 Supply Voltage, VS TA THIGH (Continued) LF256/257 LF356B LF355/6/7 VS = ± 15V 0˚C ≤ TA ≤ +70˚C +70˚C ± 15V ≤ VS ≤ ± 20V −55˚C ≤ TA ≤ +125˚C +125˚C ± 15V ≤ VS ≤ ± 20V −25˚C ≤ TA ≤ +85˚C +85˚C ± 15V ≤ VS ± 20V 0˚C ≤ TA ≤ +70˚C +70˚C and VOS, IB and IOS are measured at VCM = 0. Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5µV/˚C typically) for each mV of adjustment from its original unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment. Note 5: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, TJ. Due to limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, Pd. TJ = TA + θJA Pd where θJA is the thermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum. Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice. Note 7: Settling time is defined here, for a unity gain inverter connection using 2 kΩ resistors for the LF155/6. It is the time required for the error voltage (the voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF357, AV = −5, the feedback resistor from output to input is 2kΩ and the output step is 10V (See Settling Time Test Circuit). Note 8: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside guaranteed limits. Typical DC Performance Characteristics specified. Input Bias Current Curves are for LF155 and LF156 unless otherwise Input Bias Current 00564637 00564638 Input Bias Current Voltage Swing 00564639 00564640 www.national.com 4 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical DC Performance Characteristics specified. (Continued) Supply Current Curves are for LF155 and LF156 unless otherwise Supply Current 00564641 00564642 Negative Current Limit Positive Current Limit 00564643 00564644 Positive Common-Mode Input Voltage Limit Negative Common-Mode Input Voltage Limit 00564645 00564646 5 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical DC Performance Characteristics specified. (Continued) Open Loop Voltage Gain Curves are for LF155 and LF156 unless otherwise Output Voltage Swing 00564647 00564648 Typical AC Performance Characteristics Gain Bandwidth Gain Bandwidth 00564649 00564650 Normalized Slew Rate Output Impedance 00564651 00564652 www.national.com 6 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical AC Performance Characteristics Output Impedance (Continued) LF155 Small Signal Pulse Response, AV = +1 00564605 00564653 LF156 Small Signal Pulse Response, AV = +1 LF155 Large Signal Pulse Response, AV = +1 00564606 00564608 LF156 Large Signal Puls Response, AV = +1 Inverter Settling Time 00564609 00564655 7 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical AC Performance Characteristics Inverter Settling Time (Continued) Open Loop Frequency Response 00564656 00564657 Bode Plot Bode Plot 00564658 00564659 Bode Plot Common-Mode Rejection Ratio 00564660 00564661 www.national.com 8 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical AC Performance Characteristics Power Supply Rejection Ratio (Continued) Power Supply Rejection Ratio 00564662 00564663 Undistorted Output Voltage Swing Equivalent Input Noise Voltage 00564664 00564665 Equivalent Input Noise Voltage (Expanded Scale) 00564666 9 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Detailed Schematic 00564613 *C = 3pF in LF357 series. Connection Diagrams (Top Views) Dual-In-Line Package (M and N) Metal Can Package (H) 00564614 Order Number LF155H, LF156H, LF256H, LF257H, LF356BH, LF356H, or LF357H See NS Package Number H08C *Available per JM38510/11401 or JM38510/11402 00564629 Order Number LF356M, LF356MX, LF355N, or LF356N See NS Package Number M08A or N08E Application Hints These are op amps with JFET input devices. These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit. Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a www.national.com 10 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Application Hints (Continued) Typical Circuit Connections VOS Adjustment reversal of phase to the output. Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode. Exceeding the positive common-mode limit on a single input will not change the phase of the output however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state. These amplifiers will operate with the common-mode input voltage equal to the positive supply. In fact, the common-mode voltage can exceed the positive supply by approximately 100 mV independent of supply voltage and over the full operating temperature range. The positive supply can therefore be used as a reference on an input as, for example, in a supply current monitor and/or limiter. Precautions should be taken to ensure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit. All of the bias currents in these amplifiers are set by FET current sources. The drain currents for the amplifiers are therefore essentially independent of supply voltage. As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in order to ensure stability. For example, resistors from the output to an input should be placed with the body close to the input to minimize “pickup” and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground. A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capacitance from the input of the device (usually the inverting input) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately six times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant. 00564667 • • • VOS is adjusted with a 25k potentiometer The potentiometer wiper is connected to V+ For potentiometers with temperature coefficient of 100 ppm/˚C or less the additional drift with adjust is ≈ 0.5µV/ ˚C/mV of adjustment Typical overall drift: 5µV/˚C ± (0.5µV/˚C/mV of adj.) Driving Capacitive Loads • 00564668 * LF155/6 R = 5k LF357 R = 1.25k Due to a unique output stage design, these amplifiers have the ability to drive large capacitive loads and still maintain stability. CL(MAX) . 0.01µF. Overshoot ≤ 20% Settling time (ts) . 5µs LF357. A Large Power BW Amplifier 00564615 For distortion ≤ 1% and a 20 Vp-p VOUT swing, power bandwidth is: 500kHz. 11 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical Applications Settling Time Test Circuit 00564616 • • • • Settling time is tested with the LF155/6 connected as unity gain inverter and LF357 connected for AV = −5 FET used to isolate the probe capacitance Output = 10V step AV = −5 for LF357 Large Signal Inverter Output, VOUT (from Settling Time Circuit) LF355 LF357 00564617 00564619 LF356 00564618 www.national.com 12 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical Applications (Continued) Low Drift Adjustable Voltage Reference 00564620 • • • • • ∆ VOUT/∆T = ± 0.002%/˚C All resistors and potentiometers should be wire-wound P1: drift adjust P2: VOUT adjust Use LF155 for j Low IB j Low drift j Low supply current Fast Logarithmic Converter 00564621 • • • • • Dynamic range: 100µA ≤ Ii ≤ 1mA (5 decades), |VO| = 1V/decade Transient response: 3µs for ∆Ii = 1 decade C1, C2, R2, R3: added dynamic compensation VOS adjust the LF156 to minimize quiescent error RT: Tel Labs type Q81 + 0.3%/˚C 13 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical Applications (Continued) Precision Current Monitor 00564631 • • • VO = 5 R1/R2 (V/mA of IS) R1, R2, R3: 0.1% resistors Use LF155 for j Common-mode range to supply range j Low IB j Low VOS j Low Supply Current 8-Bit D/A Converter with Symmetrical Offset Binary Operation 00564632 • • R1, R2 should be matched within ± 0.05% Full-scale response time: 3µs EO +9.920 +0.040 −0.040 −9.920 B1 B2 B3 B4 B5 B6 B7 B8 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Comments Positive Full-Scale (+) Zero-Scale (−) Zero-Scale Negative Full-Scale www.national.com 14 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical Applications (Continued) Wide BW Low Noise, Low Drift Amplifier 00564670 • Parasitic input capacitance C1 . (3pF for LF155, LF156 and LF357 plus any additional layout capacitance) interacts with feedback elements and creates undesirable high frequency pole. To compensate add C2 such that: R2 C2 . R1 C1. Boosting the LF156 with a Current Amplifier 00564673 • IOUT(MAX).150mA (will drive RL≥ 100Ω) • No additional phase shift added by the current amplifier 15 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical Applications (Continued) 3 Decades VCO 00564624 R1, R4 matched. Linearity 0.1% over 2 decades. Isolating Large Capacitive Loads 00564622 • • • Overshoot 6% ts 10µs When driving large CL, the VOUT slew rate determined by CL and IOUT(MAX): www.national.com 16 LF155/LF156/LF256/LF257/LF355/LF356/LF357 Typical Applications (Continued) Low Drift Peak Detector 00564623 • • • • By adding D1 and Rf, VD1 =0 during hold mode. Leakage of D2 provided by feedback path through Rf. Leakage of circuit is essentially Ib (LF155, LF156) plus capacitor leakage of Cp. Diode D3 clamps VOUT (A1) to VIN−VD3 to improve speed and to limit reverse bias of D2. Maximum input frequency should be 100 Use LF155 for j Low IB j Low supply current 21 www.national.com LF155/LF156/LF256/LF257/LF355/LF356/LF357 Physical Dimensions inches (millimeters) unless otherwise noted Metal Can Package (H) Order Number LF155H, LF156H, LF256H, LF257H, LF356BH, LF356H or LF357H NS Package Number H08C Small Outline Package (M) Order Number LF356M or LF356MX NS Package Number M08A www.national.com 22 LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Molded Dual-In-Line Package (N) Order Number LF356N NS Package Number N08E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.