LM111JAN

LM111JAN Voltage Comparator April 2, 2008 LM111JAN Voltage Comparator General Description The LM111 is a voltage comparator that has input currents nearly a thousand times lower than devices such as the LM106 or LM710. It is also designed to operate over a wider range of supply voltages: from standard ±15V op amp supplies down to the single 5V supply used for IC logic. The output is compatible with RTL, DTL and TTL as well as MOS circuits. Further, it can drive lamps or relays, switching voltages up to 50V at currents as high as 50 mA. Both the inputs and the outputs of the LM111 can be isolated from system ground, and the output can drive loads referred to ground, the positive supply or the negative supply. Offset balancing and strobe capability are provided and outputs can be wire OR'ed. Although slower than the LM106 and LM710 (200 ns response time vs 40 ns) the device is also much less prone to spurious oscillations. The LM111 has the same pin configuration as the LM106 and LM710. Features ■ ■ ■ ■ ■ ■ ■ ■ Operates from single 5V supply Input current: 200 nA max. over temperature Offset current: 20 nA max. over temperature Differential input voltage range: ±30V Power consumption: 135 mW at ±15V Power supply voltage, single 5V to ±15V Offset voltage null capability Strobe capability Ordering Information NS PART NUMBER JL111BCA JL111BGA JL111BHA JL111BPA JL111SGA JL111SHA JL111SPA JL111SZA JAN PART NUMBER JM38510/10304BCA JM38510/10304BGA JM38510/10304BHA JM38510/10304BPA JM38510/10304SGA JM38510/10304SHA JM38510/10304SPA JM38510/10304SZA NS PACKAGE NUMBER J14A H08C W10A J08A H08C W10A J08A WG10A PACKAGE DESCRIPTION 14LD CERDIP 8LD TO-99 Metal Can 10LD CERPACK 8LD CERDIP 8LD TO-99 Metal Can 10LD CERPACK 8LD CERDIP 10LD Ceramic SOIC © 2008 National Semiconductor Corporation 201420 www.national.com LM111JAN Connection Diagrams Metal Can Package 20142006 Note: Pin 4 connected to case Top View See NS Package Number H08C Dual-In-Line Package Dual-In-Line Package 20142034 Top View See NS Package Number J08A 20142035 Top View See NS Package Number J14A 20142033 See NS Package Number W10A, WG10A www.national.com 2 LM111JAN Schematic Diagram (Note Pin connections shown on schematic diagram are for H08 package. ) 20142005 Note 1: Pin connections shown on schematic diagram are for H08 package. 3 www.national.com LM111JAN Absolute Maximum Ratings Positive Supply Voltage Negative Supply Voltage Total Supply Voltage Output to Negative Supply Voltage GND to Negative Supply Voltage Differential Input Voltage Sink Current Input Voltage (Note 3) Power Dissipation (Note 4) 8 LD CERDIP 8 LD Metal Can 10 LD CERPACK 10 LD Ceramic SOIC 14 LD CERDIP Output Short Circuit Duration Maximum Strobe Current Operating Temperature Range Thermal Resistance   θJA (Note 2) +30.0V -30.0V 36V 50V 30V ±30V 50mA ±15V 400mW @ 25°C 330mW @ 25°C 330mW @ 25°C 330mW @ 25°C 400mW @ 25°C 10 seconds 10mA -55°C ≤ TA ≤ 125°C 8 LD CERDIP (Still Air @ 0.5W) 8 LD CERDIP (500LF/Min Air flow @ 0.5W) 8 LD Metal Can (Still Air @ 0.5W) 8 LD Metal Can (500LF/Min Air flow @ 0.5W) 10 Ceramic SOIC (Still Air @ 0.5W) 10 Ceramic SOIC (500LF/Min Air flow @ 0.5W) 10 CERPACK (Still Air @ 0.5W) 10 CERPACK (500LF/Min Air flow @ 0.5W) 14 LD CERDIP (Still Air @ 0.5W) 14 LD CERDIP (500LF/Min Air flow @ 0.5W)   θJC 8 LD CERDIP 8 LD Metal Can Pkg 10 LD Ceramic SOIC 10 LD CERPACK 14 LD CERDIP Storage Temperature Range Maximum Junction Temperature Lead Temperature (Soldering, 60 seconds) Voltage at Strobe Pin Package Weight (Typical) 8 LD Metal Can 8 LD CERDIP 10 LD CERPACK 10 LD Ceramic SOIC 14 LD CERDIP ESD Rating (Note 5) 120°C/W 76°C/W 150°C/W 92°C/W 231°C/W 153°C/W 231°C/W 153°C/W 120°C/W 65°C/W 35°C/W 40°C/W 60°C/W 60°C/W 35°C/W -65°C ≤ TA ≤ 150°C 175°C 300°C V+ -5V 965mg 1100mg 250mg 225mg TBD 300V www.national.com 4 LM111JAN Recommended Operating Conditions Supply Voltage Operating Temperature Range VCC = ±15VDC -55°C ≤ TA ≤ 125°C Quality Conformance Inspection Mil-Std-883, Method 5005 — Group A Subgroup 1 2 3 4 5 6 7 8A 8B 9 10 11 Description Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temperature (°C) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 5 www.national.com LM111JAN LM111 JAN Electrical Characteristics DC Parameters The following conditions apply, unless otherwise specified. DC: VCC = ±15V, VCM = 0 Symbol VIO Parameter Input Offset Voltage Conditions VI = 0V, RS = 50Ω +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50Ω +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50Ω +VCC = +2.5V, -VCC = -2.5V, VI = 0V, RS = 50Ω VIO R Raised Input Offset Voltage VI = 0V, RS = 50Ω +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50Ω +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50Ω IIO Input Offset Current VI = 0V, RS = 50KΩ +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50KΩ +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50KΩ IIOR ±IIB Raised Input Offset Current Input Bias Current VI = 0V, RS = 50KΩ VI = 0V, RS = 50KΩ +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50KΩ +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50KΩ VOSt CMRR Collector Output Voltage (Strobe) +VI = Gnd, -VI = 15V, ISt = -3mA, RS = 50Ω Common Mode Rejection -28V ≤ -VCC ≤ -0.5V, RS=50Ω, 2V (Note 7) (Note 10) (Note 10) (Note 10) Notes Min -3.0 -4.0 -3.0 -4.0 -3.0 -4.0 -3.0 -4.0 -3.0 -4.5 -3.0 (Note 10) -4.5 -3.0 -4.5 -10 -20 -10 -20 -10 -20 -25 -50 -100 -150 -150 -200 -150 -200 14 Max +3.0 +4.0 +3.0 +4.0 +3.0 +4.0 +3.0 +4.0 +3.0 +4.5 +3.0 +4.5 +3.0 +4.5 +10 +20 +10 +20 +10 +20 +25 +50 0.1 0.1 0.1 0.1 0.1 0.1 Unit mV mV mV mV mV mV mV mV mV mV mV mV mV mV nA nA nA nA nA nA nA nA nA nA nA nA nA nA V Subgroups 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1, 2 3 1, 2, 3 ≤ +VCC ≤ 29.5V, RS = 50Ω, -14.5V ≤ VCM ≤ 13V,RS = 50Ω 80 dB 1, 2, 3 www.national.com 6 LM111JAN Symbol VOL Parameter Low Level Output Voltage Conditions +VCC = 4.5V, -VCC = Gnd, IO = 8mA, ±VI = 0.5V, VID = -6mV +VCC = 4.5V, -VCC = Gnd, IO = 8mA, ±VI = 3V, VID = -6mV IO = 50mA, ±VI = 13V, VID = -5mV IO = 50mA, ±VI = -14V, VID = -5mV Notes Min Max Unit Subgroups 1, 2, 3 (Note 9) 0.4 V (Note 9) 0.4 V 1, 2, 3 (Note 9) (Note 9) -1.0 -1.0 -5.0 -5.0 1.5 1.5 10 500 500 500 6.0 7.0 -5.0 -6.0 V V nA nA nA nA mA mA mA mA 1, 2, 3 1, 2, 3 1 2 1, 2, 3 1, 2, 3 1, 2 3 1, 2 3 2 3 2 3 1 2 3 1 1 4 5, 6 ICEX IIL Output Leakage Current Input Leakage Current +VCC = 18V, -VCC = -18V, VO = 32V +VCC = 18V, -VCC = -18V, +VI = +12V, -VI = -17V +VCC = 18V, -VCC = -18V, +VI = -17V, -VI = +12V +ICC -ICC Δ VIO / Δ T Δ IIO / Δ T IOS Power Supply Current Power Supply Current Temperature Coefficient Input Offset Voltage Temperature Coefficient Input Offset Current Short Circuit Current 25°C ≤ T ≤ 125°C -55°C ≤ T ≤ 25°C 25°C ≤ T ≤ 125°C -55°C ≤ T ≤ 25°C VO = 5V, t ≤ 10mS, -VI = 0.1V, +VI = 0V 5.0 (Note 8) (Note 8) (Note 8) (Note 8) -25 -25 -100 -200 25 25 100 200 200 150 250 uV/°C uV/°C pA/°C pA/°C mA mA mA mV mV V/mV V/mV +VIO adj. -VIO adj. ±AVE Input Offset Voltage (Adjustment) VO = 0V, VI = 0V, RS = 50Ω Input Offset Voltage (Adjustment) VO = 0V, VI = 0V, RS = 50Ω Voltage Gain (Emitter) RL = 600Ω (Note 6) (Note 6) -5.0 10 8.0 AC Parameters The following conditions apply, unless otherwise specified. AC: VCC = ±15V, VCM = 0 Symbol tRLHC tRHLC Parameter Response Time (Collector Output) Response Time (Collector Output) Conditions VOD(Overdrive) = -5mV, CL = 50pF, VI = -100mV VOD(Overdrive) = 5mV, CL = 50pF, VI = 100mV Notes Min Max 300 640 300 500 Unit nS nS nS nS Subgroups 7, 8B 8A 7, 8B 8A 7 www.national.com LM111JAN DC Drift Parameters The following conditions apply, unless otherwise specified. DC: VCC = ±15V, VCM = 0 Delta calculations performed on JANS devices at group B , subgroup 5. Symbol VIO Parameter Input Offset Voltage Conditions VI = 0V, RS = 50Ω +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50Ω +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50Ω ±IIB Input Bias Current VI = 0V, RS = 50KΩ +VCC = 29.5V, -VCC = -0.5V, VI = 0V, VCM = -14.5V, RS = 50KΩ +VCC = 2V, -VCC = -28V, VI = 0V, VCM = +13V, RS = 50KΩ ICEX Output Leakage Current +VCC = 18V, -VCC = -18V, VO = 32V -5.0 5.0 nA 1 -12.5 12.5 nA 1 -12.5 -12.5 12.5 12.5 nA nA 1 1 -0.5 0.5 mV 1 Notes Min -0.5 -0.5 Max 0.5 0.5 Unit mV mV Subgroups 1 1 Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 3: This rating applies for ±15V supplies. The positive input voltage limit is 30 V above the negative supply. The negative input voltage limit is equal to the negative supply voltage or 30V below the positive supply, whichever is less. Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 5: Human body model, 1.5 kΩ in series with 100 pF. Note 6: Datalog reading in K=V/mV. Note 7: IST = −2mA at −55°C Note 8: Calculated parameter. Note 9: VID is voltage difference between inputs. Note 10: Subscript (R) indicates tests which are performed with input stage current raised by connecting BAL and BAL/STB terminals to +VCC. www.national.com 8 LM111JAN LM111 Typical Performance Characteristics Input Bias Current Input Bias Current 20142043 20142044 Input Bias Current Input Bias Current 20142046 20142045 Input Bias Current Input Bias Current 20142047 20142048 9 www.national.com LM111JAN Input Bias Current Input Overdrives Input Bias Current Input Overdrives 20142049 20142050 Input Bias Current Response Time for Various Input Overdrives 20142051 20142052 Response Time for Various Input Overdrives Output Limiting Characteristics 20142054 20142053 www.national.com 10 LM111JAN Supply Current Supply Current 20142055 20142056 Leakage Currents 20142057 Application Hints CIRCUIT TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS When a high-speed comparator such as the LM111 is used with fast input signals and low source impedances, the output response will normally be fast and stable, assuming that the power supplies have been bypassed (with 0.1 μF disc capacitors), and that the output signal is routed well away from the inputs (pins 2 and 3) and also away from pins 5 and 6. However, when the input signal is a voltage ramp or a slow sine wave, or if the signal source impedance is high (1 kΩ to 100 kΩ), the comparator may burst into oscillation near the crossing-point. This is due to the high gain and wide bandwidth of comparators such as the LM111. To avoid oscillation or instability in such a usage, several precautions are recommended, as shown in Figure 1 below. 1. The trim pins (pins 5 and 6) act as unwanted auxiliary inputs. If these pins are not connected to a trim-pot, they should be shorted together. If they are connected to a trim-pot, a 0.01 μF capacitor C1 between pins 5 and 6 will minimize the susceptibility to AC coupling. A smaller capacitor is used if pin 5 is used for positive feedback as in Figure 1. Certain sources will produce a cleaner comparator output waveform if a 100 pF to 1000 pF capacitor C2 is connected directly across the input pins. 3. 4. 5. 2. When the signal source is applied through a resistive network, RS, it is usually advantageous to choose an RS ′ of substantially the same value, both for DC and for dynamic (AC) considerations. Carbon, tin-oxide, and metal-film resistors have all been used successfully in comparator input circuitry. Inductive wire wound resistors are not suitable. When comparator circuits use input resistors (e.g. summing resistors), their value and placement are particularly important. In all cases the body of the resistor should be close to the device or socket. In other words there should be very little lead length or printed-circuit foil run between comparator and resistor to radiate or pick up signals. The same applies to capacitors, pots, etc. For example, if RS=10 kΩ, as little as 5 inches of lead between the resistors and the input pins can result in oscillations that are very hard to damp. Twisting these input leads tightly is the only (second best) alternative to placing resistors close to the comparator. Since feedback to almost any pin of a comparator can result in oscillation, the printed-circuit layout should be engineered thoughtfully. Preferably there should be a ground plane under the LM111 circuitry, for example, one side of a double-layer circuit card. Ground foil (or, positive supply or negative supply foil) should extend between the output and the inputs, to act as a guard. The foil connections for the inputs should be as small and compact as possible, and should be essentially surrounded by ground foil on all sides, to guard against www.national.com 11 LM111JAN 6. capacitive coupling from any high-level signals (such as the output). If pins 5 and 6 are not used, they should be shorted together. If they are connected to a trim-pot, the trim-pot should be located, at most, a few inches away from the LM111, and the 0.01 μF capacitor should be installed. If this capacitor cannot be used, a shielding printed-circuit foil may be advisable between pins 6 and 7. The power supply bypass capacitors should be located within a couple inches of the LM111. (Some other comparators require the power-supply bypass to be located immediately adjacent to the comparator.) It is a standard procedure to use hysteresis (positive feedback) around a comparator, to prevent oscillation, and to avoid excessive noise on the output because the comparator is a good amplifier for its own noise. In the circuit of Figure 2, the feedback from the output to the positive input will cause about 3 mV of hysteresis. However, if RS is larger than 100Ω, such as 50 kΩ, it would not be reasonable to simply increase the value of the positive feedback resistor above 510 kΩ. The circuit 7. 8. of Figure 3 could be used, but it is rather awkward. See the notes in paragraph 7 below. When both inputs of the LM111 are connected to active signals, or if a high-impedance signal is driving the positive input of the LM111 so that positive feedback would be disruptive, the circuit of Figure 1 is ideal. The positive feedback is to pin 5 (one of the offset adjustment pins). It is sufficient to cause 1 to 2 mV hysteresis and sharp transitions with input triangle waves from a few Hz to hundreds of kHz. The positive-feedback signal across the 82Ω resistor swings 240 mV below the positive supply. This signal is centered around the nominal voltage at pin 5, so this feedback does not add to the VOS of the comparator. As much as 8 mV of VOS can be trimmed out, using the 5 kΩ pot and 3 kΩ resistor as shown. These application notes apply specifically to the LM111 and LF111 families of comparators, and are applicable to all high-speed comparators in general, (with the exception that not all comparators have trim pins). 20142029 Pin connections shown are for LM111H in the H08 hermetic package FIGURE 1. Improved Positive Feedback www.national.com 12 LM111JAN 20142030 Pin connections shown are for LM111H in the H08 hermetic package FIGURE 2. Conventional Positive Feedback 20142031 FIGURE 3. Positive Feedback with High Source Resistance 13 www.national.com LM111JAN Typical Applications (Note 13) Strobing Offset Balancing 20142036 20142037 Note: Do Not Ground Strobe Pin. Output is turned off when current is pulled from Strobe Pin. Increasing Input Stage Current (Note Increases typical common mode slew from 7.0V/μs to 18V/μs. ) Detector for Magnetic Transducer 20142038 Note 11: Increases typical common mode slew from 7.0V/μs to 18V/μs. 20142039 Digital Transmission Isolator Relay Driver with Strobe 20142040 20142041 *Absorbs inductive kickback of relay and protects IC from severe voltage transients on V++ line. Note: Do Not Ground Strobe Pin. www.national.com 14 LM111JAN Strobing off Both Input and Output Stages (Note Typical input current is 50 pA with inputs strobed off. ) 20142042 Note: Do Not Ground Strobe Pin. Note 12: Typical input current is 50 pA with inputs strobed off. Note 13: Pin connections shown on schematic diagram and typical applications are for H08 metal can package. Positive Peak Detector Zero Crossing Detector Driving MOS Logic 20142024 20142023 *Solid tantalum Typical Applications (Pin numbers refer to H08 package) Zero Crossing Detector Driving MOS Switch 100 kHz Free Running Multivibrator 20142013 20142014 *TTL or DTL fanout of two 15 www.national.com LM111JAN 10 Hz to 10 kHz Voltage Controlled Oscillator 20142015 *Adjust for symmetrical square wave time when VIN = 5 mV †Minimum capacitance 20 pF Maximum frequency 50 kHz Driving Ground-Referred Load Using Clamp Diodes to Improve Response 20142017 20142016 *Input polarity is reversed when using pin 1 as output. TTL Interface with High Level Logic 20142018 *Values shown are for a 0 to 30V logic swing and a 15V threshold. †May be added to control speed and reduce susceptibility to noise spikes. www.national.com 16 LM111JAN Crystal Oscillator Comparator and Solenoid Driver 20142020 20142019 Precision Squarer 20142021 *Solid tantalum †Adjust to set clamp level Low Voltage Adjustable Reference Supply 20142022 17 www.national.com LM111JAN *Solid tantalum Positive Peak Detector Zero Crossing Detector Driving MOS Logic 20142024 20142023 *Solid tantalum Negative Peak Detector 20142025 *Solid tantalum Precision Photodiode Comparator 20142026 *R2 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing leakages by an order of magnitude. www.national.com 18 LM111JAN Switching Power Amplifier 20142027 19 www.national.com LM111JAN Switching Power Amplifier 20142028 www.national.com 20 LM111JAN Revision History Section Released 05/09/05 Revision A Section New Release, Corporate format Originator L. Lytle Changes 1 MDS data sheets converted into one Corp. data sheet format. MJLM111–X Rev 0D3 will be archived. 21 www.national.com LM111JAN Physical Dimensions inches (millimeters) unless otherwise noted Metal Can Package (H) NS Package Number H08C Cavity Dual-In-Line Package (J) NS Package Number J08A www.national.com 22 LM111JAN Dual-In-Line Package (J) NS Package Number J14A Cerpack Package (W) NS Package Number W10A 23 www.national.com LM111JAN Cerpack Gull Wing Package (WG) NS Package Number WG10A www.national.com 24 LM111JAN Notes 25 www.national.com LM111JAN Voltage Comparator Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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