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LM2651_05

LM2651_05

  • 厂商:

    NSC

  • 封装:

  • 描述:

    LM2651_05 - 1.5A High Efficiency Synchronous Switching Regulator - National Semiconductor

  • 数据手册
  • 价格&库存
LM2651_05 数据手册
LM2651 1.5A High Efficiency Synchronous Switching Regulator April 2005 LM2651 1.5A High Efficiency Synchronous Switching Regulator General Description The LM2651 switching regulator provides high efficiency power conversion over a 100:1 load range (1.5A to 15mA). This feature makes the LM2651 an ideal fit in batterypowered applications that demand long battery life in both run and standby modes. Synchronous rectification is used to achieve up to 97% efficiency. At light loads, the LM2651 enters a low power hysteretic or “sleep” mode to keep the efficiency high. In many applications, the efficiency still exceeds 80% at 15mA load. A shutdown pin is available to disable the LM2651 and reduce the supply current to less than 10µA. The LM2651 contains a patented current sensing circuitry for current mode control. This feature eliminates the external current sensing resistor required by other current-mode DC-DC converters. The LM2651 has a 300 kHz fixed frequency internal oscillator. The high oscillator frequency allows the use of extremely small, low profile components. A programmable soft-start feature limits current surges from the input power supply at start up and provides a simple means of sequencing multiple power supplies. Other protection features include input undervoltage lockout, current limiting, and thermal shutdown. Features n n n n n n n n n n n n Ultra high efficiency up to 97% High efficiency over a 1.5A to milliamperes load range 4V to 14V input voltage range 1.8V, 2.5V, 3.3V, or ADJ output voltage Internal MOSFET switch with low RDS(on) of 75mΩ 300kHz fixed frequency internal oscillator 7µA shutdown current Patented current sensing for current mode control Input undervoltage lockout Adjustable soft-start Current limit and thermal shutdown 16-pin TSSOP package Applications n n n n n Personal digital assistants (PDAs) Computer peripherals Battery-powered devices Handheld scanners High efficiency 5V conversion Typical Application 10092501 10092515 Efficiency vs Load Current (VIN = 5V, VOUT = 3.3V © 2005 National Semiconductor Corporation DS100925 www.national.com LM2651 Connection Diagram 16-Lead TSSOP (MTC) 10092502 Ordering Information Part Number VOUT 1.8 2.5 3.3 ADJ Supplied as 94 Units, Rail LM2651MTC-1.8 LM2651MTC-2.5 LM2651MTC-3.3 LM2651MTC-ADJ Supplied as 2.5k Units, Tape and Reel LM2651MTCX-1.8 LM2651MTCX-2.5 LM2651MTCX-3.3 LM2651MTCX-ADJ TSSOP-16 MTC16 Package Type NSC Package Drawing Pin Description Pin 1, 2 3-5 6 7 8 Name SW VIN VCB AVIN SD(SS) Function Switched-node connection, which is connected with the source of the internal high-side MOSFET. Main power supply pin. Bootstrap capacitor connection for high-side gate drive. Input supply voltage for control and driver circuits. Shutdown and Soft-start control pin. Pulling this pin below 0.3V shuts off the regulator. A capacitor connected from this pin to ground provides a control ramp of the input current. Do not drive this pin with an external source or erroneous operation may result. Output voltage feedback input. Connected to the output voltage. Compensation network connection. Connected to the output of the voltage error amplifier. No internal connection. Low-noise analog ground. Power ground. 9 10 11 12-13 14-16 FB COMP NC AGND PGND www.national.com 2 LM2651 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Input Voltage Feedback Pin Voltage Power Dissipation (TA =25˚C), (Note 2) Junction Temperature Range 15V −0.4V ≤ VFB ≤ 5V 893 mW −40˚C ≤ TJ ≤ +125˚C Storage Temperature Range ESD Susceptibility Human Body Model (Note 3) −65˚C to +150˚C 1kV Operating Ratings (Note 1) Supply Voltage 4V ≤ VIN ≤ 14V LM2651-1.8 System Parameters Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over full operating junction temperature range. VIN =10V unless otherwise specified. Symbol VOUT Parameter Output Voltage Conditions ILOAD = 900 mA Typical 1.8 Limit 1.761/1.719 1.836/1.854 Units V V(min) V(max) % % % mV VOUT VOUT VOUT VHYST Output Voltage Line Regulation Output Voltage Load Regulation Output Voltage Load Regulation Sleep Mode Output Voltage Hysteresis VIN = 4V to 14V ILOAD = 900 mA ILOAD = 10 mA to 1.5A VIN = 5V ILOAD = 200 mA to 1.5A VIN = 5V 0.2 1.3 0.3 35 LM2651-2.5 System Parameters Symbol VOUT Parameter Output Voltage Conditions ILOAD = 900 mA Typical 2.5 Limit 2.43/2.388 2.574/2.575 Units V V(min) V(max) % % % mV VOUT VOUT VOUT VHYST Output Voltage Line Regulation Output Voltage Load Regulation Output Voltage Load Regulation Sleep Mode Output Voltage Hysteresis VIN = 4V to 12V ILOAD = 900 mA ILOAD = 10 mA to 1.5A VIN = 5V ILOAD = 200 mA to 1.5A VIN = 5V 0.2 1.3 0.3 48 LM2651-3.3 System Parameters Symbol VOUT Parameter Output Voltage Conditions ILOAD = 900 mA Typical 3.3 Limit 3.265/3.201 3.379/3.399 Units V V(min) V(max) % % % mV VOUT VOUT VOUT VHYST Output Voltage Line Regulation Output Voltage Load Regulation Output Voltage Load Regulation Sleep Mode Output Voltage Hysteresis VIN = 4V to 14V ILOAD = 900 mA ILOAD = 10 mA to 1.5A VIN = 5V ILOAD = 200 mA to 1.5A VIN = 5V 0.2 1.3 0.3 60 3 www.national.com LM2651 LM2651-ADJ System Parameters (VOUT = 2.5V unless otherwise specified) Symbol VFB Parameter Feedback Voltage Conditions ILOAD = 900 mA Typical 1.238 Limit 1.200 1.263 Units V V(min) V(max) % % % mV VOUT VOUT VOUT VHYST Output Voltage Line Regulation Output Voltage Load Regulation Output Voltage Load Regulation Sleep Mode Output Voltage Hysteresis VIN = 4V to 14V ILOAD = 900 mA ILOAD = 10 mA to 1.5A VIN = 5V ILOAD = 200 mA to 1.5A VIN = 5V 0.2 1.3 0.3 24 All Output Voltage Versions Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over full operating junction temperature range. VIN =10V unless otherwise specified. Symbol IQ IQSD RSW(ON) Parameter Quiescent Current Quiescent Current in Shutdown Mode High-Side or Low-Side Switch On Resistance (MOSFET On Resistance + Bonding Wire Resistance) MOSFET On Resistance (High-Side or Low-Side) Switch Leakage Current - High Side Switch Leakage Current - Low Side VBOOT Bootstrap Regulator Voltage IBOOT = 1 mA Shutdown Pin Pulled Low ISWITCH = 1A Conditions Typical 1.6 7 12/20 110 Limit 2.0 Units mA mA(max) µA µA(max) mΩ RDS(ON) IL ISWITCH = 1A 75 130 130 130 6.75 6.45/6.40 6.95/7.00 mΩ mΩ(max) nA nA V V(min) V(max) µmho GM VINUV VUV-HYST ICL Error Amplifier Transconductance VIN Undervoltage Lockout Threshold Voltage Hysteresis for the Undervoltage Lockout Switch Current Limit VIN = 5V Rising Edge 1250 3.8 210 2 1.55 2.60 3.95 V V(max) mV A A(min) A(max) mA V/V µA µA(min) µA µA(min) V V(min) ISM AV IEA_SOURCE IEA_SINK VEAH Sleep Mode Threshold Current VIN = 5V Error Amplifier Voltage Gain Error Amplifier Source Current Error Amplifier Sink Current Error Amplifier Output Swing Upper Limit 100 100 40 25/15 65 30 2.70 2.50/2.40 www.national.com 4 LM2651 All Output Voltage Versions Symbol VEAL VD fOSC Parameter Error Amplifier Output Swing Lower Limit Body Diode Voltage Oscillator Frequency (Continued) Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over full operating junction temperature range. VIN =10V unless otherwise specified. Conditions Typical 1.25 1.35/1.50 IDIODE = 1.5A VIN = 4V 1 300 280/255 330/345 DMAX ISS Maximum Duty Cycle Soft-Start Current VIN = 4V Voltage at the SS pin = 1.4V 95 92 11 7 14 ISHUTDOWN Shutdown Pin Current Shutdown Pin Pulled Low 2.2 0.8/0.5 3.7/4.0 vSHUTDOWN Shutdown Pin Threshold Voltage Thermal Shutdown Temperature Thermal Shutdown Hysteresis Temperature Falling Edge 0.6 0.3 0.9 165 25 Limit Units V V(max) V kHz kHz(min) kHz(max) % %(min) µA µA(min) µA(max) µA µA(min) µA(max) V V(min) V(max) ˚C ˚C TSD TSD_HYST Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed under these conditions. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The maximum allowable power dissipation is calculated by using PDmax = (TJmax − TA)/θJA , where TJmax is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package. The 893 mW rating results from using 150˚C, 25˚C, and 140˚C/W for TJmax, TA, and θJA respectively. A θJA of 140˚C/W represents the worst-case condition of no heat sinking of the 16-pin TSSOP package. Heat sinking allows the safe dissipation of more power. The Absolute Maximum power dissipation must be derated by 7.14mW per ˚C above 25˚C ambient. The LM2651 actively limits its junction temperature to about 165˚C. Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Note 4: Typical numbers are at 25˚C and represent the most likely norm. Note 5: All limits are guaranteed at room temperature (standard typeface) and at temperature extremes (boldface type ). All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). 5 www.national.com LM2651 Typical Performance Characteristics IQ vs Input Voltage IQSD vs Input Voltage 10092505 10092506 IQSD vs Junction Temperature Frequency vs Junction Temperature 10092507 10092508 RDS(ON) vs Input Voltage RDS(ON) vs Junction Temperature 10092509 10092510 www.national.com 6 LM2651 Typical Performance Characteristics Current Limit vs Input Voltage (VOUT =2.5V) (Continued) Current Limit vs Junction Temperature (VOUT =2.5V) 10092512 10092511 Current Limit vs Junction Temperature (VOUT = 3.3V) Current Limit vs Input Voltage (VOUT = 3.3V) 10092513 10092514 Sleep Mode Threshold vs Output Voltage For ADJ version (VIN = 5V) 10092525 7 www.national.com LM2651 Block Diagram 10092503 FIGURE 1. LM2651 Block Diagram Operation The LM2651 operates in a constant frequency (300 kHz), current-mode PWM for moderate to heavy loads; and it automatically switches to hysteretic mode for light loads. In hysteretic mode, the switching frequency is reduced to keep the efficiency high. MAIN OPERATION When the load current is higher than the sleep mode threshold, the part is always operating in PWM mode. At the beginning of each switching cycle, the high-side switch is turned on, the current from the high-side switch is sensed and compared with the output of the error amplifier (COMP pin). When the sensed current reaches the COMP pin voltage level, the high-side switch is turned off; after 40 ns (deadtime), the low-side switch is turned on. At the end of the switching cycle, the low-side switch is turned off; and the same cycle repeats. The current of the top switch is sensed by a patented internal circuitry. This unique technique gets rid of the external sense resistor, saves cost and size, and improves noise immunity of the sensed current. A feedforward from the input voltage is added to reduce the variation of the current limit over the input voltage range. When the load current decreases below the sleep mode threshold, the output voltage will rise slightly, this rise is sensed by the hysteretic mode comparator which makes the part go into the hysteretic mode with both the high and low side switches off. The output voltage starts to drop until it hits the low threshold of the hysteretic comparator, and the part immediately goes back to the PWM operation. The output voltage keeps increasing until it reaches the top hysteretic threshold, then both the high and low side switches turn off again, and the same cycle repeats. PROTECTIONS The cycle-by-cycle current limit circuitry turns off the highside MOSFET whenever the current in MOSFET reaches 2A. Design Procedure This section presents guidelines for selecting external components. www.national.com 8 LM2651 Design Procedure INPUT CAPACITOR (Continued) VRIPPLE < 20mV x VOUT /VFB BOOST CAPACITOR A 0.1 µF ceramic capacitor is recommended for the boost capacitor. The typical voltage across the boost capacitor is 6.7V. SOFT-START CAPACITOR A soft-start capacitor is used to provide the soft-start feature. When the input voltage is first applied, or when the SD(SS) pin is allowed to go high, the soft-start capacitor is charged by a current source (approximately 2 µA). When the SD(SS) pin voltage reaches 0.6V (shutdown threshold), the internal regulator circuitry starts to operate. The current charging the soft-start capacitor increases from 2 µA to approximately 10 µA. With the SD(SS) pin voltage between 0.6V and 1.3V, the level of the current limit is zero, which means the output voltage is still zero. When the SD(SS) pin voltage increases beyond 1.3V, the current limit starts to increase. The switch duty cycle, which is controlled by the level of the current limit, starts with narrow pulses and gradually gets wider. At the same time, the output voltage of the converter increases towards the nominal value, which brings down the output voltage of the error amplifier. When the output of the error amplifier is less than the current limit voltage, it takes over the control of the duty cycle. The converter enters the normal current-mode PWM operation. The SD(SS) pin voltage is eventually charged up to about 2V. The soft-start time can be estimated as: TSS = CSS x 0.6V/2 µA + CSS x (2V−0.6V)/10 µA R1 AND R2 (Programming Output Voltage) Use the following formula to select the appropriate resistor values: VOUT = VREF(1 + R1/R2) where VREF = 1.238V Select resistors between 10kΩ and 100kΩ. (1% or higher accuracy metal film resistors for R1 and R2.) COMPENSATION COMPONENTS In the control to output transfer function, the first pole Fp1 can be estimated as 1/(2πROUTCOUT); The ESR zero Fz1 of the output capacitor is 1/(2πESRCOUT); Also, there is a high frequency pole Fp2 in the range of 45kHz to 150kHz: Fp2 = Fs/(πn(1−D)) where D = VOUT/VIN, n = 1+0.348L/(VIN−VOUT) (L is in µHs and VIN and VOUT in volts). The total loop gain G is approximately 500/IOUT where IOUT is in amperes. A Gm amplifier is used inside the LM2651. The output resistor Ro of the Gm amplifier is about 80kΩ. Cc1 and RC together with Ro give a lag compensation to roll off the gain: Fpc1 = 1/(2πCc1(Ro+Rc)), Fzc1 = 1/2πCc1Rc. In some applications, the ESR zero Fz1 can not be cancelled by Fp2. Then, Cc2 is needed to introduce Fpc2 to cancel the ESR zero, Fp2 = 1/(2πCc2Ro\Rc). The rule of thumb is to have more than 45˚ phase margin at the crossover frequency (G=1). If COUT is higher than 68µF, Cc1 = 2.2nF, and Rc = 15KΩ are good choices for most applications. If the ESR zero is too low to be cancelled by Fp2, add Cc2. If the transient response to a step load is important, choose RC to be higher than 10kΩ. 9 www.national.com A low ESR aluminum, tantalum, or ceramic capacitor is needed betwen the input pin and power ground. This capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the RMS current and voltage requirements. The RMS current is given by: The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. For an aluminum or ceramic capacitor, the voltage rating should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the manufacturer to prevent being shorted by the inrush current. It is also recommended to put a small ceramic capacitor (0.1 µF) between the input pin and ground pin to reduce high frequency spikes. INDUCTOR The most critical parameters for the inductor are the inductance, peak current and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages: A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, current stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the ripple current increases with the input voltage, the maximum input voltage is always used to determine the inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the inductor copper loss equal 2% of the output power. OUTPUT CAPACITOR The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant frequency, PWM mode is approximated by: The ESR term usually plays the dominant role in determining the voltage ripple. A low ESR aluminum electrolytic or tantalum capacitor (such as Nichicon PL series, Sanyo OS-CON, Sprague 593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An electrolytic capacitor is not recommended for temperatures below −25˚C since its ESR rises dramatically at cold temperature. A tantalum capacitor has a much better ESR specification at cold temperature and is preferred for low temperature applications. The output voltage ripple in constant frequency mode has to be less than the sleep mode voltage hysteresis to avoid entering the sleep mode at full load: LM2651 Design Procedure (Continued) EXTERNAL SCHOTTKY DIODE A Schottky diode D1 is recommended to prevent the intrinsic body diode of the low-side MOSFET from conducting during the deadtime in PWM operation and hysteretic mode when both MOSFETs are off. If the body diode turns on, there is extra power dissipation in the body diode because of the reverse-recovery current and higher forward voltage; the high-side MOSFET also has more switching loss since the negative diode reverse-recovery current appears as the high-side MOSFET turn-on current in addition to the load current. These losses degrade the efficiency by 1-2%. The improved efficiency and noise immunity with the Schottky diode become more obvious with increasing input voltage and load current. The breakdown voltage rating of D1 is preferred to be 25% higher than the maximum input voltage. Since D1 is only on for a short period of time, the average current rating for D1 only requires being higher than 30% of the maximum output current. It is important to place D1 very close to the drain and source of the low-side MOSFET, extra parasitic inductance in the parallel loop will slow the turn-on of D1 and direct the current through the body diode of the low-side MOSFET. When an undervoltage situation occurs, the output voltage can be pulled below ground as the inductor current is re- versed through the synchronous FET. For applications which need to be protected from a negative voltage, a clamping diode D2 is recommended. When used, D2 should be connected cathode to VOUT and anode to ground. A diode rated for a minimum of 2A is recommended. PCB Layout Considerations Layout is critical to reduce noises and ensure specified performance. The important guidelines are listed as follows: Minimize the parasitic inductance in the loop of input capacitors and the internal MOSFETs by connecting the input capacitors to VIN and PGND pins with short and wide traces. This is important because the rapidly switching current, together with wiring inductance can generate large voltage spikes that may result in noise problems. 2. Minimize the trace from the center of the output resistor divider to the FB pin and keep it away from noise sources to avoid noise pick up. For applications requiring tight regulation at the output, a dedicated sense trace (separated from the power trace) is recommended to connect the top of the resistor divider to the output. 3. If the Schottky diode D1 is used, minimize the traces connecting D1 to SW and PGND pins. 1. 10092523 Schematic for the Typical Board Layout www.national.com 10 LM2651 1.5A High Efficiency Synchronous Switching Regulator Physical Dimensions unless otherwise noted inches (millimeters) 16-Lead TSSOP (MTC) For ordering, refer to Ordering Information Table See NS Package Number MTC16 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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