LM3704YCMMX-308

LM3704/LM3705 Microprocessor Supervisory Circuits with Power Fail Input, Low Line Output and Manual Reset July 2002 LM3704/LM3705 Microprocessor Supervisory Circuits with Power Fail Input, Low Line Output and Manual Reset General Description The LM3704/LM3705 series of microprocessor supervisory circuits provide the maximum flexibility for monitoring power supplies and battery controlled functions in systems without backup batteries. The LM3704/LM3705 series are available in MSOP-10 and 9-bump micro SMD packages. Built-in features include the following: Reset: Reset is asserted during power-up, power-down, and brownout conditions. RESET is guaranteed down to VCC of 1.0V. Manual Reset Input: An input that asserts reset when pulled low. Power-Fail Input: A 1.225V threshold detector for power fail warning, or to monitor a power supply other than VCC. Low Line Output: This early power failure warning indicator goes low when the supply voltage drops to a value which is 2% higher than the reset threshold voltage. n n n n n n n n n No external components required Manual-Reset input RESET (LM3704) or RESET (LM3705) outputs Precision supply voltage monitor Factory programmable Reset Timeout Delay Separate Power Fail comparator Available in micro SMD package for minimum footprint ± 0.5% Reset threshold accuracy at room temperature ± 2% Reset threshold accuracy over temperature extremes n Reset assertion down to 1V VCC (RESET option only) n 28 µA VCC supply current Applications n n n n Embedded Controllers and Processors Intelligent Instruments Automotive Systems Critical µP Power Monitoring Features n Standard Reset Threshold voltage: 3.08V n Custom Reset Threshold voltages: For other voltages between 2.2V and 5.0V in 10mV increments, contact National Semiconductor Corp. Typical Application 10136903 © 2002 National Semiconductor Corporation DS101369 www.national.com LM3704/LM3705 Connection Diagram Top View (looking from the coating side) micro SMD 9 Bump Package BPA09 MSOP-10 10136902 10136901 Pin Description Pin No. micro SMD A1 B1 C1 MSOP 2 1 10 Name MR VCC RESET Function Manual-Reset input. When MR is less than VMRT (Manual Reset Threshold) RESET/RESET is engaged. Power Supply input. Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays low whenever VCC is below the reset threshold or when MR is below VMRT. It remains low for tRP after either VCC rises above the reset threshold, or after MR input rises above VMRT (LM3704 only). Reset Logic Output. RESET is the inverse of RESET (LM3705 only). Power-Fail Logic Output. When PFI is below VPFT, PFO goes low; otherwise, PFO remains high. Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT (Low-Line Output Threshold). This output can be used to generate an NMI (Non-Maskable Interrupt) to provide an early warning of imminent power-failure. Ground reference for all signals. No Connect. Power-Fail Comparator Input. When PFI is less than VPFT (Power-Fail Reset Threshold), the PFO goes low; otherwise, PFO remains high. No Connect. Test input used at factory only. Leave floating. RESET C2 C3 8 7 PFO LLO B3 A3 A2 B2 5 4, 6 3 9 GND NC PFI NC www.national.com 2 LM3704/LM3705 Block Diagram 10136926 3 www.national.com LM3704/LM3705 Ordering Information 10136904 *For other voltages between 2.2V and 5.0V, please contact National Semiconductor sales office. LM3704/LM3705 Part Number LM3704XCBP-308 LM3704XCBPX-308 LM3704XCMM-308 LM3704XCMMX-308 LM3705XCBP-308 LM3705XCBPX-308 LM3705XCMM-308 LM3705XCMMX-308 Output totem-pole totem-pole totem-pole totem-pole totem-pole totem-pole totem-pole totem-pole Reset Timeout Period 200ms 200ms 200ms 200ms 200ms 200ms 200ms 200ms x x x x x x Package MSOP micro SMD x x Package Marking %%I4 %%I4 R35B R35B %%I5 %%I5 R36B R36B %% is the datecode and will vary with time. Table Of Functions Part Number LM3704 LM3705 Active Low Reset x x Active High Reset Output (X = totem-pole) (Y = open-drain) X, Y* X Reset Timeout Period Customized Customized Manual Reset x x Power Fail Comparator x x Low Line Output x x * = available upon request. Contact National www.national.com 4 LM3704/LM3705 Absolute Maximum Ratings (Note 1) Power Dissipation (Note 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) All Other Inputs ESD Ratings (Note 2) Human Body Model Machine Model −0.3V to 6.0V −0.3V to VCC + 0.3V 1.5kV 150V Operating Ratings (Note 1) Temperature Range −40˚C ≤ TJ ≤ 85˚C LM3704/LM3705 Series Electrical Characteristics Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise specified: VCC = +2.2V to 5.5V. Symbol VCC ICC Parameter Operating Voltage Range: VCC VCC Supply Current Reset Threshold LM3704 LM3705 All inputs = VCC; all outputs floating Conditions Min 1.0 1.2 28 Typ Max 5.5 5.5 50 Units POWER SUPPLY V µA RESET THRESHOLD VRST VCC falling VCC falling: TA = 0˚C to 70˚C VRSTH tRP Reset Threshold Hysteresis Reset Timeout Period Reset Reset Reset Reset Timeout Timeout Timeout Timeout Period Period Period Period = = = = A B C D 1 20 140 1120 −0.5 −2 −1.5 0.0032 • VRST 1.4 28 200 1600 20 2 40 280 2240 VRST +0.5 +2 +1.5 mV % ms tRD VCC to Reset Delay RESET VCC falling at 1mV/µs µs RESET (LM3705) VOL VCC > 2.25V, ISINK = 900µA VCC VCC VOH RESET VCC VCC VCC VCC VCC ILKG Output Leakage Current RESET 0.3 0.3 0.4 0.8 VCC 0.8 VCC 0.8 VCC 0.8 VCC VCC − 1.5V 1.0 µA V V > > > > > > > 2.7V, ISINK = 1.2mA 4.5V, ISINK = 3.2mA 1.2V, ISOURCE = 50µA 1.8V, ISOURCE = 150µA 2.25V, ISOURCE = 300µA 2.7V, ISOURCE = 500µA 4.5V, ISOURCE = 800µA VRESET = 5.5V RESET (LM3704) VOL VCC > 1.0V, ISINK = 50µA VCC VCC VCC VCC VOH RESET VCC VCC VCC 0.3 0.3 0.3 0.3 0.4 0.8 VCC 0.8 VCC VCC − 1.5V V > > > > > > > 1.2V, ISINK = 100µA 2.25V, ISINK = 900µA 2.7V, ISINK = 1.2mA 4.5V, ISINK = 3.2mA 2.25V, ISOURCE = 300µA 2.7V, ISOURCE = 500µA 4.5V, ISOURCE = 800µA 5 www.national.com LM3704/LM3705 LM3704/LM3705 Series Electrical Characteristics Symbol PFI/MR VPFT VMRT VPFTH/ VMRTH IPFI RMR tMD tMR PFO, LLO VOL PFO, LLO Output Voltage VCC > 2.25V, ISINK = 900µA VCC > 2.7V, ISINK = 1.2mA VCC > 4.5V, ISINK = 3.2mA VOH VCC VCC VCC LLO OUTPUT VLLOT LLO Output Threshold (VLLO − VRST, VCC falling) Low-Line Comparator Hysteresis Low-Line Comparator Delay VCC falling at 1mV/µs PFI Input Threshold MR Input Threshold PFI/MR Threshold Hysteresis Input Current (PFI only) MR Pull-up Resistance MR to Reset Delay MR Pulse Width MR, Low MR, High PFI/MR falling: VCC = VRST MAX (Continued) Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise specified: VCC = +2.2V to 5.5V. Parameter Conditions Min 1.200 Typ 1.225 Max 1.250 0.8 2.0 to 5.5V −75 35 56 12 25 0.3 0.3 0.4 0.8 VCC 0.8 VCC VCC − 1.5V 1.01 • VRST 1.02 • VRST 1.03 • VRST V V 0.0032 • VRST 75 75 Units V V mV nA kΩ µS µS > 2.25V, ISOURCE = 300µA > 2.7V, ISOURCE = 500µA > 4.5V, ISOURCE = 800µA VLLOTH 0.0032 • VRST mV tCD 20 µs Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed conditions. Note 2: The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated using: Where the value of θJ-A for the MSOP-10 package is 195˚C/W in a typical PC board mounting and the micro SMD package is 220˚C/W. www.national.com 6 LM3704/LM3705 Typical Performance Characteristics Supply Current vs Supply Voltage 3.3V Supply Current vs Temperature 10136911 10136915 Normalized Reset Threshold Voltage vs Temperature Reset Timeout Period vs VCC 10136912 10136932 Reset Timeout Period vs Temperature Max. Transient Duration vs Reset Comparator Overdrive (VCC = 3.3V) 10136910 10136916 7 www.national.com LM3704/LM3705 Typical Performance Characteristics Low-Line Comparator Propagation Delay vs Temperature (Continued) 10136914 www.national.com 8 LM3704/LM3705 Circuit Information Reset Output The Reset input of a µP initializes the device into a known state. The LM3704/LM3705 microprocessor supervisory circuits assert a forced reset output to prevent code execution errors during power-up, power-down, and brownout conditions. RESET is guaranteed valid for VCC > 1V. Once VCC exceeds the reset threshold, an internal timer maintains the output for the reset timeout period. After this interval, reset goes high. The LM3704 offers an active-low RESET; The LM3705 offers an active-high RESET. Any time VCC drops below the reset threshold (such as during a brownout), the reset activates. When VCC again rises above the reset threshold, the internal timer starts. Reset holds until VCC exceeds the reset threshold for longer than the reset timeout period. After this time, reset releases. The Manual Reset input (MR) will initiate a forced reset also. See the Manual Reset Input section. Reset Threshold The LM3704/LM3705 family is available with a reset voltage of 3.08V. Other reset thresholds in the 2.20V to 5.0V range, in steps of 10 mV, are available; contact National Semiconductor for details. Manual Reset Input (MR) Many µP-based products require a manual reset capability, allowing the operator to initiate a reset. The MR input is fully debounced and provides an internal 56 kΩ pull-up. When the MR input is pulled below VMRT (1.225V) for more than 25 µs, reset is asserted after a typical delay of 12 µs. Reset remains active as long as MR is held low, and releases after the reset timeout period expires after MR rises above VMRT. Use MR with digital logic to assert or to daisy chain supervisory circuits. It may be used as another low-line comparator by adding a buffer. Power-Fail Comparator (PFI/PFO) The PFI is compared to a 1.225V internal reference, VPFT. If PFI is less than VPFT, the Power Fail Output PFO drops low. The power-fail comparator signals a falling power supply, and is driven typically by an external voltage divider that senses either the unregulated supply or another system supply voltage. The voltage divider generally is chosen so the voltage at PFI drops below VPFT several milliseconds before the main supply voltage drops below the reset threshold, providing advanced warning of a brownout. The voltage threshold is set by R1 and R2 and is calculated as follows: Note this comparator is completely separate from the rest of the circuitry, and may be employed for other functions as needed. Low-Line Output (LLO) The low-line output comparator is typically used to provide a non-maskable interrupt to a µP when VCC begins falling. LLO monitors VCC and goes low when VCC falls below VLLOT (typically 1.02 • VRST) with hysteresis of 0.0032 • VRST. Special Precautions for the micro SMD Package As with most integrated circuits, the LM3704 and LM3705 are sensitive to exposure from visible and infrared (IR) light radiation. Unlike a plastic encapsulated IC, the micro SMD package has very limited shielding from light, and some sensitivity to light reflected from the surface of the PC board or long wavelength IR entering the die from the side may be experienced. This light could have an unpredictable affect on the electrical performance of the IC. Care should be taken to shield the device from direct exposure to bright visible or IR light during operation. Micro SMD Mounting The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note AN-1112. Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 9-pin package is the NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device. 9 www.national.com LM3704/LM3705 Timing Diagrams 10136928 FIGURE 1. LM3704 Reset Time with MR 10136929 FIGURE 2. LLO Output 10136930 FIGURE 3. PFI Comparator Timing Diagram www.national.com 10 LM3704/LM3705 Typical Application Circuits 10136918 FIGURE 4. Monitoring Two Critical Supplies 10136919 FIGURE 5. Monitoring Two Supplies plus Manual Reset 11 www.national.com LM3704/LM3705 Typical Application Circuits (Continued) 10136920 FIGURE 6. Monitoring Dual Supplies plus External Fault Input 10136921 Note: MR input with its 1.225V nominal threshold, may monitor an additional supply voltage. An internal 56 kΩ pull-up resistor is included on this input. FIGURE 7. Microprocessor Supervisor with Early Warning Detector www.national.com 12 LM3704/LM3705 Typical Application Circuits (Continued) 10136924 FIGURE 8. LM3705 Power-On Delay 13 www.national.com LM3704/LM3705 Typical Application Circuits (Continued) 10136923 FIGURE 9. LM3705 Power-On Delay with Overvoltage Protection www.national.com 14 LM3704/LM3705 Typical Application Circuits (Continued) 10136922 FIGURE 10. Regulator/Switch with Long-Term Overvoltage Lockout Prevents Overdissipation in Linear Regulator 10136931 FIGURE 11. Switch Debouncer 15 www.national.com LM3704/LM3705 Physical Dimensions unless otherwise noted inches (millimeters) 10 Lead MSOP Package NS Package Number MUB10A www.national.com 16 LM3704/LM3705 Microprocessor Supervisory Circuits with Power Fail Input, Low Line Output and Manual Reset Physical Dimensions inches (millimeters) unless otherwise noted (Continued) NOTES: UNLESS OTHERWISE SPECIFIED 1. EPOXY COATING 2. 63Sn/37Pb EUTECTIC BUMP 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6.NO JEDEC REGISTRATION AS OF AUG.1999. 9 bump micro SMD Package NS Package Number BPA09FFB The dimensions of X1, X2 and X3 are given below X1 = 1.412mm X2 = 1.412mm X3 = 0.850mm LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 www.national.com National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.