LMH6574_05

LMH6574 4:1 High Speed Video Multiplexer September 2005 LMH6574 4:1 High Speed Video Multiplexer General Description The LMH™6574 is a high performance analog multiplexer optimized for professional grade video and other high fidelity high bandwidth analog applications. The output amplifier selects any one of four buffered input signals based on the state of the two address bits. The LMH6574 provides a 400 MHz bandwidth at 2 VPP output signal levels. Multimedia and high definition television (HDTV) applications can benefit from the LMH6574’s 0.1 dB bandwidth of 150 MHz and its 2200 V/µs slew rate. The LMH6574 supports composite video applications with its 0.02% and 0.05˚ differential gain and phase errors for NTSC and PAL video signals while driving a single, back terminated 75Ω load. An 80 mA linear output current is available for driving multiple video load applications. The LMH6574 gain is set by external feedback and gain set resistors for maximum flexibility. The LMH6574 is available in the 14 pin SOIC package. Features n n n n n n n n n n 500 MHz, 500 mV −3 dB bandwidth, AV = 2 400 MHz, 2VPP −3 dB bandwidth, AV = 2 8 ns channel switching time 70 dB channel to channel isolation @ 10 MHz 0.02%, 0.05˚ diff. gain, phase 0.1 dB gain flatness to 150 MHz 2200 V/µs slew rate Wide supply voltage range: 6V ( ± 3V) to 12V ( ± 6V) −68 dB HD2 @ 5 MHz −84 dB HD3 @ 5 MHz Applications n n n n n n Video router Multi input video monitor Instrumentation / Test equipment Receiver IF diversity switch Multi Channel A/D Driver Picture in Picture video switch Connection Diagram 14-Pin SOIC Truth Table A1 1 1 0 0 X X A0 1 0 1 0 X X EN 0 0 0 0 1 X SD 0 0 0 0 0 1 OUT CH 3 CH2 CH1 CH 0 Disable Shutdown 20119705 Top View Ordering Information Package 14-Pin SOIC Part Number LMH6574MA LMH6574MAX Package Marking LH6574MA Transport Media 55 Units/Rail 2.5k Units Tape and Reel NSC Drawing M14A LMH™ is a trademark of National Semiconductor Corporation. © 2005 National Semiconductor Corporation DS201197 www.national.com LMH6574 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance Human Body Model Machine Model Supply Voltage (V+ − V−) IOUT (Note 3) Signal & Logic Input Pin Voltage Signal & Logic Input Pin Current Maximum Junction Temperature (Note 4) 2000V 200V 13.2V 130 mA Storage Temperature Range Soldering Information Infrared or Convection (20 sec) Wave Soldering (10 sec) −65˚C to +150˚C 235 ˚C 260 ˚C Operating Ratings Operating Temperature Supply Voltage Range Thermal Resistance Package 14-Pin SOIC (Note 1) −40 ˚C to 85 ˚C 6V to 12V (θJA) 130˚C/W (θJC) 40˚C/W ± (VS+0.6V) ± 20 mA +150˚C ± 5V Electrical Characteristics VS = ± 5V, RL = 100Ω, AV = 2 V/V, RF = 575 Ω, TJ = 25 ˚C, Unless otherwise specified. Bold numbers specify limits at temperature extremes. Symbol SSBW LSBW .1 dBBW DG DP XTLK TRS Parameter −3 dB Bandwidth –3 dB Bandwidth 0. 1 dB Bandwidth Differential Gain Differential Phase Channel to Channel Crosstalk Conditions (Note 2) VOUT = 0.5 VPP VOUT = 2 VPP VOUT = 0.25 VPP RL = 150Ω, f = 4.43 MHz RL = 150Ω, f = 4.43MHz All Hostile, 5 MHz Min Typ 500 400 150 0.02 0.05 −85 8 10 2.4 17 5 2200 −68 −84 −80 Max Units MHz MHz MHz % deg dB ns ns ns ns % V/µs dBc dBc dBc Frequency Domain Performance Time Domain Response Channel to Channel Switching Time Logic Transition to 90% Output Enable and Disable Times TRL TSS OS SR Distortion HD2 HD3 IMD 2nd Harmonic Distortion 3 rd Logic Transition to 90% or 10% Output 4V Step 2V Step 2V Step 4V Step 2 VPP , 5 MHz 2 VPP , 5 MHz 10 MHz, Two Tones 2 VPP at Output Rise and Fall Time Settling Time to 0.05% Overshoot Slew Rate Harmonic Distortion 3rd Order Intermodulation Products Equivalent Input Noise VN ICN CHGM VIO DVIO IBN DIBN Voltage Current Channel to Channel Gain Difference Input Offset Voltage (Note 5) Offset Voltage Drift Input Bias Current (Notes 7, 5) Bias Current Drift Inverting Input Bias Current PSRR Power Supply Rejection Ratio (Note 5) Pin 12, Feedback Point, VIN = 0V DC, Input Referred 47 45 VIN = 0V > 1 MHz, Input Referred > 1 MHz, Input Referred DC, Difference in Gain Between Channels VIN = 0V 5 5 nV pA/ Static, DC Performance ± 0.005 1 30 −3 11 −7 54 ± 0.032 ± 0.035 ± 20 ± 25 ±5 ± 5.6 ± 10 ± 13 % mV µV/˚C µA nA/˚C dB www.national.com 2 LMH6574 ± 5V Electrical Characteristics Symbol ICC Parameter Supply Current (Note 5) Supply Current Disabled(Note 5) Supply Current Shutdown VIH VIL IiL IiH Logic High Threshold(Note 5) Logic Low Threshold (Note 5) Logic Pin Input Current Low (Note 7) Logic Pin Input Current High (Note 7) Input Resistance Input Capacitance Output Resistance Output Resistance Output Capacitance Output Voltage Range (Continued) VS = ± 5V, RL = 100Ω, AV = 2 V/V, RF = 575 Ω, TJ = 25 ˚C, Unless otherwise specified. Bold numbers specify limits at temperature extremes. Conditions (Note 2) No Load ENABLE > 2V SHUTDOWN > 2V Select & Enable Pins (SD & EN) Select & Enable Pins (SD & EN) Logic Input = 0V Select & Enable Pins (SD & EN) Logic Input = 2.0V, Select & Enable Pins (SD & EN) −2.9 -8.5 −1 47 68 72.5 2.0 0.8 Min Typ 13 4.7 1.8 Max 16 18 5.8 5.9 2.5 2.6 Units mA mA mA V V µA µA Miscellaneous Performance RIN+ CIN ROUT ROUT COUT VO VOL CMIR IO Input Voltage Range Linear Output Current (Notes 5, 7) VIN = 0V 5 0.8 Output Active, (EN and SD < 0.8 V) Output Disabled, (EN or SD > 2V) Output Disabled, (EN or SD > 2V) No Load RL = 100Ω 0.04 3000 3.1 kΩ pF Ω Ω pF V V V ± 3.54 ± 3.53 ± 3.18 ± 3.17 ± 2.5 +60 -70 +50 −60 ± 3.7 ± 3.5 ± 2.6 ± 80 mA ISC Short Circuit Current (Note 3) VIN = ± 2V, Output Shorted to Ground ± 230 mA ± 3.3V Electrical Characteristics VS = ± 3.3V, RL = 100Ω, AV = 2 V/V, RF = 575 Ω; Unless otherwise specified. Symbol SSBW LSBW GFP XTLK TRL TSS OS SR Distortion HD2 HD3 2nd Harmonic Distortion 3rd Harmonic Distortion 2 VPP, 10 MHz 2 VPP, 10 MHz −67 −87 dBc dBc Parameter −3 dB Bandwidth −3 dB Bandwidth Peaking Channel to Channel Crosstalk Rise and Fall Time Settling Time to 0.05% Overshoot Slew Rate Conditions (Note 2) VOUT = 0.5 VPP VOUT = 2.0 VPP VOUT = 0.5 VPP DC to 200 MHz All Hostile, f = 5 MHz 2V Step 2V Step 2V Step 2V Step Min Typ 475 375 100 0.4 −85 2 20 5 1400 Max Units MHz MHz MHz dB dBc ns ns % V/µs Frequency Domain Performance 0.1 dBBW 0.1 dB Bandwidth Time Domain Response 3 www.national.com LMH6574 ± 3.3V Electrical Characteristics Symbol VIO IBN PSRR ICC VIH VIL RIN+ CIN ROUT VO VOL CMIR IO ISC Input Voltage Range Linear Output Current Short Circuit Current Parameter Input Offset Voltage Input Bias Current (Note 7) Power Supply Rejection Ratio Supply Current Logic High Threshold Logic Low Threshold Input Resistance Input Capacitance Output Resistance Output Voltage Range Static, DC Performance (Continued) VS = ± 3.3V, RL = 100Ω, AV = 2 V/V, RF = 575 Ω; Unless otherwise specified. Conditions (Note 2) VIN = 0V VIN = 0V DC, Input Referred No Load Select & Enable Pins (SD & EN) Select & Enable Pins (SD & EN) 5 0.8 0.06 No Load RL = 100Ω VIN = 0V VIN = ± 1V, Output Shorted to Ground 1.3 0.4 Min Typ -5 -3 49 12 Max Units mV µA dB mA V V kΩ pF Ω V V V mA mA Miscellaneous Performance ±2 ± 1.8 ± 1.2 ± 60 ± 150 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables. Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Applications Section for information on temperature de-rating of this device. Min/Max ratings are based on product testing, characterization and simulation. Individual parameters are tested as noted. Note 3: The maximum output current (IOUT) is determined by the device power dissipation limitations (The junction temperature cannot be allowed to exceed 150˚C). See the Power Dissipation section of the Application Section for more details. A short circuit condition should be limited to 5 seconds or less. Note 4: Human Body model, 1.5 kΩ in series with 100 pF. Machine model, 0Ω In series with 200 pF. Note 5: Parameters guaranteed by electrical testing at 25˚C. Note 6: Parameters guaranteed by design. Note 7: Positive Value is current into device. www.national.com 4 LMH6574 Typical Performance Characteristics wise specified. Frequency Response vs. VOUT Vs = ± 5V, RL = 100Ω, AV = 2, RF = RG = 575Ω; unless otherFrequency Response vs. Gain 20119702 20119703 Frequency Response vs. Capacitive Load Suggested ROUT vs. Capacitive Load 20119714 20119715 Suggested Value of RF vs. Gain Pulse Response 4VPP 20119701 20119725 5 www.national.com LMH6574 Typical Performance Characteristics Vs = ±5V, RL = 100Ω, AV = 2, RF = RG = 575Ω; unless otherwise specified. (Continued) Pulse Response 2VPP Pulse Response 2VPP 20119729 20119730 Closed Loop Output Impedance Closed Loop Output Impedance 20119708 20119709 PSRR vs. Frequency Channel Switching 20119704 20119716 www.national.com 6 LMH6574 Typical Performance Characteristics Vs = ±5V, RL = 100Ω, AV = 2, RF = RG = 575Ω; unless otherwise specified. (Continued) SHUTDOWN Switching Shutdown Glitch 20119721 20119727 ENABLE Switching Disable Glitch 20119726 20119728 HD2 vs. Frequency HD3 vs. Frequency 20119733 20119734 7 www.national.com LMH6574 Typical Performance Characteristics Vs = ±5V, RL = 100Ω, AV = 2, RF = RG = 575Ω; unless otherwise specified. (Continued) HD2 vs. VS HD3 vs. VS 20119707 20119706 HD2 vs. VOUT HD3 vs. VOUT 20119711 20119710 Minimum VOUT vs. IOUT(Note 7) Maximum VOUT vs. IOUT(Note 7) 20119712 20119713 www.national.com 8 LMH6574 Typical Performance Characteristics Vs = ±5V, RL = 100Ω, AV = 2, RF = RG = 575Ω; unless otherwise specified. (Continued) Crosstalk vs. Frequency Off Isolation 20119735 20119731 9 www.national.com LMH6574 Application Notes GENERAL INFORMATION 20119722 FIGURE 1. Typical Application The LMH6574 is a high-speed 4:1 analog multiplexer, optimized for very high speed and low distortion. With selectable gain and excellent AC performance, the LMH6574 is ideally suited for switching high resolution, presentation grade video signals. The LMH6574 has no internal ground reference. Single or split supply configurations are both possible. The LMH6574 features very high speed channel switching and disable times. When disabled the LMH6574 output is high impedance making MUX expansion possible by combining multiple devices. See “Multiplexer Expansion” section below. VIDEO PERFORMANCE The LMH6574 has been designed to provide excellent performance with production quality video signals in a wide variety of formats such as HDTV and High Resolution VGA. Best performance will be obtained with back-terminated loads. The back termination reduces reflections from the transmission line and effectively masks transmission line and other parasitic capacitances from the amplifier output stage. Figure 1 shows a typical configuration for driving a 75Ω. Cable. The output buffer is configured for a gain of 2, so using back terminated loads will give a net gain of 1. FEEDBACK RESISTOR SELECTION 20119732 FIGURE 2. Suggested RF vs. Gain www.national.com 10 LMH6574 Application Notes (Continued) The LMH6574 has a current feedback output buffer with gain determined by external feedback (RF) and gain set (RG) resistors. With current feedback amplifiers, the closed loop frequency response is a function of RF. For a gain of 2 V/V, the recommended value of RF is 575Ω. For other gains see the chart “Suggested RF vs Gain”. Generally, lowering RF from the recommended value will peak the frequency response and extend the bandwidth while increasing the value of RF will cause the frequency response to roll off faster. Reducing the value of RF too far below the recommended value will cause overshoot, ringing and, eventually, oscillation. Since all applications are slightly different it is worth some experimentation to find the optimal RF for a given circuit. For more information see Application Note OA-13 which describes the relationship between RF and closed-loop frequency response for current feedback operational amplifiers. The impedance looking into pin 12 is approximately 20Ω. This allows for good bandwidth at gains up to 10 V/V. When used with gains over 10 V/V, the LMH6574 will exhibit a “gain bandwidth product” similar to a typical voltage feedback amplifier. For gains of over 10 V/V consider selecting a high performance video amplifier like the LMH6720 to provide additional gain. SD vs. EN The LMH6574 has both shutdown and disable capability. The shutdown feature affects the entire chip, whereas the disable function only affects the output buffer. When in shutdown mode, minimal power is consumed. The shutdown function is very fast, but causes a very brief spike of about 400 mV to appear on the output. When in shutdown mode the LMH6574 consumes only 1.8 mA of supply current. For maximum input to output isolation use the shutdown function. The EN pin only disables the output buffer which results in a substantially reduced output glitch of only 50 mV. While disabled the chip consumes 4.7 mA, considerably more than when shutdown. This is because the input buffers are still active. For minimal output glitch use the EN pin. Also, care should be taken to ensure that, while in the disabled state, the voltage differential between the active input buffer (the one selected by pins A0 and A1) and the output pin stays less than 2V. As the voltage differential increases, input to output isolation decreases. Normally this is not an issue. See the section on MULTIPLEXER EXPANSION for further details. To reduce the output glitch when using the SD pin, switch the EN pin at least 10 ns before switching the SD pin. This can be accomplished by using an RC delay circuit between the two pins if only one control signal is available. Logic inputs "SD" and "EN" will revert to the "High", while "A0" and "A1" will revert to the "Low" state when left floating. MULITPLEXER EXPANSION Figure 3 shows an 8:1 MUX using two LMH6574’s. 20119718 FIGURE 3. 8:1 MUX USING TWO LMH6574’s 11 www.national.com LMH6574 Application Notes (Continued) Other Applications The LMH6574 could support a multi antenna receiver with up to four separate antennas. Monitoring the signal strength of all 4 antennas and connecting the strongest signal to the final IF stage would provide effective spacial diversity. For direction finding, the LMH6574 could be used to provide high speed sampling of four separate antennas to a single DSP which would use the information to calculate the direction of the received signal. DRIVING CAPACITIVE LOADS Capacitive output loading applications will benefit from the use of a series output resistor ROUT. Figure 6 shows the use of a series output resistor, ROUT, to stabilize the amplifier output under capacitive loading. Capacitive loads of 5 to 120 pF are the most critical, causing ringing, frequency response peaking and possible oscillation. The chart “Suggested ROUT vs. Cap Load” gives a recommended value for selecting a series output resistor for mitigating capacitive loads. The values suggested in the charts are selected for 0.5 dB or less of peaking in the frequency response. This gives a good compromise between settling time and bandwidth. For applications where maximum frequency response is needed and some peaking is tolerable, the value of ROUT can be reduced slightly from the recommended values. 20119719 FIGURE 4. Delay Circuit Implementation If it is important in the end application to make sure that no two inputs are presented to the output at the same time, an optional delay block can be added, to drive the SHUTDOWN pin of each device. Figure 4 shows one possible approach to this delay circuit. The delay circuit shown will delay SHUTDOWN’s H to L transitions (R1 and C1 decay) but won’t delay its L to H transition. R2 should be kept small compared to R1 in order to not reduce the SHUTDOWN voltage and to produce little or no delay to SHUTDOWN. With the SHUTDOWN pin putting the output stage into a high impedance state, several LMH6574’s can be tied together to form a larger input MUX. However, there is a loading effect on the active output caused by the unselected devices. The circuit in Figure 5 shows how to compensate for this effect. For the 16:1 MUX function shown in Figure 5 below the gain error would be about −0.8 dB, or about 9%. In the circuit in Figure 5, resistor ratios have been adjusted to compensate for this gain error. By adjusting the gain of each multiplexer circuit the error can be reduced to the tolerance of the resistors used (1% in this example). 20119724 FIGURE 6. Decoupling Capacitive Loads 20119717 FIGURE 5. Multiplexer Gain Compensation Disabling of the LMH6574 using the EN pin is not recommended for use when doing multiplexer expansion. While disabled, If the voltage between the selected input and the chip output exceeds approximately 2V the device will begin to enter a soft breakdown state. This will show up as reduced input to output isolation. The signal on the non-inverting input of the output driver amplifier will leak through to the inverting input, and then to the output through the feedback resistor. The worst case is a gain of 1 configuration where the non inverting input follows the active input buffer and (through the feedback resistor) the inverting input follows the voltage driving the output stage. The solution for this is to use shutdown mode for multiplexer expansion. www.national.com 12 20119715 FIGURE 7. Suggested ROUT vs. Capacitive Load LMH6574 Other Applications (Continued) utmost importance to make sure that the TJMAX is never exceeded due to the overall power dissipation. Follow these steps to determine the Maximum power dissipation for the LMH6574: 1. Calculate the quiescent (no-load) power: PAMP = ICC* (VS), where VS = V+ - V−. Calculate the RMS power dissipated in the output stage: PD (rms) = rms ((VS - VOUT) * IOUT), where VOUT and IOUT are the voltage across and the current through the external load and VS is the total supply voltage. 3. Calculate the total RMS power: PT = PAMP + PD. The maximum power that the LMH6574 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150˚ – TAMB)/ θJA, where TAMB = Ambient temperature (˚C) and θJA = Thermal resistance, from junction to ambient, for a given package (˚C/W). For the SOIC package θJA is 130 ˚C/W. 20119714 2. ESD PROTECTION The LMH6574 is protected against electrostatic discharge (ESD) on all pins. The LMH6574 will survive 2000V Human Body model and 200V Machine model events. Under normal operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6574 is driven by a large signal while the device is powered down the ESD diodes will conduct . The current that flows through the ESD diodes will either exit the chip through the supply pins or will flow through the device, hence it is possible to power up a chip with a large signal applied to the input pins. Using the shutdown mode is one way to conserve power and still prevent unexpected operation. EVALUATION BOARDS National Semiconductor provides the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. Many of the data sheet plots were measured with this board. Device LMH6574 Package SOIC Evaluation Board LMH730276 FIGURE 8. Frequency Response vs. Capacitive Load LAYOUT CONSIDERATIONS Whenever questions about layout arise, use the evaluation board as a guide. The LMH730276 is the evaluation board supplied with samples of the LMH6574. To reduce parasitic capacitances, ground and power planes should be removed near the input and output pins. For long signal paths controlled impedance lines should be used, along with impedance matching elements at both ends. Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be located farther from the device, the smaller ceramic capacitors should be placed as close to the device as possible. In Figure 1, the capacitor between V+ and V− is optional, but is recommended for best second harmonic distortion. Another way to enhance performance is to use pairs of 0.01 µF and 0.1 µF ceramic capacitors for each supply bypass. POWER DISSIPATION The LMH6574 is optimized for maximum speed and performance in the small form factor of the standard SOIC package. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of An evaluation board can be shipped when a sample request is placed with National Semiconductor. Samples can be ordered on the National web page. (www.national.com) 13 www.national.com LMH6574 4:1 High Speed Video Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted 14-Pin SOIC NS Package Number M14A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. 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