LP3983

LP3983 Micropower, Low Quiescent Current, CMOS Voltage Regulator in micro SMD Package May 2003 LP3983 Micropower, Low Quiescent Current, CMOS Voltage Regulator in micro SMD Package General Description The LP3983 is a fixed voltage low current regulator. The LP3983 is ideally suited to standby type applications in battery powered equipment, it allows the lifetime of the battery to be maximized. The device can be controlled via an Enable(disable) control and can thus be used by the system to further extend the battery lifetime by reducing the power consumption to virtually zero. Performance is specified for a -40˚C to 125˚C temperature range. For output voltages other than those stated and alternative package options, please contact your local NSC sales office. Key Specifications n n n n n n n n Input Voltage Range Output Voltages Output Current Output Capacitors Virtually Zero IQ (Disabled) Low IQ (Enabled) PSRR Fast Start Up 2.5 to 6.0V 1.6, 1.8, & 2.5 5mA 1µF Low ESR 1.0µA 14µA 10dB 170µs Applications n n n n GSM Portable Phones CDMA Cellular Handsets Bluetooth Devices Portable Information Appliances Features n n n n n n Miniature 5 pin package Logic Controlled Enable No Noise Bypass Capacitor Required Stable with Low ESR Ceramic Capacitors Fast turn ON Short Circuit Protection Package n Tiny 5 Pin micro SMD 828µm by 1387µm Typical Application Circuit 20057601 © 2003 National Semiconductor Corporation DS200576 www.national.com LP3983 Block Diagram LP3983 20057602 Connection Diagrams 5 Pin micro SMD Package 5 Pin micro SMD Package 20057603 20057604 Top View See NS Package Number TLA05 Bottom View See NS Package Number TLA05 www.national.com 2 LP3983 Pin Descriptions Name VEN GND VOUT VIN N/C Pin No. A1 B2 C1 C3 A3 Name and Function Enable Input Logic, Enables regulator when ≥ 1.2V. Disables regulator when ≤ 0.5V Common Ground Voltage Output. Connect this Output to the Load Circuit. Unregulated supply Input. No Connection. There should be no electrical connection made to this pin. Ordering Information TL refers as 0.300mm bump size with package height of 0.6mm Output Voltage (V) 1.6 1.8 2.5 Grade STD STD STD LP3983 Supplied as 250 Units, Tape and Reel LP3983ITL-1.6 LP3983ITL-1.8 LP3983ITL-2.5 LP3983 Supplied as 3000 Units, Tape and Reel LP3983ITLX-1.6 LP3983ITLX-1.8 LP3983ITLX-2.5 * Please contact National Semiconductor for availability 3 www.national.com LP3983 Absolute Maximum Ratings 2) (Notes 1, Machine Model 100V If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN VEN VOUT Junction Temperature Storage Temperature Pad Temperature (Soldering, 10 sec.) ESD (Note 4) Human Body Model 2KV −0.3 to 6.5V −0.3 to (VIN + 0.3V) to 6.5V(max) −0.3V to(V IN Operating Ratings (Notes 1, 2) VIN (Note 9) VEN, Recommended Load Current Junction Temperature Ambient Temperature (Note 3) VIN(MIN)to 6V 0 to 6.0V 0 to 5mA −40˚C to +125˚C −40˚C to +119˚C + 0.3V) to 6.5V(max) 150˚C −65˚C to +150˚C 265˚C Thermal Properties (Note 3) Junction to Ambient Thermal Resistance (θJA) 255˚C/W Electrical Characteristics Unless otherwise specified: VEN = 1.8V,VIN = VOUT(nom) + 1.0V, CIN = 1.0 µF, IOUT = 1.0mA, COUT = 1.0 µF. Typical values and limits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Note 10) (Note 11) Symbol Parameter Output Voltage Tolerance Conditions IOUT = 0mA to 5mA Typ Limit Min -55 -96 −6 PSRR IQ ISC IOUT Power Supply Rejection Ratio Quiescent Current Short Circuit Current Limit (Note 7) Maximum Output Current Maximum Input Current at VEN input Logic Low Input Threshold Logic High Input Threshold Turn on Time(Note 7) VIN = VOUT(nom) + 1V, f ≤10 kHz, IOUT = 1mA IOUT = 50µA, VIN = 4.2V VEN = 0.4V, VIN = 4.2V Output Grounded 10 14 1 28 5 21 3 35 Max +55 +96 +6 Units mV from VOUT(nom) % of VOUT(nom) dB µA mA mA ∆VOUT (Note 6) VEN = 0.4 and VIN= 6.0V VIN = VIN(MIN) to 6.0V VIN = VIN(MIN) to 6.0V Logic Control Characteristics IEN VIL VIH 0.02 0.5 1.2 µA V V Timing Characteristics TON (Note 8) 170 250 µs Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: The maximum ambient temperature (TA(max)) is dependant on the maximum operating junction temperature (TJ(max-op) = 125˚C), the maximum power dissipation of the device in te application (PD(max)), and the junction to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max) = TJ(max-op) - (θJA x PD(max)). Note 4: The human body model is 100pF discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. Note 5: Junction to ambient thermal resistance is dependant on the application and board layout. In applications where high maximum power dissipation is possible, special care must be paid to thermal dissipation issues in board design. Note 6: The device maintains the regulated output voltage without load. www.national.com 4 LP3983 Electrical Characteristics (Continued) Note 7: This electrical specification is guaranteed by design. Note 8: Time from VEN = 1.2V to VOUT = 95% of VOUT(NOM) Note 9: The minimum VIN is dependant on the device output option. For VOUT(NOM) ≤ 2.7V, VIN(MIN) will equal 2.5V. For VOUT(NOM) > 2.7V, VIN(MIN) will equal VOUT(NOM) + 200mV. Note 10: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with TJ = 25˚C or correlated using Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Note 11: The target output voltage which is labelled VOUT(NOM) is the desired voltage option. Output Capacitor, Recommended Specifications Symbol Co Parameter Output Capacitor Conditions Capacitance(Note 12) ESR Value 1.0 Limit Min 0.75 5 500 Max Units µF mΩ Note 12: The capacitor tolerance should be ± 25% or better over the temperature range. Capacitor types recommended are X7R, Y5V, and Z5U. 5 www.national.com LP3983 Typical Performance Characteristics = VOUT(nom) + 1.0V, TA = 25˚C, Enable pin is tied to VIN. Ground Current @ TA = 25˚C Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN Ground Current vs VIN. IOUT = 7mA 20057626 20057628 Ripple Rejection (CIN = COUT = 1µF, IL = 100µA) Start Up Time. VOUT = 1.8V 20057608 20057627 Turn-Off Time. VOUT = 1.8V Load Transient Response. VOUt = 1.8V 20057615 20057616 www.national.com 6 LP3983 Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN = VOUT(nom) + 1.0V, TA = 25˚C, Enable pin is tied to VIN. (Continued) Line Transient Response 20057636 7 www.national.com LP3983 Application Hints POWER DISSIPATION AND DEVICE OPERATION The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air. As stated in note 3 in the electrical specification section, the allowable power dissipation for the device in a given package can be calculated using the equation PD = (TJ - TA)/θJA With a θJA = 255˚C/W, the device in the micro SMD package returns a value of 392mW with a maximum junction temperature of 125˚C and an ambient temperature of 25˚C. The actual power dissipation across the device can be represented by the following equation; PD = (VIN - VOUT) * IOUT This establishes the relationship between the power dissipation allowed due to thermal considerations, the voltage drop across the device, and the continuous current capability of the device. These two equations should be used to determine the optimum operating conditions for the device in the application. EXTERNAL CAPACITORS In common with most low-dropout regulators, the LP3983 requires external capacitors to ensure stable operation. The LP3983 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. INPUT CAPACITOR An input capacitor is required for stability. It is recommended that a 1.0uF capacitor be connected between the LP3983 input pin and ground (this capacitance value may be increased without limit). This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ) 1µF over the entire operating temperature range. OUTPUT CAPACITOR The LP3983 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric types Z5U, Y5V or X7R), recommended value 2.2µF and with ESR between 5mΩ to 500mΩ, is suitable in the LP3983 application circuit. For this device the output capacitor should be connected between the VOUT pin and ground. www.national.com 8 It may also be possible to use tantalum or film capacitors at the output, but these are not as attractive for reasons of size and cost (see the section Capacitor Characteristics). NO-LOAD STABILITY The LP3983 will remain stable and in regulation with no external load. This is specially important in CMOS RAM keep-alive applications. CAPACITOR CHARACTERISTICS The LP3983 is designed to work with ceramic capacitors on the output to take advantage of the benefits they offer. For capacitance values in the range of 1µF to 4.7µF range, ceramic capacitors are the smallest, least expensive and have the lowest ESR values (which makes them best for eliminating high frequency noise). The ESR of a typical 1µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR requirement for stability by the LP3983. The temperature performance of ceramic capacitors varies by type. Larger value ceramic capacitors may be manufactured with Z5U or Y5V temperature characteristics, which results in the capacitance dropping by more than 50% as the temperature goes from 25˚C to 85˚C. A better choice for temperature coefficient in a ceramic capacitor is X7R, which holds the capacitance within ± 15% over the temperature range. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1µF to 4.7µF range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly ) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25˚C down to −40˚C, so some guard band must be allowed. ENABLE OPERATION The LP3983 may be switched ON or OFF by a logic input at the ENABLE pin, VEN. A high voltage at this pin will turn the device on. When the enable pin is low, the regulator output is off and the device typically consumes < 1µA. If the application does not require the shutdown feature, the VEN pin should be tied to VIN to keep the regulator output permanently on. To ensure proper operation, the signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. MICRO SMD MOUNTING The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note (AN-1112). Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be noted that the pad style which must be used with the 5 pin package is NSMD (non-solder mask defined) type. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device. LP3983 Application Hints (Continued) MICRO SMD LIGHT SENSITIVITY Exposing the micro SMD device to direct sunlight may cause mis-operation of the device. Light sources such as Halogen lamps can effect electrical performance if brought near to the device. Light with wavelengths in the red and infra-red part of the spectrum have the most detrimental effect thus the fluores- cent lighting used inside most buildings has very little effect on the output voltage of the device. Tests carried out on a micro SMD test board showed a negligible effect on the regulated output voltage when brought within 1cm of a fluorescent lamp. A deviation of less than 0.1% from nominal output voltage was observed. 9 www.national.com LP3983 Micropower, Low Quiescent Current, CMOS Voltage Regulator in micro SMD Package Physical Dimensions inches (millimeters) unless otherwise noted micro SMD, 5 Bump, Package (TLA05) NS Package Number TLA05ADA The dimensions for X1, X2 and X3 are given as: X1 = 1006 +/− 0.03mm X2 = 1438 +/− 0.03mm X3 = 0.600 +/− 0.075mm LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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