MM54HC163

74HC160 MM54 74HC161 MM54 74HC162 MM54 74HC163 January 1992 MM74HC160 Synchronous Decade Counter with Asynchronous Clear MM54HC161 MM74HC161 Synchronous Binary Counter with Asynchronous Clear MM54HC162 MM74HC162 Synchronous Decade Counter with Synchronous Clear MM54HC163 MM74HC163 Synchronous Binary Counter with Synchronous Clear General Description The MM54HC160 MM74HC160 MM54HC161 MM74HC161 MM54HC162 MM74HC162 and MM54HC163 MM74HC163 synchronous presettable counters utilize advanced silicon-gate CMOS technology and internal look-ahead carry logic for use in high speed counting applications They offer the high noise immunity and low power consumption inherent to CMOS with speeds similar to low power Schottky TTL The ’HC160 and the ’HC162 are 4 bit decade counters and the ’HC161 and the ’HC163 are 4 bit binary counters All flip-flops are clocked simultaneously on the low to high transition (positive edge) of the CLOCK input waveform These counters may be preset using the LOAD input Presetting of all four flip-flops is synchronous to the rising edge of CLOCK When LOAD is held low counting is disabled and the data on the A B C and D inputs is loaded into the counter on the rising edge of CLOCK If the load input is taken high before the positive edge of CLOCK the count operation will be unaffected All of these counters may be cleared by utilizing the CLEAR input The clear function on the MM54HC162 MM74HC162 and MM54HC163 MM74HC163 counters are synchronous to the clock That is the counters are cleared on the positive edge of CLOCK while the clear input is held low The MM54HC160 MM74HC160 and MM54HC161 MM74HC161 counters are cleared asynchronously When the CLEAR is taken low the counter is cleared immediately regardless of the CLOCK Two active high enable inputs (ENP and ENT) and a RIPPLE CARRY (RC) output are provided to enable easy cascading of counters Both ENABLE inputs must be high to count The ENT input also enables the RC output When enabled the RC outputs a positive pulse when the counter overflows This pulse is approximately equal in duration to the high level portion of the QA output The RC output is fed to successive cascaded stages to facilitate easy implementation of N-bit counters All inputs are protected from damage due to static discharge by diodes to VCC and ground Features Y Y Y Y Y Typical operating frequency 40 MHz Typical propagation delay clock to Q 18 ns Low quiescent current 80 mA maximum (74HC Series) Low input current 1 mA maximum Wide power supply range 2 – 6V Connection Diagram Truth Tables ’HC160 HC161 CLK X X X X CLR L H H H H H ENP X H L L X H ENT X L H L X H Load X H H H L H Function Clear Count RC disabled Count disabled Count RC disabled Load Increment Counter u u H e high level L e low level e low to high transition X e don’t care u ’HC162 HC163 CLK CLR L H H H H H ENP X H L L X H ENT X L H L X H Load X H H H L H Function Clear Count RC disabled Count disabled Count RC disabled Load Increment Counter RRD-B30M115 Printed in U S A u TL F 5008 – 1 Order Number MM54HC161 162 163 or MM74HC160 161 162 163 X X X u u C1995 National Semiconductor Corporation TL F 5008 Absolute Maximum Ratings (Notes 1 2) Operating Conditions Supply Voltage (VCC) DC Input or Output Voltage (VIN VOUT) Operating Temp Range (TA) MM74HC MM54HC Input Rise or Fall Times VCC e 2 0V (tr tf) VCC e 4 5V VCC e 6 0V Min 2 0 Max 6 VCC Units V V If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications b 0 5 to a 7 0V Supply Voltage (VCC) b 1 5 to VCC a 1 5V DC Input Voltage (VIN) b 0 5 to VCC a 0 5V DC Output Voltage (VOUT) g 20 mA Clamp Diode Current (IIK IOK) g 25 mA DC Output Current per pin (IOUT) g 50 mA DC VCC or GND Current per pin (ICC) b 65 C to a 150 C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S O Package only 500 mW Lead Temp (TL) (Soldering 10 seconds) 260 C b 40 b 55 a 85 a 125 C C ns ns ns 1000 500 400 DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V VIN e VIH or VIL lIOUTl s20 mA 2 0V 4 5V 6 0V 4 5V 6 0V 2 0V 4 5V 6 0V 4 5V 6 0V 6 0V 6 0V 20 45 60 42 57 0 0 0 02 02 TA e 25 C Typ VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 15 3 15 42 05 1 35 18 19 44 59 3 98 5 48 01 01 01 0 26 0 26 g0 1 74HC TA eb40 to 85 C 54HC TA eb55 to 125 C Units Guaranteed Limits 15 3 15 42 05 1 35 18 19 44 59 3 84 5 34 01 01 01 0 33 0 33 g1 0 15 3 15 42 05 1 35 18 19 44 59 37 52 01 01 01 04 04 g1 0 V V V V V V V V V V V V V V V V mA mA VIL VOH VIN e VIH or VIL lIOUTl s4 0 mA lIOUTl s5 2 mA VOL Maximum Low Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA VIN e VIH or VIL lIOUTl s4 0 mA lIOUTl s5 2 mA IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN e VCC or GND VIN e VCC or GND IOUT e 0 mA 80 80 160 Note 1 Absolute Maximum Ratings are those values beyond which damage to the device may occur Note 2 Unless otherwise specified all voltages are referenced to ground Note 3 Power Dissipation temperature derating plastic ‘‘N’’ package b 12 mW C from 65 C to 85 C ceramic ‘‘J’’ package b 12 mW C from 100 C to 125 C Note 4 For a power supply of 5V g 10% the worst case output voltages (VOH and VOL) occur for HC at 4 5V Thus the 4 5V values should be used when designing with this supply Worst case VIH and VIL occur at VCC e 5 5V and 4 5V respectively (The VIH value at 5 5V is 3 85V ) The worst case leakage current (IIN ICC and IOZ) occur for CMOS at the higher voltage and so the 6 0V values should be used VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89 2 AC Electrical Characteristics VCC e 5V Symbol fMAX tPHL tPLH tPHL tPLH tPHL tPLH tPHL tREM tS tH tW Parameter Maximum Operating Frequency Maximum Propagation Delay Clock to RC Maximum Propagation Delay Clock to Q Maximum Propagation Delay ENT to RC TA e 25 C CL e 15 pF tr e tf e 6 ns Conditions Typ 43 30 29 18 27 10 Guaranteed Limit 30 35 34 32 38 20 30 5 16 Units MHz ns ns ns ns ns ns ns ns Maximum Propagation Delay Clear to Q or RC Minimum Removal Time Clear to Clock Minimum Set Up Time Clear Load Enable or Data to Clock Minimum Hold Time Data from Clock Minimum Pulse Width Clock Clear or Load AC Electrical Characteristics CL e 50 pF Symbol fMAX Parameter Maximum Operating Frequency Maximum Propagation Delay Clock to RC Maximum Propagation Delay Clock to RC Maximum Propagation Delay Clock to Q Maximum Propagation Delay Clock to Q Maximum Propagation Delay ENT to RC Maximum Propagation Delay ENT to RC Maximum Propagation Delay Clear to RC Maximum Propagation Delay Clear to Q Minimum Removal Time Clear to Clock Minimum Setup Time Clear or Data to Clock Minimum Setup Time Load to Clock Minimum Setup Time Enable to Clock Minimum Hold Time Data from Clock Conditions VCC 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V tr e tf e 6 ns (unless otherwise specified) TA e 25 C Typ 10 40 45 100 32 28 88 18 15 95 30 26 85 17 14 90 28 24 80 16 14 100 32 28 100 32 28 5 27 32 215 43 37 175 35 30 205 41 35 170 34 29 195 39 33 160 32 27 220 44 37 210 42 36 125 25 21 150 30 26 135 27 23 175 35 30 50 10 9 3 74HC TA eb40 to 85 C 4 21 25 271 54 46 220 44 37 258 52 44 214 43 36 246 49 42 202 40 34 275 55 47 260 52 45 158 32 27 190 38 32 170 34 29 220 44 37 63 13 11 54HC TA eb55 to 125 C 4 18 21 320 64 54 260 52 44 305 61 52 253 51 43 291 58 49 238 48 41 325 66 55 315 63 54 186 37 32 225 45 38 200 41 35 260 52 44 75 15 13 Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Guaranteed Limits tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL tREM tS tS tS tH AC Electrical Characteristics (Continued) CL e 50 pF Symbol tH Parameter Minimum Hold Time Enable Load or Clear to Clock Minimum Pulse Width Clock Clear or Load Conditions VCC 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V (per package) 90 5 40 8 7 Typ tr e tf e 6 ns (unless otherwise specified) 74HC 54HC TA eb40 to 85 C TA eb55 to 125 C Units Guaranteed Limits 0 0 0 100 20 17 95 19 16 1000 500 400 0 0 0 120 24 20 110 22 19 1000 500 400 ns ns ns ns ns ns ns ns ns ns ns ns pF TA e 25 C 0 0 0 80 16 14 75 15 13 1000 500 400 tW tTLH tTHL Maximum Output Rise and Fall Time tr tf Maximum Input Rise and Fall Time Power Dissipation Capacitance (Note 5) Maximum Input Capacitance CPD CIN 10 10 10 pF Note 5 CPD determines the no load dynamic power consumption PD e CPD VCC2 f a ICC VCC and the no load dynamic current consumption IS e CPD VCC f a ICC Logic Diagrams MM54HC160 MM74HC160 or MM54HC162 MM74HC162 TL F 5008 – 2 MM54HC161 MM74HC161 or MM54HC163 MM74HC163 TL F 5008 – 3 4 Logic Waveforms 160 162 Synchronous Decade Counters Typical Clear Preset Count and Inhibit Sequences Sequence (1) Clear outputs to zero (2) Preset to BCD seven (3) Count to eight nine zero one two and three (4) Inhibit TL F 5008 – 4 161 163 Synchronous Binary Counters Typical Clear Preset Count and Inhibit Sequences Sequence (1) Clear outputs to zero (2) Preset to binary twelve (3) Count to thirteen fourteen fifteen zero one and two (4) Inhibit TL F 5008 – 5 5 74HC160 MM54 74HC161 MM54 74HC162 MM54 74HC163 Physical Dimensions inches (millimeters) Order Number MM54HC160J MM54HC161J MM54HC162J MM54HC163J MM74HC160J MM74HC161J MM74HC162J MM74HC163J NS Package J16A Order Number MM74HC160N MM74HC161N MM74HC162N MM74HC163N NS Package N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications