MM74C941N

MM54C941 MM74C941 Octal Buffers Line Receivers Line Drivers with TRI-STATE Outputs February 1988 MM54C941 MM74C941 Octal Buffers Line Receivers Line Drivers with TRI-STATE Outputs General Description These octal buffers and line drivers are monolithic complementary MOS (CMOS) integrated circuits with TRI-STATE outputs These outputs have been specially designed to drive highly capacitive loads such as bus-oriented systems These devices have a fan-out of 6 low power Schottky loads When VCC e 5V inputs can accept true TTL high and low logic levels Features Y Y Y Y Y Y Y Y Wide supply voltage range (3V to 15V) Low power consumption TTL compatibility (Improved on the inputs) High capacitive load TRI-STATE outputs Input protection 20-pin dual-in-line package High output drive Connection and Logic Diagrams Dual-In-Line Package TL F 5923 – 1 Top View Order Number MM54C941 or MM74C941 TL F 5923 – 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 5923 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range (TA) MM54C941 MM74C941 0 3V to VCC a 0 3V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range VCC Lead Temperature (TL) (Soldering 10 seconds) b 65 C to a 150 C 700 mW 500 mW 3V to 15V 18V 260 C DC Electrical Characteristics Min Symbol CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) ICC IOZ Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage Logical ‘‘1’’ Input Current Logical ‘‘0’’ Input Current Supply Current TRI-STATE Leakage Parameter Max limits apply across temperature range unless otherwise noted Conditions Min Typ Max Units VCC e 5 0V VCC e 10V VCC e 5 0V VCC e 10V VCC e 5 0V IO e b10mA VCC e 10V IO e b10mA VCC e 5 0V IO e 10 mA VCC e 10V IO e 10 mA VCC e 15V VIN e 15V VCC e 15V VIN e 0V VCC e 15V VCC e 15V VOUT e 0V or 15V 25 80 08 20 45 90 05 10 0 005 b1 0 b 0 005 V V V V V V V V mA mA 300 g 10 10 0 05 mA mA CMOS TTL INTERFACE VIN(1) VIN(0) VOUT(1) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage 54C VCC e 4 5V 74C VCC e 4 75V 54C VCC e 4 5V 74C VCC e 4 75V 54C 74C 54C 74C VCC VCC VCC VCC e e e e VCCb2 5 VCCb2 5 08 08 VCCb0 4 VCCb0 4 24 24 04 04 V V V V V V V V V V 4 5V IO e b450 mA 4 75V IO e b450 mA 4 5V IO e b2 2 mA 4 75V IO e b2 2 mA VOUT(0) Logical ‘‘0’’ Output Voltage 54C VCC e 4 5V IO e 2 2 mA 74C VCC e 4 75V IO e 2 2 mA OUTPUT DRIVE (See 54C 74C Family Characteristics Data Sheet) ISOURCE ISOURCE ISINK ISINK Output Source Current (P-Channel) Output Source Current (P-Channel) Output Sink Current (N-Channel) Output Sink Current (N-Channel) VCC e 5 0V VOUT e 0V TA e 25 C VCC e 10V VOUT e 0V TA e 25 C VCC e 5 0V VOUT e VCC TA e 25 C VCC e 10V VOUT e VCC TA e 25 C b 14 0 b 36 0 b 30 0 b 70 0 mA mA mA mA 12 0 48 0 20 0 70 Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation 2 AC Electrical Characteristics Symbol tpd1 tpd0 Parameter Propagation Delay (Data IN to OUT) TA e 25 C CL e 50 pF unless otherwise specified Conditions VCC VCC VCC VCC e e e e Min Typ 70 35 90 45 100 55 Max 140 70 160 90 200 110 Units ns ns ns ns ns ns 5 0V CL e 50 pF 10V CL e 50 pF 5 0V CL e 150 pF 10V CL e 150 pF tIH tOH Propagation Delay Output Disable to Logic Level (from High Impedance State) (from a Logic Level) Propagation Delay Output Disable to Logic Level (from High Impedance State) Transition Time RL e 1 kX CL e 50 pF VCC e 5 0V VCC e 210V RL e 1 kX CL e 50 pF VCC e 5 0V VCC e 10V VCC VCC VCC VCC e e e e tH1 tH0 100 55 50 30 80 50 100 10 200 110 100 60 160 100 ns ns ns ns ns ns pF pF pF tTHL tTLH 5 0V CL e 50 pF 10V CL e 50 pF 5 0V CL e 150 pF 10V CL e 150 pF CPD Power Dissipation Capacitance (Output Enabled per Buffer) (Output Disabled per Buffer) Input Capacitance (Any Input) (Output Capacitance) (Output Disabled) (Note 3) CIN (Note 2) VIN e 0V f e 1 MHz TA e 25 C VIN e 0V f e 1 MHz TA e 25 C 10 CO 10 pF AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 Capacitance is guaranteed by periodic testing Note 3 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics Application Note AN-90 Truth Table OD1 0 0 0 1 1 1 e High 0 e Low X e Don’t Care Z e TRI-STATE OD2 0 0 1 0 1 Input 0 1 X X X Output 0 1 Z Z Z 3 Typical Performance Characteristics N-Channel Output Drive 25 C P-Channel Output Drive 25 C TL F 5923 – 3 TL F 5923 – 4 Propagation Delay vs Load Capacitance DtPD per pF of Load Capacitance TL F 5923 – 5 TL F 5923 – 6 Typical Application TL F 5923 – 7 4 AC Test Circuits and Switching Time Waveforms tpd0 tpd1 CMOS to CMOS TL F 5923–8 TL F 5923 – 9 t1H and tH1 t1H tH1 TL F 5923–10 TL F 5923 – 11 Note VOH is defined as the DC output high voltage when the device is loaded with a 1 kX resistor to ground t0H and tH0 t0H tH0 TL F 5923–12 TL F 5923 – 13 Note Delays measured with input tr tf s 20 ns Note VOL is defined as the DC output low voltage when the device is loaded with a 1 kX resistor to VCC 5 MM54C941 MM74C941 Octal Buffers Line Receivers Line Drivers with TRI-STATE Outputs Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C941J or MM74C941J NS Package Number J20A Molded Dual-In-Line Package (N) Order Number MM54C941N or MM74C941N NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications