NTE74HCT240

NTE74HCT240 & NTE74HCT244 Integrated Circuit TTL − High Speed CMOS, Octal Buffer/Line Driver/Receiver with 3−State Outputs Description: The NTE74HCT240 (Inverting Outputs) and NTE74HCT244 (Non−Inverting Outputs) are 3−STATE buffers in a 20−Lead DIP type package that utilize advanced silicon−gate CMOS technology and are general purpose high speed buffers. They possess high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits achieve speeds comparable to low power Schottky devices, while retaining the low power consumption of CMOS. Both devices are TTL input compatible and have a fanout of 15 LS−TTL equivalent inputs. Each device has two active low enables (1G and 2G), and each enable independently controls 4 buffers. These devices are intended to interface between TTL and NMOS components and standard CMOS devices and are also plug−in replacements for LS−TTL devices and can be used to reduce power consumption in existing designs. All inputs are protected from damage due to static discharge by diodes to VCC and GND. Features: D TTL Input Compatible D Typical Propagation Delay: 14ns D 3−STATE Outputs for Connection to System Buses D Low Quiescent Current: 80μA D High Output rive Current: 6mA (min) Absolute Maximum Ratings: (Note 1, Note 2) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to +7.0V DC Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.5 to VCC +1.5V DC Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 to VCC + 0.5V Clamp Diode Current, IIK, IOK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA DC Output Current (Per Pin), IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35mA DC VCC or GND Current (Per Pin), ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70mA Power Dissipation (Note 3), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600mW Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Lead Temperature (During Soldering, 10sec), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +260°C Note 1. Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2. Unless otherwise specified, all voltages are referenced to GND. Note 3. Power Dissipation temperature derating: 12mW/°C from +65°C to +85°C. Recommended Operating Conditions: Parameter Symbol Min Typ Max Unit VCC 4.5 − 5.5 V VIN, VOUT 0 − VCC V Operating Temperature Range TA −40 − +85 °C Input Rise or Fall Times tr, tf − − 500 ns Supply Voltage DC Input or Output Voltage DC Electrical Characteristics: (VCC = 5V ±10% unless otherwise specified) TA = +25°C Typ Guaranteed Limits Parameter Symbol Minimum High Level Input Voltage VIH − 2.0 2.0 V Maximum Low Level Input Voltage VIL − 0.8 0.8 V Minimum High Level Output Voltage Maximum Low Level Output Voltage VOH VOL Test Conditions TA = −40° to +85°C VIN = VIH or VIL VIN = VIH −0.1 |IOUT| = 20μA VCC VCC |IOUT| = 6.0mA, VCC = 4.5V 4.2 3.98 3.84 V |IOUT| = 7.2mA, VCC = 5.5V 5.7 4.98 4.84 V 0 0.1 0.1 V |IOUT| = 6.0mA, VCC = 4.5V 0.2 0.26 0.33 V |IOUT| = 7.2mA, VCC = 5.5V 0.2 0.26 0.33 V |IOUT| = 20μA VCC −0.1 Unit V Maximum Input Current IIN VIN = VCC or GND, VIH or VIL − ±0.05 ±0.5 μA Maximum 3−STATE Output Leakage Current IOZ VOUT = VCC or GND, G = VIH, G = VIL − ±0.25 ±2.5 μA Maximum Quiescent Supply Current ICC VIN = VCC or GND, IOUT = 0μA − 4.0 40 μA 0.6 1.0 1.3 mA VIN = 2.4V or 0.5V, Note 4 Note 4. This is measured per input with all other inputs held at VCC or GND. AC Electrical Characteristics: (VCC = 5V, tr = tf = 6ns, TA = +25°C unless otherwise specified) Parameter Symbol Test Conditions Typ Guaranteed Limits Unit Maximum Output Propagation Delay tPHL, tPLH CL = 45pF 14 18 ns Maximum Output Enable Time tPZL, tPZH CL = 45pF, RL = 1kΩ 20 30 ns Maximum Output Disable Time tPLZ, tPHZ CL = 5pF, RL = 1kΩ 16 25 ns AC Electrical Characteristics: (VCC = 5V ±10%, tr = tf = 6ns unless otherwise specified) TA = +25°C Parameter Maximum Output Propagation Delay TA = −40° to +85°C Symbol Test Conditions tPHL, tPLH CL = 50pF Typ Guaranteed Limits 14 20 25 Unit ns CL = 150pF 20 28 35 ns CL = 50pF 21 30 38 ns CL = 150pF Maximum Output Enable Time tPZH, tPZL RL = 1kΩ 26 42 53 ns Maximum Output Disable Time tPHZ, tPLZ RL = 1kΩ, CL = 50pF 16 25 32 ns Maximum Output Rise and Fall Time tTHL, tTLH CL = 50pF 6 12 15 ns 10 15 15 pF Maximum Input Capacitance CIN Maximum Output Capacitance COUT Power Dissipation Capacitance (Per Buffer, Note 5) CPD 15 20 20 pF G = VCC, G = GND 5 − − pF G = GND, G = VCC 90 − − pF Note 5. CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. Truth Tables: NTE74HCT240: 1G L L H H 1A L H L H 1Y H L Z Z 2G L L H H 2A L H L H 2Y H L Z Z 2A L H L H 2Y L H Z Z H = HIGH Level L = LOW Level Z = High Impedance NTE74HCT244: 1G L L H H 1A L H L H 1Y L H Z Z 2G L L H H H = HIGH Level L = LOW Level Z = High Impedance Pin Connection Diagram 1G 1 1 A1 2 1 Y4 3 20 VCC 1 A2 4 17 2 A4 2 Y3 5 16 1 Y2 1 A3 6 15 2 A3 2 Y2 7 14 1 Y3 1 A4 8 13 2 A2 2 Y1 9 12 1 Y4 GND 10 11 2 A1 19 2G 18 1 Y1 20 11 1 10 .300 (7.62) .260 (6.6) Max 1.200 (30.5) Max .200 (5.08) Max .012 (0.30) .100 (2.54) Typ .100 (2.54) Min .350 (8.89)