74AUP2G79DC-Q100125

74AUP2G79-Q100 Low-power dual D-type flip-flop; positive-edge trigger Rev. 3 — 3 December 2020 Product data sheet 1. General description The 74AUP2G79-Q100 provides the dual positive-edge triggered D-type flip-flop. Information on the data input (nD) is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP). The nD input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) ESD protection: • MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V • HBM JESD22-A114F Class 3A. Exceeds 5000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 3. Ordering information Table 1. Ordering information Type number Package 74AUP2G79DC-Q100 Temperature range Name Description Version -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 4. Marking Table 2. Marking codes Type number Marking code[1] 74AUP2G79DC-Q100 p79 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1D 1CP 2D 2CP 1Q D CP 2Q D CP 001aah812 001aah811 Fig. 1. Logic symbol Fig. 2. CP IEC logic symbol C C D C C TG TG C Fig. 3. C C Q C TG TG C C mna442 Logic diagram (one flip-flop) 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 2 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 6. Pinning information 6.1. Pinning 74AUP2G79 1CP 1 8 VCC 1D 2 7 1Q 2Q 3 6 2D GND 4 5 2CP 001aaf268 Fig. 4. Pin configuration SOT765-1 (VSSOP8) 6.2. Pin description Table 3. Pin description Symbol Pin Description 1CP, 2CP 1, 5 clock pulse input 1D, 2D 2, 6 data input GND 4 ground (0 V) 1Q, 2Q 7, 3 data output VCC 8 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care; q = lower case letter indicates the state of referenced input, one set-up time prior to the LOW-to-HIGH CP transition. Output Input nCP nD nQ ↑ L L ↑ H H L X q 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 3 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +4.6 V -50 - -0.5 +4.6 -50 - -0.5 +4.6 V - ±20 mA 50 mA VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO < 0 V VO output voltage Active mode and Power-down mode IO output current VO = 0 V to VCC ICC supply current - IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW Min Max Unit 0.8 3.6 V 0 3.6 V Active mode 0 VCC V Power-down mode; VCC = 0 V 0 3.6 V -40 +125 °C 0 200 ns/V [1] [2] VI < 0 V [1] Tamb = -40 °C to +125 °C [1] [2] mA V mA The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT765-1 (VSSOP8) package: Ptot derates linearly with 4.9 mW/K above 99 °C. 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate 74AUP2G79_Q100 Product data sheet Conditions VCC = 0.8 V to 3.6 V All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 4 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.70VCC - - V VCC = 0.9 V to 1.95 V 0.65VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30VCC V VCC = 0.9 V to 1.95 V - - 0.35VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.75VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.11 - - V IO = -1.9 mA; VCC = 1.65 V 1.32 - - V IO = -2.3 mA; VCC = 2.3 V 2.05 - - V IO = -3.1 mA; VCC = 2.3 V 1.9 - - V IO = -2.7 mA; VCC = 3.0 V 2.72 - - V IO = -4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V Tamb = 25 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 μA ΔICC additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 40 μA CI input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 0.6 - pF CO output capacitance VO = GND; VCC = 0 V - 1.3 - pF 74AUP2G79_Q100 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 5 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.70VCC - - V VCC = 0.9 V to 1.95 V 0.65VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30VCC V VCC = 0.9 V to 1.95 V - - 0.35VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.7VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.03 - - V IO = -1.9 mA; VCC = 1.65 V 1.30 - - V IO = -2.3 mA; VCC = 2.3 V 1.97 - - V IO = -3.1 mA; VCC = 2.3 V 1.85 - - V IO = -2.7 mA; VCC = 3.0 V 2.67 - - V IO = -4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.37 V IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V Tamb = -40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 0.8 V to 3.6 V VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.6 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 μA ΔICC additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 50 μA 74AUP2G79_Q100 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 6 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.75VCC - - V VCC = 0.9 V to 1.95 V 0.70VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.25VCC V VCC = 0.9 V to 1.95 V - - 0.30VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V VCC - 0.11 - - V IO = -1.1 mA; VCC = 1.1 V 0.6VCC - - V IO = -1.7 mA; VCC = 1.4 V 0.93 - - V IO = -1.9 mA; VCC = 1.65 V 1.17 - - V IO = -2.3 mA; VCC = 2.3 V 1.77 - - V IO = -3.1 mA; VCC = 2.3 V 1.67 - - V IO = -2.7 mA; VCC = 3.0 V 2.40 - - V IO = -4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - IO = 1.7 mA; VCC = 1.4 V - - 0.41 V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V IO = 4.0 mA; VCC = 3.0 V - - 0.50 V Tamb = -40 °C to +125 °C VIH HIGH-level input voltage VIL LOW-level input voltage VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 0.8 V to 3.6 V VI =VIH or VIL 0.33VCC V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 μA ΔICC additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V - - 75 μA [1] [1] One input at VCC - 0.6 V, other input at VCC or GND. 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 7 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7. Symbol Parameter Conditions Tamb = 25 °C Tamb = Tamb = Unit -40 °C to +85 °C -40 °C to +125 °C Min Typ[1] Max Min Max Min Max - 19.7 - - - - - ns VCC = 1.1 V to 1.3 V 2.6 5.5 11.0 2.4 12.9 2.4 14.2 ns VCC = 1.4 V to 1.6 V 2.0 3.8 7.0 1.8 8.1 1.8 9.0 ns VCC = 1.65 V to 1.95 V 1.7 3.1 5.4 1.5 6.4 1.5 7.1 ns VCC = 2.3 V to 2.7 V 1.4 2.3 4.0 1.1 4.7 1.1 5.2 ns VCC = 3.0 V to 3.6 V 1.2 2.0 3.4 0.9 4.0 0.9 4.4 ns VCC = 0.8 V - 53 - - - - - MHz VCC = 1.1 V to 1.3 V - 203 - 170 - 170 - MHz VCC = 1.4 V to 1.6 V - 347 - 310 - 300 - MHz VCC = 1.65 V to 1.95 V - 435 - 400 - 390 - MHz VCC = 2.3 V to 2.7 V - 550 - 490 - 480 - MHz VCC = 3.0 V to 3.6 V - 619 - 550 - 510 - MHz - 23.1 - - - - - ns VCC = 1.1 V to 1.3 V 3.1 6.3 12.3 2.8 14.4 2.8 15.9 ns VCC = 1.4 V to 1.6 V 2.5 4.4 8.1 2.2 9.5 2.2 10.5 ns VCC = 1.65 V to 1.95 V 2.1 3.6 6.3 1.9 7.5 1.9 8.3 ns VCC = 2.3 V to 2.7 V 1.8 2.8 4.7 1.5 5.6 1.5 6.2 ns VCC = 3.0 V to 3.6 V 1.7 2.5 4.1 1.3 4.5 1.3 5.0 ns VCC = 0.8 V - 52 - - - - - MHz VCC = 1.1 V to 1.3 V - 192 - 150 - 150 - MHz VCC = 1.4 V to 1.6 V - 324 - 280 - 230 - MHz VCC = 1.65 V to 1.95 V - 421 - 310 - 250 - MHz VCC = 2.3 V to 2.7 V - 486 - 370 - 360 - MHz VCC = 3.0 V to 3.6 V - 550 - 410 - 360 - MHz - 26.6 - - - - - ns VCC = 1.1 V to 1.3 V 3.5 7.1 13.6 3.2 15.6 3.2 17.2 ns VCC = 1.4 V to 1.6 V 2.8 5.0 9.2 2.5 10.7 2.5 11.8 ns VCC = 1.65 V to 1.95 V 2.4 4.1 7.1 2.2 8.5 2.2 9.4 ns VCC = 2.3 V to 2.7 V 2.2 3.2 5.4 1.9 6.3 1.9 7.0 ns VCC = 3.0 V to 3.6 V 2.0 2.9 4.5 1.6 5.0 1.6 5.5 ns CL = 5 pF tpd fmax propagation nCP to nQ; see Fig. 5 delay VCC = 0.8 V maximum frequency [2] nCP; see Fig. 6 CL = 10 pF tpd fmax propagation nCP to nQ; see Fig. 5 delay VCC = 0.8 V maximum frequency [2] nCP; see Fig. 6 CL = 15 pF tpd propagation nCP to nQ; see Fig. 5 delay VCC = 0.8 V 74AUP2G79_Q100 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 8 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger Symbol Parameter fmax maximum frequency Conditions Tamb = 25 °C Tamb = Tamb = Unit -40 °C to +85 °C -40 °C to +125 °C Min Typ[1] Max Min Max Min Max VCC = 0.8 V - 50 - - - - - MHz VCC = 1.1 V to 1.3 V - 181 - 120 - 120 - MHz VCC = 1.4 V to 1.6 V - 301 - 190 - 160 - MHz VCC = 1.65 V to 1.95 V - 407 - 240 - 190 - MHz VCC = 2.3 V to 2.7 V - 422 - 300 - 270 - MHz VCC = 3.0 V to 3.6 V - 481 - 320 - 300 - MHz - 36.8 - - - - - ns VCC = 1.1 V to 1.3 V 4.7 9.3 17.3 4.2 23.3 4.2 25.6 ns VCC = 1.4 V to 1.6 V 3.8 6.4 11.8 3.3 14.3 3.3 15.7 ns VCC = 1.65 V to 1.95 V 3.3 5.3 9.4 3.0 11.3 3.0 12.4 ns VCC = 2.3 V to 2.7 V 3.0 4.3 7.0 2.7 8.5 2.7 9.4 ns VCC = 3.0 V to 3.6 V 2.8 3.9 5.8 2.6 7.2 2.6 7.9 ns VCC = 0.8 V - 28 - - - - - MHz VCC = 1.1 V to 1.3 V - 128 - 70 - 70 - MHz VCC = 1.4 V to 1.6 V - 206 - 120 - 110 - MHz VCC = 1.65 V to 1.95 V - 262 - 150 - 120 - MHz VCC = 2.3 V to 2.7 V - 269 - 190 - 170 - MHz VCC = 3.0 V to 3.6 V - 309 - 200 - 190 - MHz VCC = 0.8 V - 3.4 - - - - - ns VCC = 1.1 V to 1.3 V - 0.8 - 1.5 - 1.5 - ns VCC = 1.4 V to 1.6 V - 0.5 - 1.0 - 1.0 - ns VCC = 1.65 V to 1.95 V - 0.5 - 0.9 - 0.9 - ns VCC = 2.3 V to 2.7 V - 0.4 - 0.7 - 0.7 - ns VCC = 3.0 V to 3.6 V - 0.4 - 0.6 - 0.6 - ns VCC = 0.8 V - 3.0 - - - - - ns VCC = 1.1 V to 1.3 V - 0.9 - 1.6 - 1.6 - ns VCC = 1.4 V to 1.6 V - 0.6 - 1.0 - 1.0 - ns VCC = 1.65 V to 1.95 V - 0.5 - 0.9 - 0.9 - ns VCC = 2.3 V to 2.7 V - 0.5 - 0.9 - 0.9 - ns VCC = 3.0 V to 3.6 V - 0.7 - 1.0 - 1.0 - ns nCP; see Fig. 6 CL = 30 pF tpd fmax propagation nCP to nQ; see Fig. 5 delay VCC = 0.8 V maximum frequency [2] nCP; see Fig. 6 CL = 5 pF, 10 pF, 15 pF and 30 pF tsu set-up time HIGH; nD to nCP; see Fig. 6 LOW; nD to nCP; see Fig. 6 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 9 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger Symbol Parameter th tW CPD [1] [2] [3] hold time Conditions Tamb = 25 °C Tamb = Tamb = Unit -40 °C to +85 °C -40 °C to +125 °C Min Typ[1] Max Min Max Min Max VCC = 0.8 V - -1.9 - - - - - ns VCC = 1.1 V to 1.3 V - -0.6 - 0 - 0 - ns VCC = 1.4 V to 1.6 V - -0.4 - 0 - 0 - ns VCC = 1.65 V to 1.95 V - -0.4 - 0 - 0 - ns VCC = 2.3 V to 2.7 V - -0.4 - 0 - 0 - ns VCC = 3.0 V to 3.6 V - -0.3 - 0 - 0 - ns VCC = 0.8 V - 5.6 - - - - - ns VCC = 1.1 V to 1.3 V - 2.4 - 3.5 - 3.5 - ns VCC = 1.4 V to 1.6 V - 1.3 - 2.0 - 2.0 - ns VCC = 1.65 V to 1.95 V - 0.9 - 1.9 - 1.9 - ns VCC = 2.3 V to 2.7 V - 0.7 - 2.0 - 2.0 - ns VCC = 3.0 V to 3.6 V - 0.6 - 2.2 - 2.2 - ns - 1.6 - - - - - pF - 1.7 - - - - - pF VCC = 1.4 V to 1.6 V - 1.8 - - - - - pF VCC = 1.65 V to 1.95 V - 1.9 - - - - - pF VCC = 2.3 V to 2.7 V - 2.3 - - - - - pF VCC = 3.0 V to 3.6 V - 2.7 - - - - - pF nD to nCP; see Fig. 6 pulse width HIGH or LOW; nCP; see Fig. 6 f = 1 MHz; VI = GND to VCC [3] power dissipation VCC = 0.8 V capacitance VCC = 1.1 V to 1.3 V All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 10 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 11.1. Waveforms and test circuit VI nD input GND VI nCP input VM VM GND tPHL tPLH VM VM VOH nQ output VOL 001aaf271 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The clock input (nCP) to output (nQ) propagation delays VI VM nD input GND th th tsu tsu 1/fmax VI VM nCP input GND tW tPHL tPLH VOH VM nQ output VOL 001aaf272 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig. 6. The clock input (nCP) to output (nQ) propagation delays, nCP clock pulse width, nD to nCP set-up times, nCP to nD hold times and the nCP maximum frequency Table 9. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5 × VCC 0.5 × VCC VCC ≤ 3.0 ns 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 11 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger VCC G VI DUT VEXT 5 kΩ VO RT CL RL 001aac521 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 10. Test data Supply voltage Load VEXT VCC CL RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ open GND 2 × VCC [1] For measuring enable and disable times RL = 5 kΩ. For measuring propagation delays, set-up and hold times and pulse width RL = 1 MΩ. 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 12 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 12. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 Fig. 8. References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Package outline SOT765-1 (VSSOP8) 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 13 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger 13. Abbreviations Table 11. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP2G79_Q100 v.3 20201203 Product data sheet - Modifications: • 74AUP2G79_Q100 v.2 20190327 Modifications: • • • 74AUP2G79_Q100 v.1 74AUP2G79_Q100 Product data sheet 74AUP2G79_Q100 v.2 Table 5: Derating values for Ptot total power dissipation have been updated. Product data sheet - 74AUP2G79_Q100 v.1 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Package outline drawing SOT765-1 (VSSOP8) updated. 20130611 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 - © Nexperia B.V. 2020. All rights reserved 14 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 15 / 16 74AUP2G79-Q100 Nexperia Low-power dual D-type flip-flop; positive-edge trigger Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................8 11.1. Waveforms and test circuit.......................................11 12. Package outline........................................................ 13 13. Abbreviations............................................................ 14 14. Revision history........................................................14 15. Legal information......................................................15 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 3 December 2020 74AUP2G79_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 3 December 2020 © Nexperia B.V. 2020. All rights reserved 16 / 16