74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
Rev. 2 — 26 November 2010 Product data sheet
1. General description
The 74CBTLV3257 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with common select (S) and output enable (OE) inputs. The low ON resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. When pin OE = LOW, one of the two switches is selected (low-impedance ON-state) with pin S. When pin OE = HIGH, all switches are in the high-impedance OFF-state, independent of pin S. Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V. To ensure the high-impedance OFF-state during power-up or power-down, OE should be tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V High noise immunity Complies with JEDEC standard: JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM AEC-Q100-011 revision B exceeds 1000 V 5 switch connection between two ports Rail to rail switching on data I/O ports CMOS low power consumption Latch-up performance exceeds 250 mA per JESD78B Class I level A IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from 40 C to +85 C and 40 C to +125 C
NXP Semiconductors
74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74CBTLV3257D 74CBTLV3257DS 74CBTLV3257PW 74CBTLV3257BQ 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C SO16 SSOP16[1] TSSOP16 Description plastic small outline package; 16 leads; body width 3.9 mm plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm Version SOT109-1 SOT519-1 SOT403-1 SOT763-1 Type number
DHVQFN16 plastic dual-in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm
[1]
Also known as QSOP16.
4. Functional diagram
4 2
1A
1B1
3
1B2
2A
7
5
2B1
6
2B2
3A
9
11
3B1
10
3B2
4A
12
14
4B1
13
4B2
S
1
OE
15
001aal213
Fig 1.
Logic diagram
74CBTLV3257
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Product data sheet
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
5. Pinning information
5.1 Pinning
74CBTLV3257
S 1B1 1B2 1A 2B1 2B2 2A GND 1 2 3 4 5 6 7 8
001aal214
74CBTLV3257
16 VCC 15 OE 14 4B1 13 4B2 12 4A 11 3B1 10 3B2 9 3A S 1B1 1B2 1A 2B1 2B2 2A GND 1 2 3 4 5 6 7 8
001aal215
terminal 1 index area
74CBTLV3257
16 VCC 15 OE 14 4B1 13 4B2 12 4A 11 3B1 10 3B2 9 3A
1B1 1B2 1A 2B1 2B2 2A
2 3 4 5 6 7 8 GND 3A 9 GND(1)
16 VCC 15 OE 14 4B1 13 4B2 12 4A 11 3B1 10 3B2
1
S
001aal216
Transparent top view
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND.
Fig 2.
Pin configuration SOT109-1 (SO16) and SOT519-1 (SSOP16)
Fig 3.
Pin configuration SOT403-1 (TSSOP16)
Fig 4.
Pin configuration SOT763-1 (DHVQFN16)
5.2 Pin description
Table 2. Symbol S 1B1 to 4B1 1B2 to 4B2 1A to 4A GND OE VCC Pin description Pin 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 8 15 16 Description select input B1 input/output B2 input/output A input/output ground (0 V) output enable input (active LOW) supply voltage
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
6. Functional description
Table 3. Inputs OE L L H
[1]
Function table[1] Function switch S L H X nA = nB1 nA = nB2 disconnect nA and nBn
H = HIGH voltage level; L = LOW voltage level.
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VSW IIK ISK ISW ICC IGND Tstg Ptot
[1] [2] [3]
Parameter supply voltage input voltage switch voltage input clamping current switch clamping current switch current supply current ground current storage temperature total power dissipation
Conditions control inputs enable and disable mode VI < 0.5 V VI < 0.5 V or VI > VCC + 0.5 V VSW = 0 V to VCC
[1] [2]
Min 0.5 0.5 0.5 50 100 65
Max +4.6 +4.6 VCC + 0.5 50 128 +100 +150 500
Unit V V V mA mA mA mA mA C mW
Tamb = 40 C to +125 C
[3]
-
The minimum input voltage rating may be exceeded if the input clamping current ratings are observed. The switch voltage ratings may be exceeded if switch clamping current ratings are observed For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5. Symbol VCC VI VSW Tamb t/V
[1]
Recommended operating conditions Parameter supply voltage input voltage switch voltage ambient temperature input transition rise and fall rate VCC = 2.3 V to 3.6 V
[1]
Conditions
Min 2.3 0
Max 3.6 3.6 VCC +125 200
Unit V V V C ns/V
enable and disable mode
0 40 0
Applies to control signal levels.
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
9. Static characteristics
Table 6. Static characteristics At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL II IS(OFF) IS(ON) IOFF ICC HIGH-level input voltage Conditions VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 40 C to +85 C Min 1.7 2.0 Typ[1] Max 0.7 0.9 1 1 1 10 10 Tamb = 40 C to +125 C Unit Min 1.7 2.0 Max 0.7 0.9 20 20 20 50 50 V V V V A A A A A
LOW-level input VCC = 2.3 V to 2.7 V voltage VCC = 3.0 V to 3.6 V input leakage current pin OE, S; VI = GND to VCC; VCC = 3.6 V
OFF-state VCC = 3.6 V; see Figure 5 leakage current ON-state VCC = 3.6 V; see Figure 6 leakage current power-off VI or VO = 0 V to 3.6 V; leakage current VCC = 0 V supply current VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V pin OE, S; VI = VCC 0.6 V; VSW = GND or VCC; VCC = 3.6 V pin OE, S; VCC = 3.3 V; VI = 0 V to 3.3 V VCC = 3.3 V; VI = 0 V to 3.3 V VCC = 3.3 V; VI = 0 V to 3.3 V
[2]
ICC
additional supply current input capacitance OFF-state capacitance ON-state capacitance
-
-
300
-
2000
A
CI CS(OFF) CS(ON)
-
0.9 5.2 14.3
-
-
-
pF pF pF
[1] [2]
All typical values are measured at Tamb = 25 C. One input at 3 V, other inputs at VCC or GND.
9.1 Test circuits
VCC VIH
Is
VCC VIL
Is Is
nOE nBn GND nA
nOE nA GND nBn
VO
A
Vl
A
VO Vl
A
001aai101
001aai103
VI = VCC or GND and VO = GND or VCC.
VI = VCC or GND and VO = open circuit.
Fig 5.
Test circuit for measuring OFF-state leakage current (one switch)
Fig 6.
Test circuit for measuring ON-state leakage current (one switch)
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
9.2 ON resistance
Table 7. Resistance RON At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter RON Conditions
[2]
Tamb = 40 C to +85 C Min Typ[1] Max
Tamb = 40 C to +125 C Min Max
Unit
ON resistance VCC = 2.3 V to 2.7 V; see Figure 8 to Figure 10 ISW = 64 mA; VI = 0 V ISW = 24 mA; VI = 0 V ISW = 15 mA; VI = 1.7 V VCC = 3.0 V to 3.6 V; see Figure 11 to Figure 13 ISW = 64 mA; VI = 0 V ISW = 24 mA; VI = 0 V ISW = 15 mA; VI = 2.4 V
-
4.2 4.2 8.4
8.0 8.0 40.0
-
15.0 15.0 60.0
-
4.0 4.0 6.2
7.0 7.0 15.0
-
11.0 11.0 25.5
[1] [2]
Typical values are measured at Tamb = 25 C and nominal VCC. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
9.3 ON resistance test circuit and graphs
11 RON (Ω) 9
VSW
001aai109
V VCC VIL nOE
7
(1)
5 nA
Vl
(2) (3)
nBn GND
ISW
(4)
3 0
001aai104
0.5
1.0
1.5
2.0 VI (V)
2.5
RON = VSW / ISW.
(1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C.
Fig 7.
Test circuit for measuring ON resistance (one switch)
Fig 8.
ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 15 mA
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
11 RON (Ω) 9
001aai110
11 RON (Ω) 9
001aai111
7
7
(1)
(1)
5
(2) (3) (4)
5
(2) (3) (4)
3 0 0.5 1.0 1.5 2.0 VI (V) 2.5
3 0 0.5 1.0 1.5 2.0 VI (V) 2.5
(1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C.
(1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C.
Fig 9.
ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 24 mA
Fig 10. ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 64 mA
8 RON (Ω) 6
(1) (2)
001aai105
8 RON (Ω) 6
(1) (2)
001aai106
4
(3) (4)
4
(3) (4)
2 0 1 2 3 VI (V) 4
2 0 1 2 3 VI (V) 4
(1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C.
(1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C.
Fig 11. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 15 mA
Fig 12. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 24 mA
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
7.5 RON (Ω) 6.5
001aai107
5.5
(1) (2)
4.5
(3)
3.5
(4)
2.5 0 1 2 3 VI (V) 4
(1) Tamb = 125 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (4) Tamb = 40 C.
Fig 13. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
10. Dynamic characteristics
Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure 16 Symbol Parameter tpd Conditions
[2][3]
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ[1] Max Min Max
propagation delay nA to nBn or nBn to nA; see Figure 14 VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V S to nA; see Figure 14 VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V
[3]
3.8 3.2
0.15 0.15 6.1 5.3
1.0 1.0
0.25 0.25 6.7 5.8
ns ns ns ns
1.0 1.0
[4]
ten
enable time
OE to nA or nBn; see Figure 15 VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V S to nBn; see Figure 15 VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V
1.0 1.0 1.0 1.0
[5]
2.2 2.0 3.5 3.0
5.6 5.0 6.1 5.3
1.0 1.0 1.0 1.0
6.2 5.5 6.7 5.8
ns ns ns ns
tdis
disable time
OE to nA or nBn; see Figure 15 VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V S to nBn; see Figure 15 VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V
1.0 1.0 1.0 1.0
2.6 3.1 2.6 3.2
5.5 5.5 4.8 4.5
1.0 1.0 1.0 1.0
6.1 6.1 5.3 5.0
ns ns ns ns
[1] [2] [3] [4] [5]
All typical values are measured at Tamb = 25 C and at nominal VCC. The propagation delay is the calculated RC time constant of the on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ.
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
11. Waveforms
VI input 0V tPHL VOH output VOL VM VM
001aai367
VM
VM
tPLH
Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 14. The data input (nA or nBn) to output (nBn or nA) propagation delays Table 9. VCC 2.3 V to 2.7 V 3.0 V to 3.6 V Measurement points Input VM 0.5VCC 0.5VCC VI VCC VCC tr = tf 2.0 ns 2.0 ns Output VM 0.5VCC 0.5VCC VX VOL + 0.15 V VOL + 0.3 V VY VOH 0.15 V VOH 0.3 V
Supply voltage
VI OE, S input GND tPLZ VCC output LOW-to-OFF OFF-to-LOW VOL tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND switch enabled switch disabled switch enabled
001aal217
VM
VM
tPZL
VM VX tPZH VY VM
Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 15. Enable and disable times
74CBTLV3257
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
VI negative pulse 0V
tW 90 % VM 10 % tf tr tr tf 90 % VM 10 % tW
VEXT VCC VI VO
RL
VM
VI positive pulse 0V
VM
G
RT
DUT
CL RL
001aae331
Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.
Fig 16. Test circuit for measuring switching times Table 10. VCC 2.3 V to 2.7 V 3.0 V to 3.6 V Test data Load CL 30 pF 50 pF RL 500 500 VEXT tPLH, tPHL open open tPZH, tPHZ GND GND tPZL, tPLZ 2VCC 2VCC
Supply voltage
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74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
D
E
A X
c y HE vMA
Z
16 9
Q A2 A1 pin 1 index θ Lp
1 8
(A 3)
A
L wM detail X
e
bp
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 8o o 0
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.39 0.014 0.0075 0.38
0.244 0.041 0.228
0.028 0.004 0.012
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 17. Package outline SOT109-1 (SO16)
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Quad 1-of-2 multiplexer/demultiplexer
SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm
SOT519-1
D
E
A
X
c y HE vM A
Z
16 9
A2 A1 (A 3) θ Lp L
1 8
A
detail X wM
e
bp
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.73 A1 0.25 0.10 A2 1.55 1.40 A3 0.25 bp 0.31 0.20 c 0.25 0.18 D (1) 5.0 4.8 E (1) 4.0 3.8 e 0.635 HE 6.2 5.8 L 1 Lp 0.89 0.41 v 0.2 w 0.18 y 0.09 Z (1) 0.18 0.05 θ 8o o 0
Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT519-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION
ISSUE DATE 99-05-04 03-02-18
Fig 18. Package outline SOT519-1 (SSOP16)
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Quad 1-of-2 multiplexer/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c y HE vMA
Z
16
9
Q A2 pin 1 index A1 θ Lp L (A 3) A
1
e bp
8
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8o o 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
Fig 19. Package outline SOT403-1 (TSSOP16)
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Quad 1-of-2 multiplexer/demultiplexer
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm
D
B
A
A A1 E c
terminal 1 index area
detail X
terminal 1 index area e 2 L
e1 b 7 vMCAB wM C y1 C
C y
1 Eh 16
8 e 9
15 Dh
10 X 2.5 scale 5 mm
0
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.6 3.4 Dh 2.15 1.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT763-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
Fig 20. Package outline SOT763-1 (DHVQFN16)
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13. Abbreviations
Table 11. Acronym CDM CMOS DUT ESD HBM MM Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model
14. Revision history
Table 12. Revision history Release date 20101126 Data sheet status Product data sheet Change notice Supersedes 74CBTLV3257 v.1 Document ID 74CBTLV3257 v.2 Modifications: 74CBTLV3257 v.1
• •
Figure note [1] of Figure 4: changed. Table note [2] of Table 8: “maximum” removed. Product data sheet -
20100112
74CBTLV3257
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15. Legal information
15.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be
74CBTLV3257
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 26 November 2010
17 of 19
NXP Semiconductors
74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
74CBTLV3257
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 26 November 2010
18 of 19
NXP Semiconductors
74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
17. Contents
1 2 3 4 5 5.1 5.2 6 7 8 9 9.1 9.2 9.3 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance test circuit and graphs. . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 November 2010 Document identifier: 74CBTLV3257