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74HC125D,652

74HC125D,652

  • 厂商:

    NXP(恩智浦)

  • 封装:

    SOIC14_150MIL

  • 描述:

    NOW NEXPERIA 74HC125D - BUS DRIV

  • 数据手册
  • 价格&库存
74HC125D,652 数据手册
74HC125; 74HCT125 Quad buffer/line driver; 3-state Rev. 6 — 1 December 2015 Product data sheet 1. General description The 74HC125; 74HCT125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits  Complies with JEDEC standard no. 7A  Input levels:  The 74HC125: CMOS levels  The 74HCT125: TTL levels  ESD protection:  HBM JESD22-A114F exceeds 2000 V  MM JESD22-A115-A exceeds 200 V  Multiple package options  Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74HC125D Package Temperature range Name Description Version 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body SOT402-1 width 4.4 mm 74HCT125D 74HC125DB 74HCT125DB 74HC125PW 74HCT125PW 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 4. Functional diagram  $ <  2(  $  2(   <     (1     $ <    2(  $    <  Q$  Q<  2(  Q2( PQD Fig 1. Logic symbol PQD Fig 2. PQD IEC logic symbol Fig 3. Logic diagram (one buffer) 5. Pinning information 5.1 Pinning +& +&7 2(   9&& $   2( <   $ 2(   < $   2( <   $ *1'   < DDD Fig 4. Pin configuration SO14 and (T)SSOP14 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 1 December 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 2 of 16 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE, 2OE, 3OE, 4OE 1, 4, 10, 13 output enable input (active LOW) 1A, 2A, 3A, 4A 2, 5, 9, 12 data input 1Y, 2Y, 3Y, 4Y 3, 6, 8, 11 data output GND 7 ground (0 V) VCC 14 supply voltage 6. Functional description Table 3. Function table[1] Control Input Output nOE nA nY L H [1] L L H H X Z H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] - 20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) - 35 mA ICC supply current - +70 mA IGND ground current - 70 mA Tstg storage temperature 65 +150 C - 500 mW total power dissipation Ptot Conditions SO14 and (T)SSOP14 packages Min [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. Max Unit For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 1 December 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 3 of 16 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC125 Min Typ 74HCT125 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 74HC125 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 - 5.0 - 10.0 A 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 1 December 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 4 of 16 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ICC supply current CI input capacitance 25 C Conditions VI = VCC or GND; IO = 0 A; VCC = 6.0 V 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - - 8.0 - 80 - 160 A - 3.5 - - - - - pF 74HCT125 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 6 mA 3.98 4.32 - 3.84 - 3.7 - V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND - - 0.5 - 5.0 - 10 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current per input pin; VI = VCC  2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V - 100 360 - 450 - 490 A CI input capacitance - 3.5 - - - - - pF 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 1 December 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 5 of 16 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 30 100 - 125 - 150 ns VCC = 4.5 V - 11 20 - 25 - 30 ns VCC = 5 V; CL = 15 pF - 9 - - - - - ns VCC = 6.0 V - 9 17 - 21 - 26 ns VCC = 2.0 V - 41 125 - 155 - 190 ns VCC = 4.5 V - 15 25 - 31 - 38 ns VCC = 6.0 V - 12 21 - 26 - 32 ns VCC = 2.0 V - 41 125 - 155 - 190 ns VCC = 4.5 V - 15 25 - 31 - 38 ns VCC = 6.0 V - 12 21 - 26 - 32 ns VCC = 2.0 V - 14 60 - 75 - 90 ns VCC = 4.5 V - 5 12 - 15 - 18 ns VCC = 6.0 V - 4 10 - 13 - 15 ns - 22 - - - - - pF 74HC125 tpd ten tdis tt CPD propagation delay enable time nA to nY; see Figure 5 nOE to nY; see Figure 6 disable time nOE to nY; see Figure 6 transition time power dissipation capacitance 74HC_HCT125 Product data sheet [1] [2] [3] [4] nY; see Figure 5 CL = 50 pF; f = 1 MHz; VI = GND to VCC [5] All information provided in this document is subject to legal disclaimers. Rev. 6 — 1 December 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 6 of 16 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 15 25 - 31 - 38 ns - 12 - - - - - ns - 15 28 - 35 - 42 ns 74HCT125 propagation delay tpd [1] nA to nY; see Figure 5 VCC = 4.5 V VCC = 5 V; CL = 15 pF ten enable time tdis disable time nOE to nY; see Figure 6 [2] nOE to nY; see Figure 6 VCC = 4.5 V [3] VCC = 4.5 V tt transition time nY; see Figure 5 [4] CPD power dissipation capacitance CL = 50 pF; f = 1 MHz; VI = GND to VCC  1.5 V [5] [1] - 15 25 - 31 - 38 ns - 5 12 - 15 - 18 ns - 24 - - - - - pF tpd is the same as tPLH and tPHL. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPLZ and tPHZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL  VCC2  fo) = sum of outputs. 11. Waveforms 9, Q$LQSXW 90 90 *1' W3+/ W3/+ 92+  90 Q
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