74LV123

74LV123 Dual retriggerable monostable multivibrator with reset Rev. 05 — 8 November 2007 Product data sheet 1. General description The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which uses three methods to control the output pulse width: 1. The basic pulse time is programmed by the selection of an external resistor (REXT) and capacitor (CEXT). These are normally connected as shown in Figure 9. 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired (see Figure 12). 3. Alternatively, an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering (see Figure 13). Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower input rise and fall times. 2. Features s s s s s s s s Optimized for low-voltage applications: 1.0 V to 5.5 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulses Schmitt-trigger action on all inputs except for the reset input NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 3. Ordering information Table 1. Ordering information Package Temperature range Name 74LV123N 74LV123D 74LV123DB 74LV123PW 74LV123BQ −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C DIP16 SO16 SSOP16 TSSOP16 Description plastic dual in-line package; 16 leads (300 mil) plastic small outline package; 16 leads; body width 3.9 mm Version SOT38-4 SOT109-1 Type number plastic shrink small outline package; 16 leads; body width SOT338-1 5.3 mm plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1 quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm 4. Functional diagram 14 15 CX RCX & 13 1 14 1CEXT 6 2CEXT 15 1REXT/CEXT 7 2REXT/CEXT S Q 1A 1 2A 9 1B 2 2B 10 T Q RD 4 1Q 12 2Q 13 1Q 5 2Q 6 7 2 4 3 R CX RCX & 5 9 10 1RD 3 2RD 11 001aae521 12 11 R 001aae522 Fig 1. Logic symbol Fig 2. IEC logic symbol 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 2 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 14 15 S 1A 1 T 2 Q RD 4 Q 1CEXT 1REXT/CEXT 13 1Q 1Q 1B 1RD 3 6 7 S 2CEXT 2REXT/CEXT 2A 9 T 10 Q 5 2Q Q RD 12 2Q 2B 2RD 11 001aaa610 Fig 3. Functional diagram 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 3 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset nREXT/CEXT VCC Q RD Q VCC CL R CL VCC R R CL A CL CL B R 001aae524 Fig 4. Logic diagram 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 4 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 5. Pinning information 5.1 Pinning 74LV123 terminal 1 index area 16 VCC 15 1REXT/CEXT 14 1CEXT 13 1Q 12 2Q VCC(1) 8 9 2A 11 2RD 10 2B GND 1A 2 3 4 5 6 7 1 1B 16 VCC 15 1REXT/CEXT 14 1CEXT 13 1Q 12 2Q 11 2RD 10 2B 9 001aag678 74LV123 1A 1B 1RD 1Q 2Q 2CEXT 2REXT/CEXT GND 1 2 3 4 5 6 7 8 1RD 1Q 2Q 2CEXT 2REXT/CEXT 2A 001aag650 Transparent top view (1) The die substrate is attached to this pad using conductive die attach material. It cannot be used as a supply pin or input. Fig 5. Pin configuration for DIP16, SO16, SSOP16 and TSSOP16 Fig 6. Pin configuration for DHVQFN16 5.2 Pin description Table 2. Symbol 1A 1B 1RD 1Q 2Q 2CEXT 2REXT/CEXT GND 2A 2B 2RD 2Q 1Q 1CEXT 1REXT/CEXT VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description negative-edge triggered input 1 positive-edge triggered input 1 direct reset LOW and positive-edge triggered input 1 active LOW output 1 active HIGH output 2 external capacitor connection 2 external resistor and capacitor connection 2 ground (0 V) negative-edge triggered input 2 positive-edge triggered input 2 direct reset LOW and positive-edge triggered input 2 active LOW output 2 active HIGH output 1 external capacitor connection 1 external resistor and capacitor connection 1 supply voltage 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 5 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 6. Functional description Table 3. Input nRD L X X H H ↑ [1] Function table[1] Output nA X H X L ↓ L nB X X L ↑ H H nQ L L[2] L[2] nQ H H[2] H[2] H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW transition; = one HIGH level output pulse = one LOW level output pulse [2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed. 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 6 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC IGND Tstg Ptot Parameter supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation Tamb = −40 °C to +125 °C DIP16 package SO16 package SSOP16 package TSSOP16 package DHVQFN16 package [1] [2] [3] [4] [5] [2] [3] [4] [4] [5] Conditions VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V except for pins nREXT/CEXT; VO = −0.5 V to (VCC + 0.5 V) [1] [1] [1] Min −0.5 −65 - Max +7 ±20 ±50 ±25 +50 −50 +150 750 500 500 500 500 Unit V mA mA mA mA mA °C mW mW mW mW mW The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C. For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 °C. 8. Recommended operating conditions Table 5. Symbol VCC VI VO Tamb ∆t/∆V Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate[2] in free air VCC = 1.0 V to 2.0 V VCC = 2.0 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 3.6 V to 5.5 V [1] [2] Conditions [1] Min 1.0 0 0 −40 - Typ 3.3 +25 - Max 5.5 VCC VCC +125 500 200 100 50 Unit V V V °C ns/V ns/V ns/V ns/V The 74LV123 is guaranteed to function down to VCC = 1.0 V (input levels GND or VCC); Section 9 “Static characteristics” are guaranteed from VCC = 1.2 V to VCC = 5.5 V. Except for Schmitt-trigger inputs nA and nB. 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 7 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = −40 °C to +85 °C VIH HIGH-level input voltage VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VOH HIGH-level output voltage VI = VIH or VIL lO = −100 µA; VCC = 1.2 V lO = −100 µA; VCC = 2.0 V lO = −100 µA; VCC = 2.7 V lO = −100 µA; VCC = 3.0 V lO = −100 µA; VCC = 4.5 V lO = −6 mA; VCC = 3.0 V lO = −12 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA; VCC = 1.2 V IO = 100 µA; VCC = 2.0 V IO = 100 µA; VCC = 2.7 V IO = 100 µA; VCC = 3.0 V IO = 100 µA; VCC = 4.5 V IO = 6 mA; VCC = 3.0 V IO = 12 mA; VCC = 4.5 V II ICC ∆ICC CI VIH input leakage current supply current additional supply current input capacitance HIGH-level input voltage VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V VIL LOW-level input voltage VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V to 3.6 V VCC = 4.5 V to 5.5 V 74LV123_5 Conditions Min 0.9 1.4 2.0 0.7 × VCC 1.8 2.5 2.8 4.3 2.40 3.60 0.9 1.4 2.0 0.7 × VCC - Typ[1] Max 1.2 2.0 2.7 3.0 4.5 2.82 4.20 0 0 0 0 0 0.25 0.35 3.5 0.3 0.6 0.8 0.3 × VCC 0.2 0.2 0.2 0.2 0.40 0.55 1.0 20.0 500 0.3 0.6 0.8 0.3 × VCC Unit V V V V V V V V V V V V V V V V V V V V V V µA µA µA pF V V V V V V V V VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC − 0.6 V; VCC = 2.7 V to 3.6 V Tamb = −40 °C to +125 °C © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 8 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH HIGH-level output voltage Conditions VI = VIH or VIL lO = −100 µA; VCC = 1.2 V lO = −100 µA; VCC = 2.0 V lO = −100 µA; VCC = 2.7 V lO = −100 µA; VCC = 3.0 V lO = −100 µA; VCC = 4.5 V lO = −6 mA; VCC = 3.0 V lO = −12 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 100 µA; VCC = 1.2 V IO = 100 µA; VCC = 2.0 V IO = 100 µA; VCC = 2.7 V IO = 100 µA; VCC = 3.0 V IO = 100 µA; VCC = 4.5 V IO = 6 mA; VCC = 3.0 V IO = 12 mA; VCC = 4.5 V II ICC ∆ICC [1] Min 1.8 2.5 2.8 4.3 2.2 3.5 - Typ[1] Max 0.2 0.2 0.2 0.2 0.5 0.65 1.0 160 850 Unit V V V V V V V V V V V V V V µA µA µA input leakage current supply current additional supply current VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC − 0.6 V; VCC = 2.7 V to 3.6 V All typical values are measured at Tamb = 25 °C. 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 9 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; tr = tf ≤ 2.5 ns; for test circuit see Figure 8. Symbol Parameter Conditions −40 °C to +85 °C Min Propagation delay; see Figure 7 tpd propagation delay nRD, nA and nB to nQ VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V nRD to nQ (reset) VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V Inputs nA, nB and nRD; see Figure 7 tW pulse width nA = LOW VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V nB = HIGH VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V nRD = LOW; see Figure 13 VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V trtrig retrigger time nB to nA; see Figure 12 VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V 70 55 45 40 ns ns ns ns 35 30 25 20 6 5 4 3 45 40 30 25 ns ns ns ns 30 25 20 15 13 8 7 5 40 30 25 20 ns ns ns ns 30 25 20 15 5 3.5 3.0 2.5 40 30 25 20 ns ns ns ns [2] [2] −40 °C to +125 °C Unit Min Max Typ[1] Max - 120 40 30 25 18 100 30 23 20 14 76 56 48 40 57 43 38 31 - 92 68 57 46 68 51 45 36 ns ns ns ns ns ns ns ns ns ns 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 10 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Table 7. Dynamic characteristics …continued GND = 0 V; tr = tf ≤ 2.5 ns; for test circuit see Figure 8. Symbol Parameter Conditions −40 °C to +85 °C Min Outputs; nQ = LOW and nQ = HIGH, see Figure 7 tW pulse width CEXT = 100 nF; REXT = 10 kΩ VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CEXT = 0 pF; REXT = 5 kΩ VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V External components REXT external resistance see Figure 11 VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V CEXT external capacitance see Figure 11 VCC = 1.2 V VCC = 2.0 V VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V Dynamic power dissipation CPD power dissipation VCC = 3.3 V; VI = GND to VCC capacitance [5] [3][4] [3] −40 °C to +125 °C Unit Min Max Typ[1] Max - 470 460 450 430 100 90 80 70 - - - ns ns ns ns ns ns ns ns 10 5 3 2 2 - 60 1000 1000 1000 1000 1000 - - - kΩ kΩ kΩ kΩ kΩ pF pF pF pF pF pF [1] [2] [3] [4] [5] All typical values are measured at Tamb = 25 °C and nominal supply values (VCC = 3.3 V and 5.0 V). tpd is the same as tPLH and tPHL; CEXT = 0 pF; REXT = 5 kΩ. For other REXT and CEXT combinations see Figure 11 and Section 12.1.1 “Basic timing”. CEXT has no limits. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 11 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 11. Waveforms nB input (nA LOW) VM tW nA input (nB HIGH) VM tW RESET nRD input tPLH nQ output tPLH VM tW VM tW tPHL tW tPLH nQ output VM tPHL tPHL tPLH tPHL 001aae528 Measurement points are given in Table 8. Fig 7. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) Table 8. VCC ≥ 2.7 V < 2.7 V Measurement points VM 1.5 V 0.5 × VCC VCC PULSE GENERATOR VI DUT RT CL 50 pF RL 1 kΩ VO 001aae533 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to Zo of the pulse generator. Fig 8. Load circuitry for switching times 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 12 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Test data Input VI VCC 2.7 V VCC tr, tf ≤ 2.5 ns ≤ 2.5 ns ≤ 2.5 ns Load CL 50 pF 50 pF 50 pF RL 1 kΩ 1 kΩ 1 kΩ tPHL, tPLH tPHL, tPLH tPHL, tPLH Test Table 9. VCC < 2.7 V Supply voltage 2.7 V to 3.6 V ≥ 4.5 V 12. Application information 12.1 Timing components 12.1.1 Basic timing The basic output pulse width is essentially determined by the values of the external timing components REXT and CEXT. CEXT (1) REXT VCC nCEXT 14 (6) nREXT/CEXT 15 (7) 13 (5) nQ GND 8 74LV123 nA nB 1 (9) 2 (10) 4 (12) nQ 3 (11) nRD 001aae525 (1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND). Fig 9. Timing components connections If CEXT > 10 nF, the following formula is valid: tW = K × REXT × CEXT (typ.) where: tW = output pulse width in ns REXT = external resistor in kΩ CEXT = external capacitor in pF K = constant: this is 0.45 for VCC = 5.0 V and 0.48 for VCC = 2.0 V (see Figure 10) The inherent test jig and pin capacitance at pin 15 and pin 7 (nREXT/CEXT) is approximately 7 pF. 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 13 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 0.8 'K' factor 0.6 001aae529 106 tW (ns) 105 REXT = 100 kΩ 50 kΩ 10 kΩ 2 kΩ 001aae530 104 0.4 103 0.2 102 0 0 2 4 VCC (V) 6 0 1 10 102 103 Cext (pF) 104 CEXT = 10 nF; REXT = 10 kΩ to 100 kΩ VCC = 3.3 V and Tamb = 25 °C Fig 10. Typical ‘K’ factor as a function of VCC Fig 11. Typical output pulse width as a function of the external capacitance values 12.1.2 Retrigger timing The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be extended when the time between the active going edges of the trigger pulses meets the minimum retrigger time. If CEXT > 10 pF, the next formula for the set-up time of a retrigger pulse is valid: at VCC = 5.0 V: trtrig = 30 + 0.19REXT × CEXT0.9 + 13 × REXT1.05 (typ.) at VCC = 3.0 V: trtrig = 41 + 0.15REXT × CEXT0.9 × 1 × REXT (typ.) where: trtrig = retrigger time in ns CEXT = external capacitor in pF REXT = external resistor in kΩ nB input tW nA input trtrig tW nQ output tW tW 001aae526 nRD = HIGH Fig 12. Output pulse control using retrigger pulse nA 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 14 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 12.1.3 Reset timing nB input nRD input nQ output tW tW 001aae527 nA = LOW Fig 13. Output pulse control using reset input nRD 12.2 Power considerations 12.2.1 Power-up When the monostable multivibrator is powered-up, it may produce an output pulse with a pulse width defined by the values of REXT and CEXT. This output pulse can be eliminated using the RC circuit on pin nRD shown in Figure 14. 12.2.2 Power-down A large capacitor (CEXT) may cause problems when powering-down the monostable due to the energy stored in this capacitor. When a system containing this device is powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain damage, due to the capacitor discharging through the input protection diodes. To avoid this possibility, connect a damping diode DEXT (preferably a germanium or Schottky type diode) able to withstand large current surges - see Figure 14. DEXT CEXT REXT VCC GND 8 nCEXT 14 (6) nREXT/CEXT 15 (7) 13 (5) nQ 74LV123 nA nB 1 (9) 2 (10) 4 (12) nQ 3 (11) nRD RESET VCC 001aae532 Fig 14. Power-up and power-down circuit 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 15 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 D seating plane ME A2 A L A1 c Z e b1 b 16 9 b2 MH wM (e 1) pin 1 index E 1 8 0 5 scale 10 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 0.76 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT38-4 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 Fig 15. Package outline SOT38-4 (DIP16) 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 16 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index θ Lp 1 e bp 8 wM L detail X A1 (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT109-1 REFERENCES IEC 076E07 JEDEC MS-012 JEITA EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 10.0 9.8 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 0.039 0.016 Q 0.7 0.6 0.028 0.020 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 θ 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.39 0.014 0.0075 0.38 0.244 0.041 0.228 0.028 0.004 0.012 8 o 0 o ISSUE DATE 99-12-27 03-02-19 Fig 16. Package outline SOT109-1 (SO16) 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 17 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D E A X c y HE vM A Z 16 9 Q A2 A1 pin 1 index Lp L 1 bp 8 wM detail X (A 3) θ A e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.00 0.55 θ 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 17. Package outline SOT338-1 (SSOP16) 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 18 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D E A X c y HE vMA Z 16 9 Q A2 pin 1 index A1 θ Lp L (A 3) A 1 e bp 8 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.40 0.06 θ 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 18. Package outline SOT403-1 (TSSOP16) 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 19 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm D B A A A1 E c terminal 1 index area detail X terminal 1 index area e 2 L e1 b 7 vMCAB wM C y1 C C y 1 Eh 16 8 e 9 15 Dh 10 X 2.5 scale 5 mm 0 DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.6 3.4 Dh 2.15 1.85 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2.5 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT763-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 19. Package outline SOT736-1 (DHVQFN16) 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 20 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 14. Revision history Table 10. 74LV123_5 Modifications: 74LV123_4 74LV123_3 74LV123_2 74LV123_1 Revision history Release date 20071108 Data sheet status Product data sheet Product specification Product specification Product specification Product specification Change notice Supersedes 74LV123_4 74LV123_3 74LV123_2 74LV123_1 Document ID • Changed: SOT38-1 changed into SOT38-4 20070919 20030313 19980420 19970204 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 21 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 15. Legal information 15.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 22 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 12.1 12.1.1 12.1.2 12.1.3 12.2 12.2.1 12.2.2 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 Recommended operating conditions. . . . . . . . 7 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 13 Timing components . . . . . . . . . . . . . . . . . . . . 13 Basic timing . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Retrigger timing . . . . . . . . . . . . . . . . . . . . . . . 14 Reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power considerations . . . . . . . . . . . . . . . . . . . 15 Power-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Contact information. . . . . . . . . . . . . . . . . . . . . 22 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 8 November 2007 Document identifier: 74LV123_5