74LVCV2G66GD,125

74LVCV2G66 Overvoltage tolerant bilateral switch Rev. 6 — 22 July 2015 Product data sheet 1. General description The 74LVCV2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVCV2G66 provides two single pole single throw analog or digital switches. Each switch includes an overvoltage tolerant input/output terminal (pin nZ), an output/input terminal (pin nY) and low-power active HIGH enable input (pin nE). The overvoltage tolerant switch terminals allow the switching of signals in excess of VCC. The low-power enable input eliminates the necessity of using current limiting resistors in portable applications when using control logic signals much lower than VCC. These inputs are also overvoltage tolerant. 2. Features and benefits  Wide supply voltage range from 2.3 V to 5.5 V  Ultra low-power operation  Very low ON resistance:  8.0  (typical) at VCC = 2.7 V  7.5  (typical) at VCC = 3.3 V  7.3  (typical) at VCC = 5.0 V.  5 V tolerant input for interfacing with 5 V logic  High noise immunity  Switch handling capability of 32 mA  CMOS low-power consumption  Latch-up performance exceeds 250 mA  Incorporates overvoltage tolerant analog switch technology  Switch accepts voltages up to 5.5 V independent of VCC  Multiple package options  Specified from 40 C to +85 C and 40 C to +125 C 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVCV2G66DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVCV2G66DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVCV2G66GT 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1  1.95  0.5 mm SOT833-1 74LVCV2G66GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 3  2  0.5 mm SOT996-2 74LVCV2G66GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6  1.6  0.5 mm SOT902-2 4. Marking Table 2. Marking codes Type number Marking code[1] 74LVCV2G66DP Y66 74LVCV2G66DC Y66 74LVCV2G66GT Y66 74LVCV2G66GD Y66 74LVCV2G66GM Y66 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram < =  ( =   ; <   ( DDK DDJ Fig 1. Logic symbol 74LVCV2G66 Product data sheet  ; Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 2 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch Z Y E VCC 001aaa532 Fig 3. Logic diagram (one switch) 6. Pinning information 6.1 Pinning /9&9* =   9&& <   ( (   < *1'   = 74LVCV2G66 1Z 1 8 VCC 1Y 2 7 1E 2E 3 6 2Y GND 4 5 2Z DDD 7UDQVSDUHQWWRSYLHZ 001aai213 Fig 4. Pin configuration SOT505-2 and SOT765-1 Fig 5. Pin configuration SOT833-1 /9&9* 9&& WHUPLQDO LQGH[DUHD 8 VCC 1Y 2 7 1E 2E 3 6 2Y GND 4 5 2Z (  < = 001aai214 Pin configuration SOT996-2 74LVCV2G66 Product data sheet =   <   ( DDD 7UDQVSDUHQWWRSYLHZ Transparent top view Fig 6.   1 *1' 1Z  74LVCV2G66 Fig 7. Pin configuration SOT902-2 All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 3 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch 6.2 Pin description Table 3. Symbol Pin description Pin Description SOT505-2, SOT765-1, SOT902-2 SOT996-2 and SOT833-1 1Z 1 7 independent input or output (overvoltage tolerant) 1Y 2 6 independent input or output 2E 3 5 enable input (active HIGH) GND 4 4 ground (0 V) 2Z 5 3 independent input or output (overvoltage tolerant) 2Y 6 2 independent input or output 1E 7 1 enable input (active HIGH) VCC 8 8 supply voltage 7. Functional description Table 4. Function table[1] Input nE Switch L OFF-state H ON-state [1] H = HIGH voltage level; L = LOW voltage level. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +6.5 V VI input voltage 0.5 +6.5 IIK input clamping current VI < 0.5 V or VI > 6.5 V 50 - mA ISK switch clamping current VI < 0.5 V or VI > 6.5 V - 50 mA VSW switch voltage enable and disable mode 0.5 +6.5 V ISW switch current VSW > 0.5 V or VSW < 6.5 V - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot [1] [2] [1] Tamb = 40 C to +125 C [2] V The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP8 package: above 55 C, the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 C, the value of Ptot derates linearly with 8 mW/K. For XSON8 and XQFN8 packages: above 118 C, the value of Ptot derates linearly with 7.8 mW/K. 74LVCV2G66 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 4 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage Conditions VSW switch voltage Tamb ambient temperature t/V Typ Max Unit 2.3 - 5.5 V 0 - 5.5 V [1] enable and disable mode input transition rise and fall rate Min 0 - 5.5 V 40 - +125 C VCC = 2.3 V to 2.7 V [2] - - 20 ns/V VCC = 2.7 V to 5.5 V [2] - - 10 ns/V [1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current flows from terminal nY. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min HIGH-level VCC = 2.3 V to 2.7 V input voltage V = 3.0 V to 3.6 V CC 0.6VCC - - 0.6VCC - V 2.0 - - 2.0 - V VCC = 4.5 V to 5.5 V 0.55VCC - - 0.55VCC - V LOW-level VCC = 2.3 V to 2.7 V input voltage V = 3.0 V to 3.6 V CC - - 0.1VCC - 0.1VCC V - - 0.5 - 0.5 V VCC = 4.5 V to 5.5 V - - 0.15VCC - [2] - 0.1 5 - 5 A Max 0.15VCC V II input leakage pin nE; VI = 5.5 V or GND; current VCC = 0 V to 5.5 V IS(OFF) OFF-state leakage current VCC = 2.3 V to 5.5 V; see Figure 8 [2][3] - 0.1 10 - 10 A IS(ON) ON-state leakage current VCC = 2.3 V to 5.5 V; see Figure 9 [2][3] - 0.1 10 - 10 A ICC supply current VI = 5.5 V or GND; VSW = GND or VCC; VCC = 2.3 V to 5.5 V [2] - 0.1 10 - 40 A ICC additional supply current pin nE; VI = VCC  0.6 V; VSW = GND or VCC; VCC = 3.0 V to 5.5 V [2] - 0.1 5 - 50 A CI input capacitance - 2.5 - - - pF CS(OFF) OFF-state capacitance - 8.0 - - - pF 74LVCV2G66 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 5 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter CS(ON) 40 C to +85 C Conditions 40 C to +125 C Unit Min Typ[1] Max Min Max - 16 - - - ON-state capacitance [1] All typical values are measured at Tamb = 25 C. [2] These typical values are measured at VCC = 3.3 V. [3] For overvoltage signals (VSW > VCC), the condition VY < VZ must be observed. pF 10.1 Test circuits 9&& 9&& Q( 9,/ Q= 9, Q( 9,+ Q< ,6 *1' ,6 92 Q= Q< *1' 9, DDJ DDJ VI = GND and VO = GND or 5.5 V. Fig 8. 92 VI = 5.5 V or GND and VO = open circuit. Test circuit for measuring OFF-state leakage current Fig 9. Test circuit for measuring ON-state leakage current 10.2 ON resistance Table 8. Resistance RON At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 11 and Figure 12. Symbol Parameter 40 C to +85 C Conditions Min RON(peak) RON(rail) ON resistance (peak) ON resistance (rail) Typ[1] 40 C to +125 C Unit Max Min Max VSW = GND to VCC; VI = VIH; see Figure 10 ISW = 8 mA; VCC = 2.3 V to 2.7 V - 13 30 - 30  ISW = 12 mA; VCC = 2.7 V - 10 25 - 25  ISW = 24 mA; VCC = 3.0 V to 3.6 V - 8.3 20 - 20  ISW = 32 mA; VCC = 4.5 V to 5.5 V - 7.4 15 - 15  ISW = 8 mA; VCC = 2.3 V to 2.7 V - 8.5 20 - 20  ISW = 12 mA; VCC = 2.7 V - 8.0 18 - 18  ISW = 24 mA; VCC = 3.0 V to 3.6 V - 7.5 15 - 15  ISW = 32 mA; VCC = 4.5 V to 5.5 V - 7.3 10 - 10  ISW = 8 mA; VCC = 2.3 V to 2.7 V - 8.5 20 - 20  ISW = 12 mA; VCC = 2.7 V - 7.2 18 - 18  ISW = 24 mA; VCC = 3.0 V to 3.6 V - 6.5 15 - 15  ISW = 32 mA; VCC = 4.5 V to 5.5 V - 5.7 10 - 10  VSW = GND; VI = VIH; see Figure 10 VSW = VCC; VI = VIH 74LVCV2G66 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 6 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch Table 8. Resistance RON …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 11 and Figure 12. Symbol Parameter RON(flat) 40 C to +85 C Conditions ON resistance (flatness) 40 C to +125 C Unit Min Typ[1] Max Min Max ISW = 8 mA; VCC = 2.5 V - 17 - - -  ISW = 12 mA; VCC = 2.7 V - 10 - - -  ISW = 24 mA; VCC = 3.3 V - 5 - - -  ISW = 32 mA; VCC = 5.0 V - 3 - - -  VSW = GND to VCC; VI = VIH [2] [1] All typical values are measured at Tamb = 25 C and nominal VCC. [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. 10.3 ON resistance test circuit and graphs 001aaa536 16 RON (Ω) VCC = 2.5 V 2.7 V 3.3 V 5.0 V 12 96: 8 9&& Q( 9,+ Q< 9, 4 Q= *1' ,6: 0 0 2 4 VI = GND to 5.5 V; Tamb = 25 C. VI = GND to 5.5 V; RON = VSW / ISW. Fig 10. Test circuit for measuring ON resistance 74LVCV2G66 Product data sheet 6 VI (V) DDJ Fig 11. Typical ON resistance as a function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 7 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch 001aaa537 16 Tamb = +85 °C +25 °C −40 °C +125 °C RON (Ω) 12 001aaa538 16 RON (Ω) Tamb = +85 °C +25 °C −40 °C +125 °C 12 8 8 4 4 0 0 0 2 4 6 0 2 4 VI (V) 6 VI (V) a. VCC = 2.5 V b. VCC = 2.7 V 001aaa539 16 001aaa540 16 RON (Ω) RON (Ω) Tamb = +85 °C +25 °C −40 °C +125 °C 12 12 8 8 4 4 0 Tamb = +85 °C +25 °C −40 °C +125 °C 0 0 2 4 6 0 2 4 VI (V) 6 VI (V) c. VCC = 3.3 V d. VCC = 5.0 V Fig 12. ON resistance as a function of input voltage at various supply voltages 11. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 15. Symbol Parameter 40 C to +85 C Conditions Min tpd 40 C to +125 C Unit Typ[1] Max Min Max propagation delay nY to nZ or nZ to nY; see Figure 13 [2][3] 74LVCV2G66 Product data sheet VCC = 2.3 V to 2.7 V - 0.4 1.2 - 2.0 ns VCC = 2.7 V - 0.4 1.0 - 1.5 ns VCC = 3.0 V to 3.6 V - 0.3 0.8 - 1.5 ns VCC = 4.5 V to 5.5 V - 0.2 0.6 - 1.0 ns All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 8 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch Table 9. Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 15. Symbol Parameter 40 C to +85 C Conditions Min ten enable time nE to nY or nZ; see Figure 14 disable time power dissipation capacitance CPD 40 C to +125 C Unit Max Min Max [4] VCC = 2.3 V to 2.7 V 1.0 4.7 12 1.0 15 ns VCC = 2.7 V 1.0 4.4 8.5 1.0 11 ns VCC = 3.0 V to 3.6 V 1.0 3.8 7.5 1.0 9.5 ns 1.0 2.7 5.0 1.0 6.5 ns VCC = 2.3 V to 2.7 V 1.0 6.0 16 1.0 20 ns VCC = 2.7 V 1.0 7.9 15 1.0 19 ns VCC = 3.0 V to 3.6 V 1.0 6.5 13.5 1.0 17 ns VCC = 4.5 V to 5.5 V 1.0 4.4 9.0 1.0 11.5 ns VCC = 4.5 V to 5.5 V tdis Typ[1] nE to nY or nZ; see Figure 14 [5] CL = 50 pF; fi = 10 MHz; VI = GND to 5.5 V [6] VCC = 2.5 V - 9.7 - - - pF VCC = 3.3 V - 10.3 - - - pF VCC = 5.0 V - 11.3 - - - pF [1] Typical values are measured at Tamb = 25 C and nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance). [4] ten is the same as tPZH and tPZL. [5] tdis is the same as tPLZ and tPHZ. [6] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD  VCC2  fi  N + {(CL + CS(ON)) VCC2  fo} where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS(ON) = maximum ON-state switch capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; {(CL + CS(ON)) VCC2  fo} = sum of the outputs. 74LVCV2G66 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 22 July 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 9 of 25 74LVCV2G66 NXP Semiconductors Overvoltage tolerant bilateral switch 11.1 Waveforms and test circuit 9, Q