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74LVT16543ADL,518

74LVT16543ADL,518

  • 厂商:

    NXP(恩智浦)

  • 封装:

    SSOP56

  • 描述:

    REGISTERED BUS TRANSCEIVER, LVT

  • 数据手册
  • 价格&库存
74LVT16543ADL,518 数据手册
INTEGRATED CIRCUITS 74LVT16543A 3.3V LVT 16-bit registered transceiver (3-State) Product specification Supersedes data of 19 IC23 Data Handbook       1998 Feb 19 Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) FEATURES 74LVT16543A DESCRIPTION • 16-bit universal bus interface • 3-State buffers • Output capability: +64mA/-32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The 74LVT16543A is a high-performance BiCMOS product designed for VCC operation at 3.3V. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The 74LVT16543A contains two sets of eight D-type latches, with separate control pins for each set. Using data flow from A to B as an example, when the A-to-B Enable (nEAB) input and the A-to-B Latch Enable (nLEAB) input are Low, the A-to-B path is transparent. resistors to hold unused inputs • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • No bus current loading when output is tied to 5V bus • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 A subsequent Low-to-High transition of the nLEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With nEAB and nOEAB both Low, the 3-State B output buffers are active and display the data present at the outputs of the A latches. Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs. and 200V per Machine Model Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER tPLH tPHL Propagation delay nAx to nBx or nBx to nAx CL = 50pF; VCC = 3.3V TYPICAL UNIT 2.2 ns CIN Input capacitance control pins VI = 0V or 3.0V 3 pF CI/O I/O pin capacitance Outputs disabled; VI/O = 0V or 3.0V 9 pF ICCZ Total supply current Outputs disabled; VCC = 3.6V 70 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-Pin Plastic SSOP Type III –40°C to +85°C 74LVT16543A DL VT16543A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74LVT16543A DGG VT16543A DGG SOT364-1 LOGIC SYMBOL (IEEE/IEC) 56 1EN3 (BA) 29 7EN9 (BA) 54 55 G1 31 G7 1C5 7C11 1 3 2EN4 (AB) 30 28 G2 26 G8 2 2C6 27 8C12 5 ∇3 5D 15 ∇9 11 D 6D 4∇ 12 D 10 ∇ 52 8EN10 (AB) 42 6 51 16 41 8 49 17 40 9 48 19 38 10 47 20 37 12 45 21 36 13 44 23 34 14 43 24 33 SW00151 1998 Feb 19 2 853–1764 18986 Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) PIN CONFIGURATION 74LVT16543A LOGIC SYMBOL 1OEAB 1 56 1OEBA 1LEAB 2 55 1LEBA 1EAB 3 54 1EBA GND 4 53 GND 1A0 5 52 1B0 1A1 6 51 1B1 VCC 7 50 VCC 1A2 8 49 1B2 1A3 9 48 1B3 1A4 10 47 1B4 GND 11 46 GND 1A5 12 45 1B5 1A6 13 44 1B6 1A7 14 43 1B7 2A0 15 42 2B0 2A1 16 41 2B1 5 6 8 9 10 12 13 14 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 3 1EAB 54 1EBA 1OEAB 1 2 1LEAB 1OEBA 56 55 1LEBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 2A2 17 40 2B2 GND 18 39 GND 2A3 19 38 2B3 52 51 49 48 47 45 44 43 15 16 17 19 20 21 23 24 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A4 20 37 2B4 2A5 21 36 2B5 VCC 22 35 VCC 2A6 23 34 2B6 2A7 24 33 2B7 GND 25 32 GND 2EAB 26 31 2EBA 2LEAB 27 30 2LEBA 2OEAB 28 29 2OEBA 26 2EAB 31 2EBA 2OEAB 28 27 2LEAB 2OEBA 29 30 2LEBA 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 42 41 40 38 37 36 34 33 SH00038 SH00037 PIN DESCRIPTION PIN NUMBER SYMBOL 5, 6, 8, 9, 10, 12, 13, 14 15, 16, 17, 19, 20, 21, 23, 24 1A0 – 1A7, 2A0 – 2A7 A Data inputs/outputs 52, 51, 49, 48, 47, 45, 44, 43 42, 41, 40,38, 37, 36, 34, 33 1B0 – 1B7, 2B0 – 2B7 B Data inputs/outputs 1, 56 28, 29 1OEAB, 1OEBA, 2OEAB, 2OEBA 3, 54 26, 31 1EAB, 1EBA, 2EAB, 2EBA 2, 55 27, 30 1LEAB, 1LEBA, 2LEAB, 2LEBA 4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 19 NAME AND FUNCTION A to B / B to A Output Enable inputs (active-Low) A to B / B to A Enable inputs (active-Low) A to B / B to A Latch Enable inputs (active-Low) 3 Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) 74LVT16543A LOGIC DIAGRAM DETAIL A D nB0 Q LE nA0 Q D LE nA1 nB1 nA2 nB2 nA3 nB3 DETAIL A X 7 nA4 nB4 nA5 nB5 nA6 nB6 nA7 nB7 nOEBA nOEAB nEBA nEAB nLEBA nLEAB SH00039 FUNCTION TABLE INPUTS H = h = L = l = X = ↑ = NC= Z = OUTPUTS STATUS nOEXX nEXX nLEXX nAx or nBx nBx or nAx H X X X Z Disabled X H X X Z Disabled L L ↑ ↑ L L h l Z Z Disabled + Latch L L L L ↑ ↑ h l H L Latch + Display L L L L L L H L H L Transparent L L H X NC Hold High voltage level High voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA) Low voltage level Low voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA) Don’t care Low-to-High transition of nLEXX or nEXX (XX = AB or BA) No change High impedance or “off ” state 1998 Feb 19 4 Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) 74LVT16543A ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current VOUT CONDITIONS DC output voltage3 IOUT O DC output current Tstg Storage temperature range mA –65 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Input voltage 0.8 V IOH High-level output current –32 mA Low-level output current 32 Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64 IOL O ∆t/∆v Input transition rise or fall rate; Outputs enabled Tamb Operating free-air temperature range 1998 Feb 19 2.0 mA –40 5 V 10 ns/V +85 °C Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) 74LVT16543A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH VOL VRST High-level output voltage Low-level output voltage Power-up output low voltage5 Output off current IHOLD Bus H B Hold ld currentt A or B outputs7 2.4 2.54 VCC = 3.0V; IOH = –32mA 2.0 2.36 0.07 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3.0V; IOL = 16mA 0.2 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.35 0.55 VCC = 3.6V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.1 ±1 0.1 10 0.5 20 0.5 10 Control pins VCC = 3.6V; VI = 5.5V I/O Data pins4 VCC = 3.6V; VI = 0 1.0 –5 VCC = 0V; VI or VO = 0 to 4.5V 1.0 ±100 IPU/PD VCC = 3V; VI = 2.0V –75 –140 VCC = 0V to 3.6V; VCC = 3.6V ±500 V V µA µA µA VO = 5.5V; VCC = 3.0V 45 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don’t care 35 ±100 µA VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 0.07 0.12 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 4.5 6 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 06 0.07 0.12 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 0.1 0.2 Quiescent supply current ICCZ ∆ICC 130 V Current into an output in the High state when VO > VCC ICCH ICCL 75 UNIT V VCC = 2.7V; IOL = 100µA VCC = 3V; VI = 0.8V IEX –1.2 VCC = 2.7V; IOH = –8mA VCC = 3.6V; VI = VCC IOFF –0.85 VCC VCC = 0 or 3.6V; VI = 5.5V Input leakage current MAX VCC–0.2 VCC = 3.6V; VI = VCC or GND II TYP1 Additional supply current per input pin2 mA mA NOTES: 1. All typical values are at VCC = 3.3V and . 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 6 Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) 74LVT16543A AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V MIN TYP1 MAX MAX UNIT tPLH tPHL Propagation delay nAx to nBx or nBx to nAx 2 1.0 1.0 2.2 2.2 3.7 3.7 4.4 4.4 ns tPLH tPHL Propagation delay nLEBA to nAx, nLEAB to nBx 1 2 1.5 1.5 2.7 2.7 4.8 4.8 6.2 6.2 ns tPZH tPZL Output enable time nOEBA to nAx, nOEAB to nBx 4 5 1.5 1.5 2.8 2.6 4.6 5.0 6.1 6.6 ns tPHZ tPLZ Output disable time nOEBA to nAx, nOEAB to nBx 4 5 2.0 2.0 3.1 3.2 5.2 4.6 5.7 4.7 ns tPZH tPZL Output enable time nEBA to nAx, nEAB to nBx 4 5 1.5 1.5 2.9 2.6 4.8 5.1 6.1 6.6 ns tPHZ tPLZ Output disable time nEBA to nAx, nEAB to nBx 4 5 2.0 2.0 3.1 3.2 5.1 4.3 5.7 4.5 ns VCC = 2.7V UNIT NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 3.3V ±0.3V WAVEFORM MIN TYP MIN ts(H) ts(L) Setup time nAx to nLEAB, nBx to nLEBA 3 0.8 1.0 0.4 0.1 0.5 1.5 ns th(H) th(L) Hold time nAx to nLEAB, nBx to nLEBA 3 1.0 1.2 0.2 0.4 0.5 1.3 ns ts(H) ts(L) Setup time nAx to nEAB, nBx to nEBA 3 0.7 1.3 0.1 0.1 0.4 1.5 ns th(H) th(L) Hold time nAx to nEAB, nBx to nEBA 3 1.2 1.3 0.2 0.4 0.8 1.4 ns tW(L) Latch enable pulse width, Low 3 1.8 1.0 1.8 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 2.7V VIN VM 2.7V VIN VM VM VM 0V tPHL 0V tPLH tPLH VOH VOUT VM VOH VOUT VM VOL VM VM VOL SW00152 SW00153 Waveform 1. Propagation Delay For Inverting Output 1998 Feb 19 tPHL Waveform 2. Propagation Delay For Non-Inverting Output 7 Philips Semiconductors Product specification 3.3V 16-bit registered transceiver (3-State) ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ 74LVT16543A 2.7V nAx, nBx VM VM VM 2.7V VM nOEAB, nOEBA, nEAB, nEBA VM 0V ts(H) ts(L) th(H) 0V th(L) tPZL 2.7V nLEAB, nLEBA, nEAB, nEBA VM tPLZ 3.0V VM tw(L) VM VM nAx, nBx 0V VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SW00154 SW00156 Waveform 3. Data Setup and Hold Times and Latch Enable Pulse Width Waveform 5. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 2.7V nOEAB, nOEBA, nEAB, nEBA VM VM 0V tPZH tPHZ VM nAx, nBx 0V SW00155 Waveform 4. 3-State Output Enable Time to High Level and Output Disable Time from High Level TEST CIRCUIT AND WAVEFORMS 6V VCC VIN VOUT PULSE GENERATOR tW 90% OPEN RL GND 10% 10% 0V tTHL (tF) CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs SWITCH tPHZ/tPZH GND tPLZ/tPZL 6V tPLH/tPHL open VM VM 10% tW 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. AMP (V) 90% 10% SWITCH POSITION TEST AMP (V) VM VM NEGATIVE PULSE D.U.T. RT 90% 74LVT16 Amplitude Rep. Rate tW tR 2.7V ≤10MHz 500ns ≤2.5ns tF ≤2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SW00003 1998 Feb 19 8 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit registered transceiver (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 19 9 74LVT16543A SOT371-1 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit registered transceiver (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 19 10 74LVT16543A SOT364-1 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit registered transceiver (3-State) NOTES 1998 Feb 19 11 74LVT16543A Philips Semiconductors Product specification 3.3V LVT 16-bit registered transceiver (3-State) 74LVT16543A Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.  Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number:       yyyy mmm dd 12 Date of release: 05-96 9397-750-03558
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