BUK652R3-40C,127

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia BUK652R3-40C N-channel TrenchMOS intermediate level FET Rev. 2 — 18 August 2010 Product data sheet 1. Product profile 1.1 General description Intermediate level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using advanced TrenchMOS technology. This product has been designed and qualified to the appropriate AEC Q101 standard for use in high performance automotive applications. 1.2 Features and benefits „ AEC Q101 compliant „ Suitable for intermediate level gate drive sources „ Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications „ 12 V Automotive systems „ Start-Stop micro-hybrid applications „ Electric and electro-hydraulic power steering „ Transmission control „ Motors, lamps and solenoid control „ Ultra high performance power switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 40 V ID drain current VGS = 10 V; Tmb = 25 °C; see Figure 1 - - 120 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 306 W VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 11 - 2 2.3 mΩ [1] Static characteristics RDSon drain-source on-state resistance BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET Table 1. Symbol Quick reference data …continued Parameter Conditions Min Typ Max Unit - - 1.02 J - 72 - Avalanche ruggedness EDS(AL)S non-repetitive ID = 120 A; Vsup ≤ 40 V; drain-source RGS = 50 Ω; VGS = 10 V; avalanche energy Tj(init) = 25 °C; unclamped Dynamic characteristics QGD [1] gate-drain charge ID = 25 A; VDS = 32 V; VGS = 10 V; see Figure 13; see Figure 14 nC Continuous current is limited by package. 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate Simplified outline 2 D Drain 3 S source mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 SOT78A (TO-220AB) 3. Ordering information Table 3. Ordering information Type number BUK652R3-40C BUK652R3-40C Product data sheet Package Name Description Version TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78A All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 2 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C gate-source voltage VGS drain current ID Min Max Unit - 40 V DC [1] -16 16 V Pulsed [2] -20 20 V Tmb = 25 °C; VGS = 10 V; see Figure 1 [3] - 120 A Tmb = 100 °C; VGS = 10 V; see Figure 1 [3] - 120 A IDM peak drain current Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 - 1006 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 306 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C - 120 A Source-drain diode [3] IS source current Tmb = 25 °C ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 1006 A ID = 120 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped - 1.02 J - - J Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy EDS(AL)R repetitive drain-source avalanche energy [4][5][6] [1] -16V accumulated duration not to exceed 168 hrs [2] Accumulated pulse duration not to exceed 5mins. [3] Continuous current is limited by package. [4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [5] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [6] Refer to application note AN10273 for further information. BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 3 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 003aae288 300 ID (A) 03na19 120 Pder (%) 240 80 180 120 (1) 40 60 0 0 0 Fig 1. 50 100 150 Tmb (°C) 200 0 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aae247 104 ID (A) 103 Limit RDSon = VDS / ID tp =10 μ s 100 μ s 102 10 DC 10 ms 100 ms 1 10-1 10-1 Fig 3. 1 ms 1 10 V DS (V) 102 Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 4 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 - - 0.49 K/W Rth(j-a) thermal resistance from junction to ambient vertical in free air - 60 - K/W 003aae269 1 Zth(j-mb) (K/W) 10 δ = 0.5 -1 0.2 0.1 0.05 10 -2 δ= P 0.02 single shot tp T t tp T 10-3 10-6 Fig 4. 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 5 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 40 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 36 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 9; see Figure 10 1.8 2.3 2.8 V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10 - - 3.3 V ID = 2.5 mA; VDS = VGS; Tj = 175 °C; see Figure 10 0.8 - - V - - 500 µA IDSS drain leakage current VDS = 40 V; VGS = 0 V; Tj = 175 °C VDS = 40 V; VGS = 0 V; Tj = 25 °C - 0.02 1 µA IGSS gate leakage current VDS = 0 V; VGS = 20 V; Tj = 25 °C - 2 100 nA VDS = 0 V; VGS = -20 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 11 - 2 2.3 mΩ VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 11 - 2.5 3.1 mΩ VGS = 4.5 V; ID = 25 A; Tj = 25 °C; see Figure 11 - 2.8 3.6 mΩ VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12; see Figure 11 - - 5 mΩ ID = 25 A; VDS = 32 V; VGS = 10 V; see Figure 13; see Figure 14 - 260 - nC ID = 25 A; VDS = 32 V; VGS = 5 V; see Figure 13; see Figure 14 - 147 - nC RDSon drain-source on-state resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time tf fall time LD internal drain inductance from drain lead 6 mm from package to centre of die; Tj = 25 °C LS internal source inductance from source lead to source bond pad; Tj = 25 °C BUK652R3-40C Product data sheet ID = 25 A; VDS = 32 V; VGS = 10 V; see Figure 13; see Figure 14 VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 16 VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 - 38 - nC - 72 - nC - 11.3 15.1 nF - 1447 1750 pF - 1014 1390 pF - 60 - ns - 140 - ns - 234 - ns - 416 - ns - 4.5 - nH - 7.5 - nH © NXP B.V. 2010. All rights reserved. 6 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit - 0.8 1.2 V - 63 - ns - 127 - nC Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 15 trr reverse recovery time Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 25 V 003aae251 250 gfs (S) 003aae248 100 10 5 4 3.8 ID (A) 3.6 200 80 150 60 3.4 100 40 3.3 50 20 VGS (V) = 3.2 0 0 0 Fig 5. 20 40 60 80 I D (A) 100 Forward transconductance as a function of drain current; typical values 0 Fig 6. 003aae282 8 RDSon (mΩ) 0.4 0.6 0.8 1 VDS(V) Output characteristics: drain current as a function of drain-source voltage; typical values 003aae249 80 ID (A) 6 60 4 40 2 20 0 Tj = 175 °C Tj = 25 °C 0 0 Fig 7. 0.2 5 10 15 VGS (V) 20 Drain-source on-state resistance as a function of gate-source voltage; typical values BUK652R3-40C Product data sheet 0 Fig 8. 1 2 3 VGS (V) 4 Transfer characteristics: drain current as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 7 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 003aad806 10-1 ID (A) 003aae542 4 VGS(th) (V) 10-2 min 10-3 10 typ 3 max @1mA 2 typ @1mA max -4 10-6 0 Fig 9. min @2.5mA 1 10-5 1 2 3 VGS (V) Sub-threshold drain current as a function of gate-source voltage 003aae283 8 VGS (V) = 3.3 RDSon (mΩ) 0 -60 4 3.4 0 60 120 Tj (°C) 180 Fig 10. Gate-source threshold voltage as a function of junction temperature 003aad793 2.5 a 2 6 1.5 3.6 4 3.8 4.0 5.0 10 2 0 0 10 20 30 40 ID (A) 50 Fig 11. Drain-source on-state resistance as a function of drain current; typical values BUK652R3-40C Product data sheet 1 0.5 0 -60 0 60 120 Tj (°C) 180 Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 8 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 003aae254 10 VGS (V) VDS 8 14V ID 6 VDS = 32V VGS(pl) 4 VGS(th) VGS QGS1 2 QGS2 QGS QGD QG(tot) 0 0 003aaa508 Fig 13. Gate charge waveform definitions 100 200 QG (nC) 300 Fig 14. Gate-source voltage as a function of gate charge; typical values 003aae255 100 IS (A) 80 60 Tj = 175 °C Tj = 25 °C 40 20 0 0 0.3 0.6 0.9 VSD (V) 1.2 Fig 15. Source current as a function of source-drain voltage; typical values BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 9 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 003aae252 105 C (pF) 104 Ciss 103 Coss Crss 102 10-1 1 10 VDS (V) 102 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 10 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78A A A1 p q mounting base D1 D L2 L1(1) Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1(1) L2 max. p q Q mm 4.5 4.1 1.39 1.27 0.9 0.6 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 3.8 3.6 3.0 2.7 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78A REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 03-01-22 05-03-14 Fig 17. Package outline SOT78A (TO-220AB) BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 11 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK652R3-40C v.2 20100818 Product data sheet - BUK652R3-40C v.1 - - Modifications: BUK652R3-40C v.1 BUK652R3-40C Product data sheet • Status changed from objective to product. 20100520 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 12 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. BUK652R3-40C Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 13 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 9.4 No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK652R3-40C Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 18 August 2010 © NXP B.V. 2010. All rights reserved. 14 of 15 BUK652R3-40C NXP Semiconductors N-channel TrenchMOS intermediate level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact information. . . . . . . . . . . . . . . . . . . . . .14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 August 2010 Document identifier: BUK652R3-40C