BUK7210-55B

BUK7210-55B N-channel TrenchMOS standard level FET Rev. 01 — 11 December 2008 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits 185 °C rated Q101 compliant Standard level compatible Very low on-state resistance 1.3 Applications 12 V and 24 V loads Automotive systems General purpose power switching Motors, lamps and solenoids 1.4 Quick reference data Table 1. VDS ID Quick reference Conditions VGS = 10 V; Tmb = 25 °C; see Figure 1; see Figure 3; VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 10; see Figure 9 ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped inductive load [1] Min Typ Max 55 75 Unit V A drain-source voltage Tj ≥ 25 °C; Tj ≤ 185 °C drain current Symbol Parameter Static characteristics RDSon drain-source on-state resistance 8.5 10 mΩ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy 173 mJ [1] Continuous current is limited by package. NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain 2 1 3 Simplified outline [1] mb Graphic symbol D G mbb076 S SOT428 (SC-63; DPAK) [1] It is not possible to make connection to pin 2 of the SOT428 package. 3. Ordering information Table 3. Ordering information Type number Package Name Description BUK7210-55B SC-63; plastic single-ended surface-mounted package (DPAK); 3 leads (one DPAK lead cropped) Version SOT428 BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 2 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 4. Limiting values Table 4. Symbol VDS VDGR VGS ID Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3; Tmb = 100 °C; VGS = 10 V; see Figure 1 Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3; IDM Ptot Tstg Tj IS ISM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C; Tmb = 25 °C; tp ≤ 10 µs; pulsed; Tmb = 25 °C Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; drain-source avalanche Tj(init) = 25 °C; unclamped inductive load energy [1] [2] [3] Current is limited by power dissipation chip rating. Continuous current is limited by package. Current is limited by power dissipation chip rating. In accordance with the Absolute Maximum Rating System (IEC 60134). Conditions Tj ≥ 25 °C; Tj ≤ 185 °C RGS = 20 kΩ; 25 °C ≤ Tj ≤ 185 °C [1] Min -20 [2] -55 -55 [2] [3] Max 55 55 20 89.6 65.5 75 335 167 185 185 75 89.6 335 173 Unit V V V A A A A W °C °C A A A mJ Tmb = 25 °C; tp ≤ 10 µs; pulsed Tmb = 25 °C; see Figure 2 Source-drain diode BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 3 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 100 ID (A) 75 003aac284 Capped at 75A due to package 120 Pder (%) 80 03no96 50 40 25 0 0 50 100 150 Tmb (°C) 200 0 0 50 100 150 Tmb (°C) 200 Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aac272 103 ID (A) Limit RDSon = VDS / ID 102 tp = 10 μ s 100 μ s Capped at 75 A due to package DC 1 ms 10 ms 100 ms 10 1 1 10 VDS (V) 102 Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 4 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ Max 0.95 Unit K/W thermal resistance from see Figure 4 junction to mounting base thermal resistance from Mounted on a printed circuit board; vertical junction to ambient in still air.; minimum footprint Rth(j-a) - 75 - K/W 1 Zth (j-mb) (K/W) d = 0.5 0.2 10 -1 003aac273 0.1 0.05 0.02 10-2 P δ= single shot tp T tp T t 10-3 1e-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 5 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 6. Characteristics Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 250 µA; VGS = 0 V; Tj = 25 °C ID = 250 µA; VGS = 0 V; Tj = -55 °C ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 7 ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 7; see Figure 8 ID = 1 mA; VDS = VGS; Tj = 185 °C; see Figure 7 ID = 1 mA; VDS = VGS; Tj = -40 °C; see Figure 7 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 7 IDSS drain leakage current VDS = 55 V; VGS = 0 V; Tj = 175 °C VDS = 55 V; VGS = 0 V; Tj = 125 °C VDS = 55 V; VGS = 0 V; Tj = 25 °C VDS = 55 V; VGS = 0 V; Tj = 185 °C IGSS RDSon gate leakage current drain-source on-state resistance VDS = 0 V; VGS = 20 V; Tj = 25 °C VDS = 0 V; VGS = -20 V; Tj = 25 °C VGS = 10 V; ID = 25 A; Tj = 185 °C; see Figure 9 VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 10; see Figure 9 Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss td(on) tr td(off) tf LD LS total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance internal source inductance measured from drain to center of die; Tj = 25 °C measured from source lead to source bond pad; Tj = 25 °C VDS = 25 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 14 ID = 25 A; VDS = 44 V; VGS = 10 V; Tj = 25 °C; see Figure 12; see Figure 13 35 9 12 1840 379 165 18 91 48 45 2.5 7.5 2453 455 226 nC nC nC pF pF pF ns ns ns ns nH nH Min 55 50 2 0.9 Typ 1.75 3 2.8 1.5 0.1 0.02 3 2 2 8.5 Max 4 4.4 500 90 1 800 100 100 20.8 10 Unit V V V V V V V µA µA µA µA nA nA mΩ mΩ Static characteristics BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 6 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET Table 6. Symbol VSD Characteristics …continued Parameter source-drain voltage Conditions IS = 18 A; VGS = 0 V; Tj = 150 °C IS = 18 A; VGS = 0 V; Tj = 175 °C IS = 18 A; VGS = 0 V; Tj = 100 °C IS = 18 A; VGS = 0 V; Tj = 25 °C; see Figure 11 IS = 18 A; VGS = 0 V; Tj = 125 °C IS = 18 A; VGS = 0 V; Tj = 185 °C; see Figure 11 Min Typ 0.76 0.74 0.8 0.85 0.78 0.73 67 65 Max 1.2 Unit V V V V V V ns nC Source-drain diode trr Qr reverse recovery time recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V; VDS = 30 V; Tj = 25 °C 100 ID (A) 75 003aac279 18 RDSon (m Ω) 16 003aac285 14 50 12 10 25 Tj = 185 °C Tj = 25 °C 8 0 0 2 4 6 VGS (V) 8 6 5 10 15 VGS (V) 20 Fig 5. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 7 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 5 VGS(th) (V) 4 max 003aac282 10−1 ID (A) 10−2 min typ max 03aa35 3 typ 10−3 2 min 10−4 1 10−5 0 -60 10−6 10 80 150 Tj (°C) 220 0 2 4 VGS (V) 6 Fig 7. Gate-source threshold voltage as a function of junction temperature 2.4 a 003aac283 Fig 8. Sub-threshold drain current as a function of gate-source voltage 25 003aac276 Lable is VGS (V) RDSon (mΩ ) 20 1.6 6 6.5 7 8 10 20 15 0.8 10 0 -60 5 10 80 150 Tj (°C) 220 0 75 150 225 ID (A) 300 Fig 9. Normalized drain-source on-state resistance factor as a function of junction temperature Fig 10. Drain-source on-state resistance as a function of drain current; typical values BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 8 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 100 IS (A) 75 003aac281 VDS ID VGS(pl) VGS(th) VGS QGS1 QGS2 QGD QG(tot) 003aaa508 50 25 Tj = 185 °C Tj = 25 °C QGS 0 0.0 0.3 0.6 0.9 VSD (V) 1.2 Fig 12. Gate charge waveform definitions Fig 11. Source current as a function of source-drain voltage; typical values 10 VGS (V) 7.5 VDD = 14 V 5 VDD = 44 V 2000 Ciss 003aac280 3000 C (pF) 003aac278 1000 2.5 Coss Crss 0 0 10 20 30 QG (nC) 40 0 10-1 1 10 VDS (V) 102 Fig 13. Gate-source voltage as a function of gate charge; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 9 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 300 ID (A) 250 003aac274 Label is VGS (V) 20 16 12 10 9.5 9 8.5 8 7.5 200 150 100 7 6.5 50 6 5.5 5 4.5 0 2 4 6 8 10 VDS (V) 0 Fig 15. Output characteristics: drain current as a function of drain-source voltage; typical values BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 10 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped) SOT428 y E b2 A A1 A E1 mounting base D1 HD D2 2 L2 1 3 L L1 b1 e e1 b w M A c 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 2.38 2.22 A1 0.93 0.46 b 0.89 0.71 b1 1.1 0.9 b2 5.46 5.00 c 0.56 0.20 D1 6.22 5.98 D2 min 4.0 E 6.73 6.47 E1 min 4.45 e 2.285 e1 4.57 HD 10.4 9.6 L 2.95 2.55 L1 min 0.5 L2 0.9 0.5 w 0.2 y max 0.2 OUTLINE VERSION SOT428 REFERENCES IEC JEDEC TO-252 JEITA SC-63 EUROPEAN PROJECTION ISSUE DATE 06-02-14 06-03-16 Fig 16. Package outline SOT428 (DPAK) BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 11 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Release date 20081211 Data sheet status Product data sheet Change notice Supersedes Document ID BUK7210-55B_1 BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 12 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK7210-55B_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 11 December 2008 13 of 14 NXP Semiconductors BUK7210-55B N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 11 December 2008 Document identifier: BUK7210-55B_1