BUK764R0-55B

BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET Rev. 04 — 4 October 2007 Product data sheet 1. Product profile 1.1 General description N-channel enhancement mode power Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology. 1.2 Features I Very low on-state resistance I 175 °C rated I Q101 compliant I Standard level compatible 1.3 Applications I Automotive systems I Motors, lamps and solenoids I General purpose power switching I 12 V and 24 V loads 1.4 Quick reference data I EDS(AL)S ≤ 1.2 J I ID ≤ 75 A I RDSon = 3.4 mΩ (typ) I Ptot ≤ 300 W 2. Pinning information Table 1. Pin 1 2 3 mb Pinning Description gate (G) drain (D) source (S) mounting base; connected to drain (D) 2 123 03ab54 Simplified outline mb Symbol mb D G mbb076 S 1 3 SOT404 (D2PAK) SOT78A (TO-220AB) NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 3. Ordering information Table 2. Ordering information Package Name BUK754R0-55B BUK764R0-55B SC-46 D2PAK Description plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) Version SOT78A SOT404 Type number 4. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VDGR VGS ID Parameter drain-source voltage drain-gate voltage (DC) gate-source voltage drain current Tmb = 25 °C; VGS = 10 V; see Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; see Figure 2 IDM Ptot Tstg Tj IDR IDRM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature reverse drain current peak reverse drain current non-repetitive drain-source avalanche energy repetitive drain-source avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 75 A; VDS ≤ 55 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C [4] [1][2] [2] [1][3] [2] [2] Conditions RGS = 20 kΩ Min Max 55 55 ±20 193 75 75 774 300 Unit V V V A A A A W Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 Tmb = 25 °C; see Figure 1 −55 +175 °C −55 +175 °C 193 75 774 1.2 A A A J Source-drain diode Avalanche ruggedness EDS(AL)R - - J [1] [2] [3] [4] Current is limited by chip power dissipation rating. Continuous current is limited by package. Refer to document 9397 750 12572 for further information. Conditions: a) Maximum value not quoted. Repetitive rating defined in Figure 16. b) Single-pulse avalanche rating limited by Tj(max) of 175 °C. c) Repetitive avalanche rating limited by an average junction temperature of 170 °C. d) Refer to application note AN10273 for further information. BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 2 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 120 Pder (%) 80 03na19 200 ID (A) 150 001aaf871 100 40 50 (1) 0 0 50 100 150 Tmb (°C) 200 0 25 75 125 Tmb (°C) 175 P tot P der = ----------------------- × 100 % P tot ( 25 ° C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature 103 ID (A) 102 (1) VGS ≥ 10 V (1) Capped at 75 A due to package. Fig 2. Continuous drain current as a function of mounting base temperature 03ng55 tp = 10 µ s Limit RDSon = VDS / ID 100 µ s 1 ms 10 ms 100 ms DC 10 1 10-1 1 10 VDS (V) 102 Tmb = 25 °C; IDM is single pulse (1) Capped at 75 A due to package. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 3 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 4. Symbol Rth(j-mb) Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to mounting base thermal resistance from junction to ambient SOT78A (TO-220AB) SOT404 (D2PAK) vertical in free air mounted on a printed-circuit board; minimum footprint 60 50 K/W K/W Conditions Min Typ Max 0.5 Unit K/W 1 Zth(j-mb) (K/W) 10-1 δ = 0.5 0.2 0.1 0.05 P 03ng56 10-2 0.02 δ= tp T single shot 10-3 10-6 tp T t 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 4 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 6. Characteristics Table 5. Characteristics Tj = 25 °C unless otherwise specified. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 250 µA; VGS = 0 V Tj = 25 °C Tj = −55 °C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; see Figure 9 Tj = 25 °C Tj = 175 °C Tj = −55 °C IDSS drain leakage current VDS = 55 V; VGS = 0 V Tj = 25 °C Tj = 175 °C IGSS RDSon gate leakage current drain-source on-state resistance VGS = ±20 V; VDS = 0 V VGS = 10 V; ID = 25 A; see Figure 6 and 8 Tj = 25 °C Tj = 175 °C Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss td(on) tr td(off) tf LD total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance from drain lead 6 mm from package to center of die from contact screw on mounting base to center of die SOT78A from upper edge of drain mounting base to center of die SOT404 LS VSD trr Qr internal source inductance source-drain voltage reverse recovery time recovered charge from source lead to source bonding pad IS = 40 A; VGS = 0 V; see Figure 15 IS = 20 A; dIS/dt = −100 A/µs; VGS = −10 V; VR = 30 V Source-drain diode 0.85 95 251 1.2 V ns nC VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG = 10 Ω VGS = 0 V; VDS = 25 V; f = 1 MHz; see Figure 12 ID = 25 A; VDD = 44 V; VGS = 10 V; see Figure 14 86 18 25 nC nC nC pF pF pF ns ns ns ns nH nH nH nH 3.4 4.0 8 mΩ mΩ 0.02 2 1 500 100 µA µA nA 2 1 3 4 4.4 V V V 55 50 V V Min Typ Max Unit Static characteristics 5082 6776 1054 1265 450 23 51 71 41 4.5 3.5 2.5 7.5 617 - BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 5 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 300 ID 20 (A) 10 250 03nh22 7 7 RDSon (m Ω) 03nh21 6.5 6 5.5 6 200 150 5 5 100 4.5 50 VGS (V) = 4 0 0 2 4 6 8 VDS (V) 10 3 5 10 15 VGS (V) 20 4 Tj = 25 °C Tj = 25 °C; ID = 25 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values 03nh23 Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values 03ne89 7 RDSon (m Ω) 6 2 a VGS (V) = 6 6.5 1.5 7 5 8 10 4 1 0.5 3 0 50 100 150 200 250 300 ID (A) 0 -60 0 60 120 Tj (°C) 180 Tj = 25 °C R DSon a = ----------------------------R DSon ( 25 °C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature Fig 7. Drain-source on-state resistance as a function of drain current; typical values BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 6 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 5 VGS(th) (V) 4 max 03aa32 10−1 ID (A) 10−2 min typ max 03aa35 3 typ 10−3 2 min 10−4 1 10−5 0 −60 0 60 120 Tj (°C) 180 10−6 0 2 4 VGS (V) 6 ID = 1 mA; VDS = VGS Tj = 25 °C; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature 120 gfs (S) 100 03nh19 Fig 10. Sub-threshold drain current as a function of gate-source voltage 7000 6000 Ciss 5000 03nh24 C (pF) 80 4000 60 3000 40 2000 20 1000 0 10-1 Coss Crss 102 0 0 20 40 ID (A) 60 1 10 VDS (V) Tj = 25 °C; VDS = 25 V VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 7 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 100 ID (A) 80 03nh20 10 VGS (V) 8 03nh18 60 6 VDS (V) = 14 VDS (V) = 44 40 Tj = 175 °C 20 Tj = 25 °C 0 0 2 4 VGS (V) 6 4 2 0 0 20 40 60 80 100 QG (nC) VDS = 25 V Tj = 25 °C; ID = 25 A Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values 100 ID (A) 80 03nh17 Fig 14. Gate-source voltage as a function of gate charge; typical values 102 IAL (A) 003aab677 (1) 10 60 (2) 40 1 Tj = 175 °C 20 Tj = 25 °C 0 0.0 10-1 10-3 (3) 0.2 0.4 0.6 0.8 1.0 VSD (V) 10-2 10-1 1 tAL (ms) 10 VGS = 0 V See Table note 4 of Table 3 Limiting values. (1) Single-pulse; Tj = 25 °C. (2) Single-pulse; Tj = 150 °C. (3) Repetitive. Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values Fig 16. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 8 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78A E p A A1 q D1 mounting base D L1(1) L2 Q L b1 1 2 3 b c e e 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.5 4.1 A1 1.39 1.27 b 0.9 0.6 b1 1.3 1.0 c 0.7 0.4 D 15.8 15.2 D1 6.4 5.9 E 10.3 9.7 e 2.54 L 15.0 13.5 L1(1) 3.30 2.79 L2 max. 3.0 p 3.8 3.6 q 3.0 2.7 Q 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78A REFERENCES IEC JEDEC 3-lead TO-220AB JEITA SC-46 EUROPEAN PROJECTION ISSUE DATE 03-01-22 05-03-14 Fig 17. Package outline SOT78A (TO-220AB) BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 9 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404 A E A1 mounting base D1 D HD 2 Lp 1 3 b c Q e e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 2.54 Lp 2.90 2.10 HD 15.80 14.80 Q 2.60 2.20 OUTLINE VERSION SOT404 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-02-11 06-03-16 Fig 18. Package outline SOT404 (D2PAK) BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 10 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 8. Soldering 10.85 10.60 10.50 1.50 7.50 7.40 1.70 2.25 2.15 8.15 8.35 8.275 1.50 4.60 0.30 4.85 5.40 8.075 7.95 3.00 0.20 solder lands solder resist occupied area solder paste 5.08 1.20 1.30 1.55 msd057 Fig 19. Reflow soldering footprint for SOT404 BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 11 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 9. Revision history Table 6. Revision history Release date 20071004 Data sheet status Product data sheet Product data sheet Change notice Supersedes BUK75_764R0-55B_3 BUK75_764R0_55B-02 Document ID BUK75_764R0-55B_4 Modifications: BUK75_764R0-55B_3 Modifications: • • • • Figure 7 updated. The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Crss (typ) and (max) value in Section 6 “Characteristics” changed from 289 (typ) and 396 (max) to 450 (typ) and 617 (max). Product data sheet Product data sheet BUK75_764R0_55B-01 - 20070124 BUK75_764R0_55B-02 BUK75_764R0_55B-01 20020930 20020328 BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 12 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 10. Legal information 10.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 10.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 10.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 11. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com BUK75_764R0-55B_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 4 October 2007 13 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 12. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 10.1 10.2 10.3 10.4 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 October 2007 Document identifier: BUK75_764R0-55B_4