BUK9107-55ATE

BUK9107-55ATE N-channel TrenchPLUS logic level FET Rev. 02 — 16 February 2009 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. The devices include TrenchPLUS diodes for ElectroStatic Discharge (ESD) protection and temperature sensing. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Allows responsive temperature monitoring due to integrated temperature sensor Q101 compliant Electrostatically robust due to integrated protection diodes Low conduction losses due to low on-state resistance 1.3 Applications 12 V and 24 V high power motor drives Automotive and general purpose power switching Electrical Power Assisted Steering (EPAS) Protected drive for lamps 1.4 Quick reference data Table 1. VDS ID Ptot Tj RDSon Quick reference Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tmb = 25 °C; see Figure 2 and 3 Tmb = 25 °C; see Figure 1 Min [1] -55 VGS = 4.5 V; ID = 50 A; Tj = 25 °C VGS = 10 V; ID = 50 A; Tj = 25 °C VGS = 5 V; ID = 50 A; Tj = 25 °C; see Figure 7 and 8 SF(TSD) VF(TSD) temperature sense diode IF = 250 µA; Tj > -55 °C; Tj < 175 °C temperature coefficient temperature sense diode IF = 250 µA; Tj = 25 °C forward voltage [1] Current is limited by power dissipation chip rating. Symbol Parameter drain-source voltage drain current total power dissipation junction temperature drain-source on-state resistance Typ 6 5.2 5.8 Max 55 140 272 175 7.7 6.2 7 Unit V A W °C mΩ mΩ mΩ Static characteristics -1.4 648 -1.54 -1.68 mV/K 658 668 mV NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 2. Pinning information Table 2. Pin 1 2 3 4 5 mb Pinning information Symbol G A D K S D Description gate anode drain cathode source mounting base; connected to drain 12 3 45 S K mbl317 Simplified outline mb Graphic symbol D A G SOT426 (D2PAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description BUK9107-55ATE D2PAK plastic single-ended surface-mounted package (D2PAK); 5 leads (one lead cropped) Version SOT426 BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 2 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 4. Limiting values Table 4. Symbol VDS VGS ID Limiting values Parameter drain-source voltage gate-source voltage drain current Tmb = 25 °C; VGS = 5 V; see Figure 2; see Figure 3 Tmb = 100 °C; VGS = 5 V; see Figure 2 IDM Ptot IGS(CL) peak drain current total power dissipation gate-source clamping current Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 Tmb = 25 °C; see Figure 1 continuous pulsed; tp = 5 ms; δ = 0.01 Conditions Tj ≥ 25 °C; Tj ≤ 175 °C [1] [2] [3] [3] Min -15 -100 -55 -55 Tmb = 25 °C tp ≤ 10 µs; pulsed; Tmb = 25 °C [2] [3] ISM Clamping EDS(CL)S non-repetitive drain-source ID = 75 A; VDS ≤ 55 V; VGS = 5 V; RGS = 50 Ω; clamping energy unclamped; Tj(init) = 25 °C electrostatic discharge voltage [1] [2] [3] In accordance with the Absolute Maximum Rating System (IEC 60134). Max 55 15 140 75 75 560 272 10 50 100 175 175 55 140 75 560 500 Unit V V A A A A W mA mA V °C °C V A A A mJ Visol(FET-TSD) FET to temperature sense diode isolation voltage Tstg Tj VDGS IS storage temperature junction temperature drain-gate voltage source current peak source current Source-drain diode - Electrostatic discharge Vesd HBM; C = 100 pF; R = 1.5 kΩ; pins 1, 3, 5 6 kV Voltage is limited by clamping. Current is limited by power dissipation chip rating. Continuous current is limited by package. BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 3 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 120 Pder (%) 80 03na19 150 ID (A) 125 03ne74 100 75 Capped at 75 A due to package 40 50 25 0 0 50 100 150 Tmb (°C) 200 0 25 50 75 100 125 150 175 200 Tmb (oC) Fig 2. Fig 1. Normalized total power dissipation as a function of mounting base temperature Normalized continuous drain current as a function of mounting base temperature 103 ID (A) 03nf55 Limit RDSon = VDS/ID tp = 10 μs 102 100 μs Capped at 75 A due to package 1 ms DC 10 10 ms 100 ms 1 1 10 VDS (V) 102 Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 4 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 5. Thermal characteristics Table 5. Symbol Rth(j-a) Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ Max 50 0.55 Unit K/W K/W thermal resistance from mounted on printed-circuit board; junction to ambient minimum footprint thermal resistance from see Figure 4 junction to mounting base 1 03ne76 Z th(j-mb) (K/W) 10-1 δ = 0.5 0.2 0.1 0.05 0.02 Single Shot P δ= tp T 10-2 tp T t 10-3 10-6 10-5 10-4 10-3 10-2 10-1 1 tp (s) 10 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 5 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 6. Characteristics Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = 25 °C ID = 0.25 mA; VGS = 0 V; Tj = -55 °C ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 9 ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 9 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 9 IDSS V(BR)GSS IGSS RDSon drain leakage current VDS = 55 V; VGS = 0 V; Tj = 25 °C VDS = 55 V; VGS = 0 V; Tj = 175 °C gate-source breakdown IG = -1 mA; -55 °C < Tj < 175 °C voltage IG = 1 mA; -55 °C < Tj < 175 °C gate leakage current drain-source on-state resistance VDS = 0 V; VGS = 5 V; Tj = 25 °C VDS = 0 V; VGS = -5 V; Tj = 25 °C VGS = 5 V; ID = 50 A; Tj = 25 °C; see Figure 7; see Figure 8 VGS = 5 V; ID = 50 A; Tj = 175 °C; see Figure 7; see Figure 8 VGS = 4.5 V; ID = 50 A; Tj = 25 °C VGS = 10 V; ID = 50 A; Tj = 25 °C VF(TSD) SF(TSD) temperature sense diode forward voltage temperature sense diode temperature coefficient temperature sense diode forward voltage hysteresis total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG(ext) = 10 Ω; Tj = 25 °C VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 12 IF = 250 µA; Tj = 25 °C IF = 250 µA; Tj > -55 °C; Tj < 175 °C Min 55 50 1 0.5 12 12 648 -1.4 Typ 1.5 0.1 15 15 5 5 5.8 6 5.2 658 -1.54 Max 2 2.3 10 250 1000 1000 7 14 7.7 6.2 668 -1.68 Unit V V V V V µA µA V V nA nA mΩ mΩ mΩ mΩ mV mV/K Static characteristics VF(TSD)hys IF > 125 µA; IF < 250 µA; Tj = 25 °C 25 32 50 mV Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss td(on) tr td(off) tf ID = 50 A; VDS = 44 V; VGS = 5 V; Tj = 25 °C; see Figure 14 108 15 47 5836 958 595 51 202 341 207 nC nC nC pF pF pF ns ns ns ns BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 6 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET Table 6. Symbol LD LS Characteristics …continued Parameter internal drain inductance internal source inductance source-drain voltage reverse recovery time recovered charge Conditions from upper edge of drain mounting base to centre of die; Tj = 25 °C from source lead to source bond pad; Tj = 25 °C IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 17 IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V; VDS = 30 V; Tj = 25 °C Min Typ 2.5 7.5 Max Unit nH nH Source-drain diode VSD trr Qr 0.85 85 250 1.2 V ns nC BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 7 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET ID 400 (A) 350 300 03ne77 25 RDSon (mΩ) 20 4 03ne79 V GS = 5 V 6 10 4.6 4.4 4.2 250 200 150 100 50 0 0 2 4 6 8 10 VDS (V) 3.8 3.6 15 3.4 3.2 10 3 2.8 5 2.6 2.4 2.2 0 2 4 6 8V 10 GS (V) Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of gate-source volatage; typical values 2 03ne89 16 RDSon (mΩ) 14 03ne78 a VGS = 3 V 3.6 3.2 3.4 3.8 4 1.5 12 1 10 0.5 8 5 10 6 0 50 100 150 200 250 300 ID (A) 0 -60 0 60 120 Tj (°C) 180 Fig 7. Drain-source on-state resistance as a function of drain current; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 8 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 2.5 VGS(th) (V) 2 03na17 10-1 ID (A) 10-2 03na18 max typ 1.5 min 10-3 min typ max 1 10-4 0.5 10-5 0 -60 -20 20 60 100 140 180 Tj (oC) 10-6 0 0.5 1 1.5 2 2.5 3 VGS (V) Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage 140 gfs (S) 120 100 03ne81 16000 C (pF) 14000 12000 10000 03ne86 80 8000 60 40 20 0 0 20 40 60 80 I (A) 100 D 6000 4000 2000 0 10-2 10-1 1 10 VDS (V) Ciss Coss Crss 102 Fig 11. Forward transconductance as a function of drain current; typical values Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 9 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 100 ID (A) 80 03ne80 5 VGS (V) 4 VDS = 14 V 03nf65 60 3 Tj = 175 ºC 40 2 VDS = 44 V 20 1 Tj = 25 ºC 0 0.0 1.0 2.0 VGS (V) 3.0 0 0 20 40 60 80 100 120 QG (nC) Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values 700 VF (mV) 600 03ne84 Fig 14. Gate-source voltage as a function of gate charge; typical values 03ne85 −1.70 SF (mV/K) −1.60 max typ 500 −1.50 min 400 0 50 100 150 Tj (°C) 200 −1.40 645 655 665 VF (mV) 675 Fig 15. Forward voltage of temperature sense diode as a function of junction temperature; typical values Fig 16. Temperature coefficient of temperature sense diode as a function of forward voltage; typical values BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 10 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 100 IS (A) 80 Tj = 175 ºC 60 03ne88 40 Tj = 25 ºC 20 0 0.0 0.5 1.0 VSD (V) 1.5 Fig 17. Reverse diode current as a function of reverse diode voltage; typical values BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 11 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 7. Package outline Plastic single-ended surface-mounted package (D2PAK); 5 leads (one lead cropped) SOT426 A E A1 D1 mounting base D HD 3 1 Lp 2 4 5 b c Q e e e e 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 1.70 Lp 2.90 2.10 HD 15.80 14.80 Q 2.60 2.20 OUTLINE VERSION SOT426 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-03-09 06-03-16 Fig 18. Package outline SOT426 (D2PAK) BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 12 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 8. Revision history Table 7. Revision history Release date 20090216 Data sheet status Product data sheet Change notice Supersedes BUK9107_9907_55ATE-01 Document ID BUK9107-55ATE_2 Modifications: • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Type number BUK9107-55ATE separated from data sheet BUK9107_9907_55ATE-01. Product data sheet - BUK9107_9907_55ATE-01 20020207 (9397 750 09138) BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 13 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status [1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK9107-55ATE_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 16 February 2009 14 of 15 NXP Semiconductors BUK9107-55ATE N-channel TrenchPLUS logic level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .13 Legal information. . . . . . . . . . . . . . . . . . . . . . . .14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .14 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact information. . . . . . . . . . . . . . . . . . . . . .14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: Rev. 02 — 16 February 2009 Document identifier: BUK9107-55ATE_2